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1; RUN: llc -mtriple arm-unknown -mattr=+vfp2,+v6t2 -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=ARM2; RUN: llc -mtriple thumb-unknown -mattr=+vfp2,+v6t2 -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=THUMB3 4declare arm_aapcscc i32 @int_varargs_target(i32, ...)5 6define arm_aapcscc i32 @test_call_to_varargs_with_ints(ptr %a, i32 %b) {7; CHECK-LABEL: name: test_call_to_varargs_with_ints8; CHECK-DAG: [[AVREG:%[0-9]+]]:_(p0) = COPY $r09; CHECK-DAG: [[BVREG:%[0-9]+]]:_(s32) = COPY $r110; CHECK: ADJCALLSTACKDOWN 8, 0, 14 /* CC::al */, $noreg, implicit-def $sp, implicit $sp11; CHECK: [[SP1:%[0-9]+]]:_(p0) = COPY $sp12; CHECK: [[OFF1:%[0-9]+]]:_(s32) = G_CONSTANT i32 013; CHECK: [[FI1:%[0-9]+]]:_(p0) = G_PTR_ADD [[SP1]], [[OFF1]](s32)14; CHECK: G_STORE [[BVREG]](s32), [[FI1]](p0){{.*}}store (s32)15; CHECK: [[SP2:%[0-9]+]]:_(p0) = COPY $sp16; CHECK: [[OFF2:%[0-9]+]]:_(s32) = G_CONSTANT i32 417; CHECK: [[FI2:%[0-9]+]]:_(p0) = G_PTR_ADD [[SP2]], [[OFF2]](s32)18; CHECK: G_STORE [[AVREG]](p0), [[FI2]](p0){{.*}}store (p0)19; CHECK-DAG: $r0 = COPY [[BVREG]]20; CHECK-DAG: $r1 = COPY [[AVREG]]21; CHECK-DAG: $r2 = COPY [[BVREG]]22; CHECK-DAG: $r3 = COPY [[AVREG]]23; ARM: BL @int_varargs_target, csr_aapcs, implicit-def $lr, implicit $sp, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r024; THUMB: tBL 14 /* CC::al */, $noreg, @int_varargs_target, csr_aapcs, implicit-def $lr, implicit $sp, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r025; CHECK: [[RVREG:%[0-9]+]]:_(s32) = COPY $r026; CHECK: ADJCALLSTACKUP 8, -1, 14 /* CC::al */, $noreg, implicit-def $sp, implicit $sp27; CHECK: $r0 = COPY [[RVREG]]28; ARM: BX_RET 14 /* CC::al */, $noreg, implicit $r029; THUMB: tBX_RET 14 /* CC::al */, $noreg, implicit $r030entry:31 %r = notail call arm_aapcscc i32(i32, ...) @int_varargs_target(i32 %b, ptr %a, i32 %b, ptr %a, i32 %b, ptr %a)32 ret i32 %r33}34 35declare arm_aapcs_vfpcc float @float_varargs_target(float, double, ...)36 37define arm_aapcs_vfpcc float @test_call_to_varargs_with_floats(float %a, double %b) {38; CHECK-LABEL: name: test_call_to_varargs_with_floats39; CHECK-DAG: [[AVREG:%[0-9]+]]:_(s32) = COPY $s040; CHECK-DAG: [[BVREG:%[0-9]+]]:_(s64) = COPY $d141; CHECK: ADJCALLSTACKDOWN 8, 0, 14 /* CC::al */, $noreg, implicit-def $sp, implicit $sp42; CHECK-DAG: [[B1:%[0-9]+]]:_(s32), [[B2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BVREG]](s64)43; CHECK: [[SP1:%[0-9]+]]:_(p0) = COPY $sp44; CHECK: [[OFF1:%[0-9]+]]:_(s32) = G_CONSTANT i32 045; CHECK: [[FI1:%[0-9]+]]:_(p0) = G_PTR_ADD [[SP1]], [[OFF1]](s32)46; CHECK: G_STORE [[BVREG]](s64), [[FI1]](p0){{.*}}store (s64)47; CHECK-DAG: $r0 = COPY [[AVREG]]48; CHECK-DAG: $r2 = COPY [[B1]]49; CHECK-DAG: $r3 = COPY [[B2]]50; ARM: BL @float_varargs_target, csr_aapcs, implicit-def $lr, implicit $sp, implicit $r0, implicit $r2, implicit $r3, implicit-def $r051; THUMB: tBL 14 /* CC::al */, $noreg, @float_varargs_target, csr_aapcs, implicit-def $lr, implicit $sp, implicit $r0, implicit $r2, implicit $r3, implicit-def $r052; CHECK: [[RVREG:%[0-9]+]]:_(s32) = COPY $r053; CHECK: ADJCALLSTACKUP 8, -1, 14 /* CC::al */, $noreg, implicit-def $sp, implicit $sp54; CHECK: $s0 = COPY [[RVREG]]55; ARM: BX_RET 14 /* CC::al */, $noreg, implicit $s056; THUMB: tBX_RET 14 /* CC::al */, $noreg, implicit $s057entry:58 %r = notail call arm_aapcs_vfpcc float(float, double, ...) @float_varargs_target(float %a, double %b, double %b)59 ret float %r60}61 62define arm_aapcs_vfpcc float @test_call_to_varargs_with_floats_fixed_args_only(float %a, double %b) {63; CHECK-LABEL: name: test_call_to_varargs_with_floats_fixed_args_only64; CHECK-DAG: [[AVREG:%[0-9]+]]:_(s32) = COPY $s065; CHECK-DAG: [[BVREG:%[0-9]+]]:_(s64) = COPY $d166; CHECK: ADJCALLSTACKDOWN 0, 0, 14 /* CC::al */, $noreg, implicit-def $sp, implicit $sp67; CHECK-DAG: $r0 = COPY [[AVREG]]68; CHECK-DAG: [[B1:%[0-9]+]]:_(s32), [[B2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BVREG]](s64)69; CHECK-DAG: $r2 = COPY [[B1]]70; CHECK-DAG: $r3 = COPY [[B2]]71; ARM: BL @float_varargs_target, csr_aapcs, implicit-def $lr, implicit $sp, implicit $r0, implicit $r2, implicit $r3, implicit-def $r072; THUMB: tBL 14 /* CC::al */, $noreg, @float_varargs_target, csr_aapcs, implicit-def $lr, implicit $sp, implicit $r0, implicit $r2, implicit $r3, implicit-def $r073; CHECK: [[RVREG:%[0-9]+]]:_(s32) = COPY $r074; CHECK: ADJCALLSTACKUP 0, -1, 14 /* CC::al */, $noreg, implicit-def $sp, implicit $sp75; CHECK: $s0 = COPY [[RVREG]]76; ARM: BX_RET 14 /* CC::al */, $noreg, implicit $s077; THUMB: tBX_RET 14 /* CC::al */, $noreg, implicit $s078entry:79 %r = notail call arm_aapcs_vfpcc float(float, double, ...) @float_varargs_target(float %a, double %b)80 ret float %r81}82 83define arm_aapcs_vfpcc float @test_indirect_call_to_varargs(ptr %fptr, float %a, double %b) {84; CHECK-LABEL: name: test_indirect_call_to_varargs85; CHECK-DAG: [[FPTRVREG:%[0-9]+]]:gpr(p0) = COPY $r086; CHECK-DAG: [[AVREG:%[0-9]+]]:_(s32) = COPY $s087; CHECK-DAG: [[BVREG:%[0-9]+]]:_(s64) = COPY $d188; CHECK: ADJCALLSTACKDOWN 8, 0, 14 /* CC::al */, $noreg, implicit-def $sp, implicit $sp89; CHECK-DAG: [[B1:%[0-9]+]]:_(s32), [[B2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BVREG]](s64)90; CHECK: [[SP1:%[0-9]+]]:_(p0) = COPY $sp91; CHECK: [[OFF1:%[0-9]+]]:_(s32) = G_CONSTANT i32 092; CHECK: [[FI1:%[0-9]+]]:_(p0) = G_PTR_ADD [[SP1]], [[OFF1]](s32)93; CHECK: G_STORE [[BVREG]](s64), [[FI1]](p0){{.*}}store (s64)94; CHECK-DAG: $r0 = COPY [[AVREG]]95; CHECK-DAG: $r2 = COPY [[B1]]96; CHECK-DAG: $r3 = COPY [[B2]]97; ARM: BLX [[FPTRVREG]](p0), csr_aapcs, implicit-def $lr, implicit $sp, implicit $r0, implicit $r2, implicit $r3, implicit-def $r098; THUMB: tBLXr 14 /* CC::al */, $noreg, [[FPTRVREG]](p0), csr_aapcs, implicit-def $lr, implicit $sp, implicit $r0, implicit $r2, implicit $r3, implicit-def $r099; CHECK: [[RVREG:%[0-9]+]]:_(s32) = COPY $r0100; CHECK: ADJCALLSTACKUP 8, -1, 14 /* CC::al */, $noreg, implicit-def $sp, implicit $sp101; CHECK: $s0 = COPY [[RVREG]]102; ARM: BX_RET 14 /* CC::al */, $noreg, implicit $s0103; THUMB: tBX_RET 14 /* CC::al */, $noreg, implicit $s0104entry:105 %r = notail call arm_aapcs_vfpcc float(float, double, ...) %fptr(float %a, double %b, double %b)106 ret float %r107}108