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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 42# RUN: llc -mtriple arm-- -mattr=+v6 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s3 4---5name: get_inverted6legalized: true7regBankSelected: true8selected: false9tracksRegLiveness: true10registers:11 - { id: 0, class: gprb }12body: |13 bb.0:14 liveins: $r015 ; CHECK-LABEL: name: get_inverted16 ; CHECK: liveins: $r017 ; CHECK-NEXT: {{ $}}18 ; CHECK-NEXT: [[MVNi:%[0-9]+]]:gpr = MVNi 0, 14 /* CC::al */, $noreg, $noreg19 ; CHECK-NEXT: $r0 = COPY [[MVNi]]20 ; CHECK-NEXT: MOVPCLR 14 /* CC::al */, $noreg, implicit $r021 %0:gprb(s32) = G_CONSTANT i32 -122 $r0 = COPY %0(s32)23 MOVPCLR 14 /* CC::al */, $noreg, implicit $r024 25...26