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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52# RUN: llc -O0 -mtriple arm-- -mattr=+vfp4,-neonfp -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s3# RUN: llc -O0 -mtriple thumb-- -mattr=+v6t2,+vfp4,-neonfp -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s4--- |5 define void @test_trunc_s64() { ret void }6 7 define void @test_fadd_s32() { ret void }8 define void @test_fadd_s64() { ret void }9 10 define void @test_fsub_s32() { ret void }11 define void @test_fsub_s64() { ret void }12 13 define void @test_fmul_s32() { ret void }14 define void @test_fmul_s64() { ret void }15 16 define void @test_fdiv_s32() { ret void }17 define void @test_fdiv_s64() { ret void }18 19 define void @test_fneg_s32() { ret void }20 define void @test_fneg_s64() { ret void }21 22 define void @test_fma_s32() { ret void }23 define void @test_fma_s64() { ret void }24 25 define void @test_fpext_s32_to_s64() { ret void }26 define void @test_fptrunc_s64_to_s32() {ret void }27 28 define void @test_fptosi_s32() { ret void }29 define void @test_fptosi_s64() { ret void }30 define void @test_fptoui_s32() { ret void }31 define void @test_fptoui_s64() { ret void }32 33 define void @test_sitofp_s32() { ret void }34 define void @test_sitofp_s64() { ret void }35 define void @test_uitofp_s32() { ret void }36 define void @test_uitofp_s64() { ret void }37 38 define void @test_load_f32() { ret void }39 define void @test_load_f64() { ret void }40 41 define void @test_stores() { ret void }42 43 define void @test_phi_s64() { ret void }44 45 define void @test_soft_fp_double() { ret void }46 47...48---49name: test_trunc_s6450# CHECK-LABEL: name: test_trunc_s6451legalized: true52regBankSelected: true53selected: false54# CHECK: selected: true55registers:56 - { id: 0, class: fprb }57 - { id: 1, class: gprb }58 - { id: 2, class: gprb }59body: |60 bb.0:61 liveins: $r0, $d062 63 %0(s64) = COPY $d064 ; CHECK: [[VREG:%[0-9]+]]:dpr = COPY $d065 66 %2(p0) = COPY $r067 ; CHECK: [[PTR:%[0-9]+]]:gpr = COPY $r068 69 %1(s32) = G_TRUNC %0(s64)70 ; CHECK: [[VREGTRUNC:%[0-9]+]]:gpr, [[UNINTERESTING:%[0-9]+]]:gpr = VMOVRRD [[VREG]]71 72 G_STORE %1(s32), %2 :: (store (s32))73 ; CHECK: STRi12 [[VREGTRUNC]], [[PTR]], 0, 14 /* CC::al */, $noreg74 75 BX_RET 14, $noreg76 ; CHECK: BX_RET 14 /* CC::al */, $noreg77...78---79name: test_fadd_s3280legalized: true81regBankSelected: true82selected: false83registers:84 - { id: 0, class: fprb }85 - { id: 1, class: fprb }86 - { id: 2, class: fprb }87body: |88 bb.0:89 liveins: $s0, $s190 91 ; CHECK-LABEL: name: test_fadd_s3292 ; CHECK: liveins: $s0, $s193 ; CHECK-NEXT: {{ $}}94 ; CHECK-NEXT: [[COPY:%[0-9]+]]:spr = COPY $s095 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:spr = COPY $s196 ; CHECK-NEXT: [[VADDS:%[0-9]+]]:spr = nofpexcept VADDS [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit $fpscr_rm97 ; CHECK-NEXT: $s0 = COPY [[VADDS]]98 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $s099 %0(s32) = COPY $s0100 101 %1(s32) = COPY $s1102 103 %2(s32) = G_FADD %0, %1104 105 $s0 = COPY %2(s32)106 107 BX_RET 14, $noreg, implicit $s0108...109---110name: test_fadd_s64111legalized: true112regBankSelected: true113selected: false114registers:115 - { id: 0, class: fprb }116 - { id: 1, class: fprb }117 - { id: 2, class: fprb }118body: |119 bb.0:120 liveins: $d0, $d1121 122 ; CHECK-LABEL: name: test_fadd_s64123 ; CHECK: liveins: $d0, $d1124 ; CHECK-NEXT: {{ $}}125 ; CHECK-NEXT: [[COPY:%[0-9]+]]:dpr = COPY $d0126 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:dpr = COPY $d1127 ; CHECK-NEXT: [[VADDD:%[0-9]+]]:dpr = nofpexcept VADDD [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit $fpscr_rm128 ; CHECK-NEXT: $d0 = COPY [[VADDD]]129 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $d0130 %0(s64) = COPY $d0131 132 %1(s64) = COPY $d1133 134 %2(s64) = G_FADD %0, %1135 136 $d0 = COPY %2(s64)137 138 BX_RET 14, $noreg, implicit $d0139...140---141name: test_fsub_s32142legalized: true143regBankSelected: true144selected: false145registers:146 - { id: 0, class: fprb }147 - { id: 1, class: fprb }148 - { id: 2, class: fprb }149body: |150 bb.0:151 liveins: $s0, $s1152 153 ; CHECK-LABEL: name: test_fsub_s32154 ; CHECK: liveins: $s0, $s1155 ; CHECK-NEXT: {{ $}}156 ; CHECK-NEXT: [[COPY:%[0-9]+]]:spr = COPY $s0157 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:spr = COPY $s1158 ; CHECK-NEXT: [[VSUBS:%[0-9]+]]:spr = nofpexcept VSUBS [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit $fpscr_rm159 ; CHECK-NEXT: $s0 = COPY [[VSUBS]]160 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $s0161 %0(s32) = COPY $s0162 163 %1(s32) = COPY $s1164 165 %2(s32) = G_FSUB %0, %1166 167 $s0 = COPY %2(s32)168 169 BX_RET 14, $noreg, implicit $s0170...171---172name: test_fsub_s64173legalized: true174regBankSelected: true175selected: false176registers:177 - { id: 0, class: fprb }178 - { id: 1, class: fprb }179 - { id: 2, class: fprb }180body: |181 bb.0:182 liveins: $d0, $d1183 184 ; CHECK-LABEL: name: test_fsub_s64185 ; CHECK: liveins: $d0, $d1186 ; CHECK-NEXT: {{ $}}187 ; CHECK-NEXT: [[COPY:%[0-9]+]]:dpr = COPY $d0188 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:dpr = COPY $d1189 ; CHECK-NEXT: [[VSUBD:%[0-9]+]]:dpr = nofpexcept VSUBD [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit $fpscr_rm190 ; CHECK-NEXT: $d0 = COPY [[VSUBD]]191 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $d0192 %0(s64) = COPY $d0193 194 %1(s64) = COPY $d1195 196 %2(s64) = G_FSUB %0, %1197 198 $d0 = COPY %2(s64)199 200 BX_RET 14, $noreg, implicit $d0201...202---203name: test_fmul_s32204legalized: true205regBankSelected: true206selected: false207registers:208 - { id: 0, class: fprb }209 - { id: 1, class: fprb }210 - { id: 2, class: fprb }211body: |212 bb.0:213 liveins: $s0, $s1214 215 ; CHECK-LABEL: name: test_fmul_s32216 ; CHECK: liveins: $s0, $s1217 ; CHECK-NEXT: {{ $}}218 ; CHECK-NEXT: [[COPY:%[0-9]+]]:spr = COPY $s0219 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:spr = COPY $s1220 ; CHECK-NEXT: [[VMULS:%[0-9]+]]:spr = nofpexcept VMULS [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit $fpscr_rm221 ; CHECK-NEXT: $s0 = COPY [[VMULS]]222 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $s0223 %0(s32) = COPY $s0224 225 %1(s32) = COPY $s1226 227 %2(s32) = G_FMUL %0, %1228 229 $s0 = COPY %2(s32)230 231 BX_RET 14, $noreg, implicit $s0232...233---234name: test_fmul_s64235legalized: true236regBankSelected: true237selected: false238registers:239 - { id: 0, class: fprb }240 - { id: 1, class: fprb }241 - { id: 2, class: fprb }242body: |243 bb.0:244 liveins: $d0, $d1245 246 ; CHECK-LABEL: name: test_fmul_s64247 ; CHECK: liveins: $d0, $d1248 ; CHECK-NEXT: {{ $}}249 ; CHECK-NEXT: [[COPY:%[0-9]+]]:dpr = COPY $d0250 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:dpr = COPY $d1251 ; CHECK-NEXT: [[VMULD:%[0-9]+]]:dpr = nofpexcept VMULD [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit $fpscr_rm252 ; CHECK-NEXT: $d0 = COPY [[VMULD]]253 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $d0254 %0(s64) = COPY $d0255 256 %1(s64) = COPY $d1257 258 %2(s64) = G_FMUL %0, %1259 260 $d0 = COPY %2(s64)261 262 BX_RET 14, $noreg, implicit $d0263...264---265name: test_fdiv_s32266legalized: true267regBankSelected: true268selected: false269registers:270 - { id: 0, class: fprb }271 - { id: 1, class: fprb }272 - { id: 2, class: fprb }273body: |274 bb.0:275 liveins: $s0, $s1276 277 ; CHECK-LABEL: name: test_fdiv_s32278 ; CHECK: liveins: $s0, $s1279 ; CHECK-NEXT: {{ $}}280 ; CHECK-NEXT: [[COPY:%[0-9]+]]:spr = COPY $s0281 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:spr = COPY $s1282 ; CHECK-NEXT: [[VDIVS:%[0-9]+]]:spr = nofpexcept VDIVS [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit $fpscr_rm283 ; CHECK-NEXT: $s0 = COPY [[VDIVS]]284 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $s0285 %0(s32) = COPY $s0286 287 %1(s32) = COPY $s1288 289 %2(s32) = G_FDIV %0, %1290 291 $s0 = COPY %2(s32)292 293 BX_RET 14, $noreg, implicit $s0294...295---296name: test_fdiv_s64297legalized: true298regBankSelected: true299selected: false300registers:301 - { id: 0, class: fprb }302 - { id: 1, class: fprb }303 - { id: 2, class: fprb }304body: |305 bb.0:306 liveins: $d0, $d1307 308 ; CHECK-LABEL: name: test_fdiv_s64309 ; CHECK: liveins: $d0, $d1310 ; CHECK-NEXT: {{ $}}311 ; CHECK-NEXT: [[COPY:%[0-9]+]]:dpr = COPY $d0312 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:dpr = COPY $d1313 ; CHECK-NEXT: [[VDIVD:%[0-9]+]]:dpr = nofpexcept VDIVD [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit $fpscr_rm314 ; CHECK-NEXT: $d0 = COPY [[VDIVD]]315 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $d0316 %0(s64) = COPY $d0317 318 %1(s64) = COPY $d1319 320 %2(s64) = G_FDIV %0, %1321 322 $d0 = COPY %2(s64)323 324 BX_RET 14, $noreg, implicit $d0325...326---327name: test_fneg_s32328legalized: true329regBankSelected: true330selected: false331registers:332 - { id: 0, class: fprb }333 - { id: 1, class: fprb }334body: |335 bb.0:336 liveins: $s0337 338 ; CHECK-LABEL: name: test_fneg_s32339 ; CHECK: liveins: $s0340 ; CHECK-NEXT: {{ $}}341 ; CHECK-NEXT: [[COPY:%[0-9]+]]:spr = COPY $s0342 ; CHECK-NEXT: [[VNEGS:%[0-9]+]]:spr = VNEGS [[COPY]], 14 /* CC::al */, $noreg343 ; CHECK-NEXT: $s0 = COPY [[VNEGS]]344 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $s0345 %0(s32) = COPY $s0346 347 %1(s32) = G_FNEG %0348 349 $s0 = COPY %1(s32)350 351 BX_RET 14, $noreg, implicit $s0352...353---354name: test_fneg_s64355legalized: true356regBankSelected: true357selected: false358registers:359 - { id: 0, class: fprb }360 - { id: 1, class: fprb }361 - { id: 2, class: fprb }362body: |363 bb.0:364 liveins: $d0365 366 ; CHECK-LABEL: name: test_fneg_s64367 ; CHECK: liveins: $d0368 ; CHECK-NEXT: {{ $}}369 ; CHECK-NEXT: [[COPY:%[0-9]+]]:dpr = COPY $d0370 ; CHECK-NEXT: [[VNEGD:%[0-9]+]]:dpr = VNEGD [[COPY]], 14 /* CC::al */, $noreg371 ; CHECK-NEXT: $d0 = COPY [[VNEGD]]372 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $d0373 %0(s64) = COPY $d0374 375 %1(s64) = G_FNEG %0376 377 $d0 = COPY %1(s64)378 379 BX_RET 14, $noreg, implicit $d0380...381---382name: test_fma_s32383legalized: true384regBankSelected: true385selected: false386registers:387 - { id: 0, class: fprb }388 - { id: 1, class: fprb }389 - { id: 2, class: fprb }390 - { id: 3, class: fprb }391body: |392 bb.0:393 liveins: $s0, $s1, $s2394 395 ; CHECK-LABEL: name: test_fma_s32396 ; CHECK: liveins: $s0, $s1, $s2397 ; CHECK-NEXT: {{ $}}398 ; CHECK-NEXT: [[COPY:%[0-9]+]]:spr = COPY $s0399 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:spr = COPY $s1400 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:spr = COPY $s2401 ; CHECK-NEXT: [[VFMAS:%[0-9]+]]:spr = nofpexcept VFMAS [[COPY2]], [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit $fpscr_rm402 ; CHECK-NEXT: $s0 = COPY [[VFMAS]]403 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $s0404 %0(s32) = COPY $s0405 406 %1(s32) = COPY $s1407 408 %2(s32) = COPY $s2409 410 %3(s32) = G_FMA %0, %1, %2411 412 $s0 = COPY %3(s32)413 414 BX_RET 14, $noreg, implicit $s0415...416---417name: test_fma_s64418legalized: true419regBankSelected: true420selected: false421registers:422 - { id: 0, class: fprb }423 - { id: 1, class: fprb }424 - { id: 2, class: fprb }425 - { id: 3, class: fprb }426body: |427 bb.0:428 liveins: $d0, $d1, $d2429 430 ; CHECK-LABEL: name: test_fma_s64431 ; CHECK: liveins: $d0, $d1, $d2432 ; CHECK-NEXT: {{ $}}433 ; CHECK-NEXT: [[COPY:%[0-9]+]]:dpr = COPY $d0434 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:dpr = COPY $d1435 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:dpr = COPY $d2436 ; CHECK-NEXT: [[VFMAD:%[0-9]+]]:dpr = nofpexcept VFMAD [[COPY2]], [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit $fpscr_rm437 ; CHECK-NEXT: $d0 = COPY [[VFMAD]]438 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $d0439 %0(s64) = COPY $d0440 441 %1(s64) = COPY $d1442 443 %2(s64) = COPY $d2444 445 %3(s64) = G_FMA %0, %1, %2446 447 $d0 = COPY %3(s64)448 449 BX_RET 14, $noreg, implicit $d0450...451---452name: test_fpext_s32_to_s64453legalized: true454regBankSelected: true455selected: false456registers:457 - { id: 0, class: fprb }458 - { id: 1, class: fprb }459body: |460 bb.0:461 liveins: $s0462 463 ; CHECK-LABEL: name: test_fpext_s32_to_s64464 ; CHECK: liveins: $s0465 ; CHECK-NEXT: {{ $}}466 ; CHECK-NEXT: [[COPY:%[0-9]+]]:spr = COPY $s0467 ; CHECK-NEXT: [[VCVTDS:%[0-9]+]]:dpr = nofpexcept VCVTDS [[COPY]], 14 /* CC::al */, $noreg, implicit $fpscr_rm468 ; CHECK-NEXT: $d0 = COPY [[VCVTDS]]469 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $d0470 %0(s32) = COPY $s0471 472 %1(s64) = G_FPEXT %0(s32)473 474 $d0 = COPY %1(s64)475 476 BX_RET 14, $noreg, implicit $d0477...478---479name: test_fptrunc_s64_to_s32480legalized: true481regBankSelected: true482selected: false483registers:484 - { id: 0, class: fprb }485 - { id: 1, class: fprb }486body: |487 bb.0:488 liveins: $d0489 490 ; CHECK-LABEL: name: test_fptrunc_s64_to_s32491 ; CHECK: liveins: $d0492 ; CHECK-NEXT: {{ $}}493 ; CHECK-NEXT: [[COPY:%[0-9]+]]:dpr = COPY $d0494 ; CHECK-NEXT: [[VCVTSD:%[0-9]+]]:spr = nofpexcept VCVTSD [[COPY]], 14 /* CC::al */, $noreg, implicit $fpscr_rm495 ; CHECK-NEXT: $s0 = COPY [[VCVTSD]]496 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $s0497 %0(s64) = COPY $d0498 499 %1(s32) = G_FPTRUNC %0(s64)500 501 $s0 = COPY %1(s32)502 503 BX_RET 14, $noreg, implicit $s0504...505---506name: test_fptosi_s32507legalized: true508regBankSelected: true509selected: false510registers:511 - { id: 0, class: fprb }512 - { id: 1, class: gprb }513body: |514 bb.0:515 liveins: $s0516 517 ; CHECK-LABEL: name: test_fptosi_s32518 ; CHECK: liveins: $s0519 ; CHECK-NEXT: {{ $}}520 ; CHECK-NEXT: [[COPY:%[0-9]+]]:spr = COPY $s0521 ; CHECK-NEXT: [[VTOSIZS:%[0-9]+]]:spr = nofpexcept VTOSIZS [[COPY]], 14 /* CC::al */, $noreg522 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY [[VTOSIZS]]523 ; CHECK-NEXT: $r0 = COPY [[COPY1]]524 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $r0525 %0(s32) = COPY $s0526 527 %1(s32) = G_FPTOSI %0(s32)528 529 $r0 = COPY %1(s32)530 531 BX_RET 14, $noreg, implicit $r0532...533---534name: test_fptosi_s64535legalized: true536regBankSelected: true537selected: false538registers:539 - { id: 0, class: fprb }540 - { id: 1, class: gprb }541body: |542 bb.0:543 liveins: $d0544 545 ; CHECK-LABEL: name: test_fptosi_s64546 ; CHECK: liveins: $d0547 ; CHECK-NEXT: {{ $}}548 ; CHECK-NEXT: [[COPY:%[0-9]+]]:dpr = COPY $d0549 ; CHECK-NEXT: [[VTOSIZD:%[0-9]+]]:spr = nofpexcept VTOSIZD [[COPY]], 14 /* CC::al */, $noreg550 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY [[VTOSIZD]]551 ; CHECK-NEXT: $r0 = COPY [[COPY1]]552 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $r0553 %0(s64) = COPY $d0554 555 %1(s32) = G_FPTOSI %0(s64)556 557 $r0 = COPY %1(s32)558 559 BX_RET 14, $noreg, implicit $r0560...561---562name: test_fptoui_s32563legalized: true564regBankSelected: true565selected: false566registers:567 - { id: 0, class: fprb }568 - { id: 1, class: gprb }569body: |570 bb.0:571 liveins: $s0572 573 ; CHECK-LABEL: name: test_fptoui_s32574 ; CHECK: liveins: $s0575 ; CHECK-NEXT: {{ $}}576 ; CHECK-NEXT: [[COPY:%[0-9]+]]:spr = COPY $s0577 ; CHECK-NEXT: [[VTOUIZS:%[0-9]+]]:spr = nofpexcept VTOUIZS [[COPY]], 14 /* CC::al */, $noreg578 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY [[VTOUIZS]]579 ; CHECK-NEXT: $r0 = COPY [[COPY1]]580 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $r0581 %0(s32) = COPY $s0582 583 %1(s32) = G_FPTOUI %0(s32)584 585 $r0 = COPY %1(s32)586 587 BX_RET 14, $noreg, implicit $r0588...589---590name: test_fptoui_s64591legalized: true592regBankSelected: true593selected: false594registers:595 - { id: 0, class: fprb }596 - { id: 1, class: gprb }597body: |598 bb.0:599 liveins: $d0600 601 ; CHECK-LABEL: name: test_fptoui_s64602 ; CHECK: liveins: $d0603 ; CHECK-NEXT: {{ $}}604 ; CHECK-NEXT: [[COPY:%[0-9]+]]:dpr = COPY $d0605 ; CHECK-NEXT: [[VTOUIZD:%[0-9]+]]:spr = nofpexcept VTOUIZD [[COPY]], 14 /* CC::al */, $noreg606 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY [[VTOUIZD]]607 ; CHECK-NEXT: $r0 = COPY [[COPY1]]608 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $r0609 %0(s64) = COPY $d0610 611 %1(s32) = G_FPTOUI %0(s64)612 613 $r0 = COPY %1(s32)614 615 BX_RET 14, $noreg, implicit $r0616...617---618name: test_sitofp_s32619legalized: true620regBankSelected: true621selected: false622registers:623 - { id: 0, class: gprb }624 - { id: 1, class: fprb }625body: |626 bb.0:627 liveins: $r0628 629 ; CHECK-LABEL: name: test_sitofp_s32630 ; CHECK: liveins: $r0631 ; CHECK-NEXT: {{ $}}632 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $r0633 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:spr = COPY [[COPY]]634 ; CHECK-NEXT: [[VSITOS:%[0-9]+]]:spr = nofpexcept VSITOS [[COPY1]], 14 /* CC::al */, $noreg635 ; CHECK-NEXT: $s0 = COPY [[VSITOS]]636 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $s0637 %0(s32) = COPY $r0638 639 %1(s32) = G_SITOFP %0(s32)640 641 $s0 = COPY %1(s32)642 643 BX_RET 14, $noreg, implicit $s0644...645---646name: test_sitofp_s64647legalized: true648regBankSelected: true649selected: false650registers:651 - { id: 0, class: gprb }652 - { id: 1, class: fprb }653body: |654 bb.0:655 liveins: $r0656 657 ; CHECK-LABEL: name: test_sitofp_s64658 ; CHECK: liveins: $r0659 ; CHECK-NEXT: {{ $}}660 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $r0661 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:spr = COPY [[COPY]]662 ; CHECK-NEXT: [[VSITOD:%[0-9]+]]:dpr = nofpexcept VSITOD [[COPY1]], 14 /* CC::al */, $noreg663 ; CHECK-NEXT: $d0 = COPY [[VSITOD]]664 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $d0665 %0(s32) = COPY $r0666 667 %1(s64) = G_SITOFP %0(s32)668 669 $d0 = COPY %1(s64)670 671 BX_RET 14, $noreg, implicit $d0672...673---674name: test_uitofp_s32675legalized: true676regBankSelected: true677selected: false678registers:679 - { id: 0, class: gprb }680 - { id: 1, class: fprb }681body: |682 bb.0:683 liveins: $r0684 685 ; CHECK-LABEL: name: test_uitofp_s32686 ; CHECK: liveins: $r0687 ; CHECK-NEXT: {{ $}}688 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $r0689 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:spr = COPY [[COPY]]690 ; CHECK-NEXT: [[VUITOS:%[0-9]+]]:spr = nofpexcept VUITOS [[COPY1]], 14 /* CC::al */, $noreg691 ; CHECK-NEXT: $s0 = COPY [[VUITOS]]692 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $s0693 %0(s32) = COPY $r0694 695 %1(s32) = G_UITOFP %0(s32)696 697 $s0 = COPY %1(s32)698 699 BX_RET 14, $noreg, implicit $s0700...701---702name: test_uitofp_s64703legalized: true704regBankSelected: true705selected: false706registers:707 - { id: 0, class: gprb }708 - { id: 1, class: fprb }709body: |710 bb.0:711 liveins: $r0712 713 ; CHECK-LABEL: name: test_uitofp_s64714 ; CHECK: liveins: $r0715 ; CHECK-NEXT: {{ $}}716 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $r0717 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:spr = COPY [[COPY]]718 ; CHECK-NEXT: [[VUITOD:%[0-9]+]]:dpr = nofpexcept VUITOD [[COPY1]], 14 /* CC::al */, $noreg719 ; CHECK-NEXT: $d0 = COPY [[VUITOD]]720 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $d0721 %0(s32) = COPY $r0722 723 %1(s64) = G_UITOFP %0(s32)724 725 $d0 = COPY %1(s64)726 727 BX_RET 14, $noreg, implicit $d0728...729---730name: test_load_f32731legalized: true732regBankSelected: true733selected: false734registers:735 - { id: 0, class: gprb }736 - { id: 1, class: fprb }737body: |738 bb.0:739 liveins: $r0740 741 ; CHECK-LABEL: name: test_load_f32742 ; CHECK: liveins: $r0743 ; CHECK-NEXT: {{ $}}744 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $r0745 ; CHECK-NEXT: [[VLDRS:%[0-9]+]]:spr = VLDRS [[COPY]], 0, 14 /* CC::al */, $noreg :: (load (s32))746 ; CHECK-NEXT: $s0 = COPY [[VLDRS]]747 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $s0748 %0(p0) = COPY $r0749 750 %1(s32) = G_LOAD %0(p0) :: (load (s32))751 752 $s0 = COPY %1753 754 BX_RET 14, $noreg, implicit $s0755...756---757name: test_load_f64758legalized: true759regBankSelected: true760selected: false761registers:762 - { id: 0, class: gprb }763 - { id: 1, class: fprb }764body: |765 bb.0:766 liveins: $r0767 768 ; CHECK-LABEL: name: test_load_f64769 ; CHECK: liveins: $r0770 ; CHECK-NEXT: {{ $}}771 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $r0772 ; CHECK-NEXT: [[VLDRD:%[0-9]+]]:dpr = VLDRD [[COPY]], 0, 14 /* CC::al */, $noreg :: (load (s64))773 ; CHECK-NEXT: $d0 = COPY [[VLDRD]]774 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $d0775 %0(p0) = COPY $r0776 777 %1(s64) = G_LOAD %0(p0) :: (load (s64))778 779 $d0 = COPY %1780 781 BX_RET 14, $noreg, implicit $d0782...783---784name: test_stores785legalized: true786regBankSelected: true787selected: false788registers:789 - { id: 0, class: gprb }790 - { id: 1, class: fprb }791 - { id: 2, class: fprb }792body: |793 bb.0:794 liveins: $r0, $s0, $d0795 796 ; CHECK-LABEL: name: test_stores797 ; CHECK: liveins: $r0, $s0, $d0798 ; CHECK-NEXT: {{ $}}799 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $r0800 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:spr = COPY $s0801 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:dpr = COPY $d2802 ; CHECK-NEXT: VSTRS [[COPY1]], [[COPY]], 0, 14 /* CC::al */, $noreg :: (store (s32))803 ; CHECK-NEXT: VSTRD [[COPY2]], [[COPY]], 0, 14 /* CC::al */, $noreg :: (store (s64))804 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg805 %0(p0) = COPY $r0806 %1(s32) = COPY $s0807 %2(s64) = COPY $d2808 809 G_STORE %1(s32), %0(p0) :: (store (s32))810 811 G_STORE %2(s64), %0(p0) :: (store (s64))812 813 BX_RET 14, $noreg814...815---816name: test_phi_s64817# CHECK-LABEL: name: test_phi_s64818legalized: true819regBankSelected: true820selected: false821# CHECK: selected: true822tracksRegLiveness: true823registers:824 - { id: 0, class: gprb }825 - { id: 1, class: gprb }826 - { id: 2, class: fprb }827 - { id: 3, class: fprb }828 - { id: 4, class: fprb }829body: |830 bb.0:831 ; CHECK: [[BB1:bb.0]]:832 successors: %bb.1(0x40000000), %bb.2(0x40000000)833 liveins: $r0, $d0, $d1834 835 %0(s32) = COPY $r0836 %1(s1) = G_TRUNC %0(s32)837 838 %2(s64) = COPY $d0839 %3(s64) = COPY $d1840 ; CHECK: [[V1:%[0-9]+]]:dpr = COPY $d0841 ; CHECK: [[V2:%[0-9]+]]:dpr = COPY $d1842 843 G_BRCOND %1(s1), %bb.1844 G_BR %bb.2845 846 bb.1:847 ; CHECK: [[BB2:bb.1]]:848 successors: %bb.2(0x80000000)849 850 G_BR %bb.2851 ; CHECK: B %bb.2852 853 bb.2:854 ; CHECK: bb.2855 %4(s64) = G_PHI %2(s64), %bb.0, %3(s64), %bb.1856 ; CHECK: {{%[0-9]+}}:dpr = PHI [[V1]], %[[BB1]], [[V2]], %[[BB2]]857 858 $d0 = COPY %4(s64)859 BX_RET 14 /* CC::al */, $noreg, implicit $d0860...861---862name: test_soft_fp_double863legalized: true864regBankSelected: true865selected: false866registers:867 - { id: 0, class: gprb }868 - { id: 1, class: gprb }869 - { id: 2, class: fprb }870 - { id: 3, class: gprb }871 - { id: 4, class: gprb }872body: |873 bb.0:874 liveins: $r0, $r1, $r2, $r3875 876 ; CHECK-LABEL: name: test_soft_fp_double877 ; CHECK: liveins: $r0, $r1, $r2, $r3878 ; CHECK-NEXT: {{ $}}879 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $r2880 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $r3881 ; CHECK-NEXT: [[VMOVDRR:%[0-9]+]]:dpr = VMOVDRR [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg882 ; CHECK-NEXT: [[VMOVRRD:%[0-9]+]]:gpr, [[VMOVRRD1:%[0-9]+]]:gpr = VMOVRRD [[VMOVDRR]], 14 /* CC::al */, $noreg883 ; CHECK-NEXT: $r0 = COPY [[VMOVRRD]]884 ; CHECK-NEXT: $r1 = COPY [[VMOVRRD1]]885 ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $r0, implicit $r1886 %0(s32) = COPY $r2887 888 %1(s32) = COPY $r3889 890 %2(s64) = G_MERGE_VALUES %0(s32), %1(s32)891 892 %3(s32), %4(s32) = G_UNMERGE_VALUES %2(s64)893 894 $r0 = COPY %3895 896 $r1 = COPY %4897 898 BX_RET 14, $noreg, implicit $r0, implicit $r1899...900