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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple thumb-- -mattr=+v6t2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s3--- |4 define void @test_s8() { ret void }5 define void @test_s16() { ret void }6 define void @test_s32() { ret void }7 8 define void @test_gep() { ret void }9 10 define void @test_load_from_stack() { ret void }11...12---13name: test_s814legalized: true15regBankSelected: true16selected: false17registers:18 - { id: 0, class: gprb }19 - { id: 1, class: gprb }20body: |21 bb.0:22 liveins: $r023 24 ; CHECK-LABEL: name: test_s825 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r026 ; CHECK: [[t2LDRBi12_:%[0-9]+]]:rgpr = t2LDRBi12 [[COPY]], 0, 14 /* CC::al */, $noreg :: (load (s8))27 ; CHECK: t2STRBi12 [[t2LDRBi12_]], [[COPY]], 0, 14 /* CC::al */, $noreg :: (store (s8))28 ; CHECK: BX_RET 14 /* CC::al */, $noreg29 %0(p0) = COPY $r030 31 %1(s8) = G_LOAD %0(p0) :: (load (s8))32 33 G_STORE %1(s8), %0(p0) :: (store (s8))34 35 BX_RET 14, $noreg36...37---38name: test_s1639legalized: true40regBankSelected: true41selected: false42registers:43 - { id: 0, class: gprb }44 - { id: 1, class: gprb }45body: |46 bb.0:47 liveins: $r048 49 ; CHECK-LABEL: name: test_s1650 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r051 ; CHECK: [[t2LDRHi12_:%[0-9]+]]:rgpr = t2LDRHi12 [[COPY]], 0, 14 /* CC::al */, $noreg :: (load (s16))52 ; CHECK: t2STRHi12 [[t2LDRHi12_]], [[COPY]], 0, 14 /* CC::al */, $noreg :: (store (s16))53 ; CHECK: BX_RET 14 /* CC::al */, $noreg54 %0(p0) = COPY $r055 56 %1(s16) = G_LOAD %0(p0) :: (load (s16))57 58 G_STORE %1(s16), %0(p0) :: (store (s16))59 60 BX_RET 14, $noreg61...62---63name: test_s3264legalized: true65regBankSelected: true66selected: false67registers:68 - { id: 0, class: gprb }69 - { id: 1, class: gprb }70body: |71 bb.0:72 liveins: $r073 74 ; CHECK-LABEL: name: test_s3275 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r076 ; CHECK: [[t2LDRi12_:%[0-9]+]]:gpr = t2LDRi12 [[COPY]], 0, 14 /* CC::al */, $noreg :: (load (s32))77 ; CHECK: t2STRi12 [[t2LDRi12_]], [[COPY]], 0, 14 /* CC::al */, $noreg :: (store (s32))78 ; CHECK: BX_RET 14 /* CC::al */, $noreg79 %0(p0) = COPY $r080 81 %1(s32) = G_LOAD %0(p0) :: (load (s32))82 83 G_STORE %1(s32), %0(p0) :: (store (s32))84 85 BX_RET 14, $noreg86...87---88name: test_gep89legalized: true90regBankSelected: true91selected: false92registers:93 - { id: 0, class: gprb }94 - { id: 1, class: gprb }95 - { id: 2, class: gprb }96body: |97 bb.0:98 liveins: $r0, $r199 100 ; CHECK-LABEL: name: test_gep101 ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0102 ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1103 ; CHECK: [[t2ADDrr:%[0-9]+]]:gprnopc = t2ADDrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, $noreg104 ; CHECK: $r0 = COPY [[t2ADDrr]]105 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0106 %0(p0) = COPY $r0107 108 %1(s32) = COPY $r1109 110 %2(p0) = G_PTR_ADD %0, %1(s32)111 112 $r0 = COPY %2(p0)113 114 BX_RET 14, $noreg, implicit $r0115...116---117name: test_load_from_stack118legalized: true119regBankSelected: true120selected: false121registers:122 - { id: 0, class: gprb }123 - { id: 1, class: gprb }124 - { id: 2, class: gprb }125 - { id: 3, class: gprb }126 - { id: 4, class: gprb }127fixedStack:128 - { id: 0, offset: 0, size: 1, alignment: 4, isImmutable: true, isAliased: false }129 - { id: 1, offset: 4, size: 4, alignment: 4, isImmutable: true, isAliased: false }130 - { id: 2, offset: 8, size: 4, alignment: 4, isImmutable: true, isAliased: false }131body: |132 bb.0:133 liveins: $r0, $r1, $r2, $r3134 135 ; CHECK-LABEL: name: test_load_from_stack136 ; CHECK: [[t2ADDri:%[0-9]+]]:rgpr = t2ADDri %fixed-stack.0, 0, 14 /* CC::al */, $noreg, $noreg137 ; CHECK: [[t2LDRi12_:%[0-9]+]]:gpr = t2LDRi12 [[t2ADDri]], 0, 14 /* CC::al */, $noreg :: (load (s32))138 ; CHECK: $r0 = COPY [[t2LDRi12_]]139 ; CHECK: [[t2ADDri1:%[0-9]+]]:rgpr = t2ADDri %fixed-stack.2, 0, 14 /* CC::al */, $noreg, $noreg140 ; CHECK: [[t2LDRBi12_:%[0-9]+]]:gprnopc = t2LDRBi12 [[t2ADDri1]], 0, 14 /* CC::al */, $noreg :: (load (s8))141 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY [[t2LDRBi12_]]142 ; CHECK: $r0 = COPY [[COPY]]143 ; CHECK: BX_RET 14 /* CC::al */, $noreg144 %0(p0) = G_FRAME_INDEX %fixed-stack.2145 146 %1(s32) = G_LOAD %0(p0) :: (load (s32))147 148 $r0 = COPY %1149 150 %2(p0) = G_FRAME_INDEX %fixed-stack.0151 152 %3(s8) = G_LOAD %2(p0) :: (load (s8))153 154 %4(s32) = G_ANYEXT %3(s8)155 156 $r0 = COPY %4157 158 BX_RET 14, $noreg159...160