914 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -mtriple=armv8m.main-none-none-eabi -mattr=+dsp < %s -arm-parallel-dsp -verify -S | FileCheck %s3;4; Alias check: check that the rewrite isn't triggered when there's a store5; instruction possibly aliasing any mul load operands; arguments are passed6; without 'restrict' enabled.7;8define dso_local i32 @no_restrict(i32 %arg, ptr nocapture %arg1, ptr nocapture readonly %arg2, ptr nocapture readonly %arg3) {9; CHECK-LABEL: @no_restrict(10; CHECK-NEXT: entry:11; CHECK-NEXT: [[CMP24:%.*]] = icmp sgt i32 [[ARG:%.*]], 012; CHECK-NEXT: br i1 [[CMP24]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]13; CHECK: for.body.preheader:14; CHECK-NEXT: [[DOTPRE:%.*]] = load i16, ptr [[ARG3:%.*]], align 215; CHECK-NEXT: [[DOTPRE27:%.*]] = load i16, ptr [[ARG2:%.*]], align 216; CHECK-NEXT: br label [[FOR_BODY:%.*]]17; CHECK: for.cond.cleanup:18; CHECK-NEXT: [[MAC1_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[ADD11:%.*]], [[FOR_BODY]] ]19; CHECK-NEXT: ret i32 [[MAC1_0_LCSSA]]20; CHECK: for.body:21; CHECK-NEXT: [[MAC1_026:%.*]] = phi i32 [ [[ADD11]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ]22; CHECK-NEXT: [[I_025:%.*]] = phi i32 [ [[ADD:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ]23; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[I_025]]24; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 225; CHECK-NEXT: store i16 42, ptr [[ARRAYIDX]], align 226; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[I_025]], 127; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[ADD]]28; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[ARRAYIDX1]], align 229; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[I_025]]30; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr [[ARRAYIDX3]], align 231; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP2]] to i3232; CHECK-NEXT: [[CONV4:%.*]] = sext i16 [[TMP0]] to i3233; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[CONV]], [[CONV4]]34; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[ADD]]35; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr [[ARRAYIDX6]], align 236; CHECK-NEXT: [[CONV7:%.*]] = sext i16 [[TMP3]] to i3237; CHECK-NEXT: [[CONV8:%.*]] = sext i16 [[TMP1]] to i3238; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[CONV7]], [[CONV8]]39; CHECK-NEXT: [[ADD10:%.*]] = add i32 [[MUL]], [[MAC1_026]]40; CHECK-NEXT: [[ADD11]] = add i32 [[MUL9]], [[ADD10]]41; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[ADD]], [[ARG]]42; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP]]43;44entry:45 %cmp24 = icmp sgt i32 %arg, 046 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup47 48for.body.preheader:49 %.pre = load i16, ptr %arg3, align 250 %.pre27 = load i16, ptr %arg2, align 251 br label %for.body52 53for.cond.cleanup:54 %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ]55 ret i32 %mac1.0.lcssa56 57for.body:58 %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ]59 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]60 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.02561 %0 = load i16, ptr %arrayidx, align 262 63; Store inserted here, aliasing with arrayidx, arrayidx1, arrayidx364 store i16 42, ptr %arrayidx, align 265 66 %add = add nuw nsw i32 %i.025, 167 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add68 %1 = load i16, ptr %arrayidx1, align 269 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.02570 %2 = load i16, ptr %arrayidx3, align 271 %conv = sext i16 %2 to i3272 %conv4 = sext i16 %0 to i3273 %mul = mul nsw i32 %conv, %conv474 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add75 %3 = load i16, ptr %arrayidx6, align 276 %conv7 = sext i16 %3 to i3277 %conv8 = sext i16 %1 to i3278 %mul9 = mul nsw i32 %conv7, %conv879 %add10 = add i32 %mul, %mac1.02680 %add11 = add i32 %mul9, %add1081 %exitcond = icmp ne i32 %add, %arg82 br i1 %exitcond, label %for.body, label %for.cond.cleanup83}84 85; Alias check: check that the rewrite isn't triggered when there's a store86; aliasing one of the mul load operands. Arguments are now annotated with87; 'noalias'.88;89define dso_local i32 @restrict(i32 %arg, ptr noalias %arg1, ptr noalias readonly %arg2, ptr noalias %arg3) {90; CHECK-LABEL: @restrict(91; CHECK-NEXT: entry:92; CHECK-NEXT: [[CMP24:%.*]] = icmp sgt i32 [[ARG:%.*]], 093; CHECK-NEXT: br i1 [[CMP24]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]94; CHECK: for.body.preheader:95; CHECK-NEXT: [[DOTPRE:%.*]] = load i16, ptr [[ARG3:%.*]], align 296; CHECK-NEXT: [[DOTPRE27:%.*]] = load i16, ptr [[ARG2:%.*]], align 297; CHECK-NEXT: br label [[FOR_BODY:%.*]]98; CHECK: for.cond.cleanup:99; CHECK-NEXT: [[MAC1_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[ADD11:%.*]], [[FOR_BODY]] ]100; CHECK-NEXT: ret i32 [[MAC1_0_LCSSA]]101; CHECK: for.body:102; CHECK-NEXT: [[MAC1_026:%.*]] = phi i32 [ [[ADD11]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ]103; CHECK-NEXT: [[I_025:%.*]] = phi i32 [ [[ADD:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ]104; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[I_025]]105; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 2106; CHECK-NEXT: store i16 42, ptr [[ARRAYIDX]], align 2107; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[I_025]], 1108; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[ADD]]109; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[ARRAYIDX1]], align 2110; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[I_025]]111; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr [[ARRAYIDX3]], align 2112; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP2]] to i32113; CHECK-NEXT: [[CONV4:%.*]] = sext i16 [[TMP0]] to i32114; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[CONV]], [[CONV4]]115; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[ADD]]116; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr [[ARRAYIDX6]], align 2117; CHECK-NEXT: [[CONV7:%.*]] = sext i16 [[TMP3]] to i32118; CHECK-NEXT: [[CONV8:%.*]] = sext i16 [[TMP1]] to i32119; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[CONV7]], [[CONV8]]120; CHECK-NEXT: [[ADD10:%.*]] = add i32 [[MUL]], [[MAC1_026]]121; CHECK-NEXT: [[ADD11]] = add i32 [[MUL9]], [[ADD10]]122; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[ADD]], [[ARG]]123; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP]]124;125entry:126 %cmp24 = icmp sgt i32 %arg, 0127 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup128 129for.body.preheader:130 %.pre = load i16, ptr %arg3, align 2131 %.pre27 = load i16, ptr %arg2, align 2132 br label %for.body133 134for.cond.cleanup:135 %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ]136 ret i32 %mac1.0.lcssa137 138for.body:139 %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ]140 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]141 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.025142 %0 = load i16, ptr %arrayidx, align 2143 144; Store inserted here, aliasing only with loads from 'arrayidx'.145 store i16 42, ptr %arrayidx, align 2146 147 %add = add nuw nsw i32 %i.025, 1148 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add149 %1 = load i16, ptr %arrayidx1, align 2150 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.025151 %2 = load i16, ptr %arrayidx3, align 2152 %conv = sext i16 %2 to i32153 %conv4 = sext i16 %0 to i32154 %mul = mul nsw i32 %conv, %conv4155 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add156 %3 = load i16, ptr %arrayidx6, align 2157 %conv7 = sext i16 %3 to i32158 %conv8 = sext i16 %1 to i32159 %mul9 = mul nsw i32 %conv7, %conv8160 %add10 = add i32 %mul, %mac1.026161 162; Here the Mul is the LHS, and the Add the RHS.163 %add11 = add i32 %mul9, %add10164 165 %exitcond = icmp ne i32 %add, %arg166 br i1 %exitcond, label %for.body, label %for.cond.cleanup167}168 169define dso_local i32 @store_dominates_all(i32 %arg, ptr nocapture %arg1, ptr nocapture readonly %arg2, ptr nocapture readonly %arg3) {170; CHECK-LABEL: @store_dominates_all(171; CHECK-NEXT: entry:172; CHECK-NEXT: [[CMP24:%.*]] = icmp sgt i32 [[ARG:%.*]], 0173; CHECK-NEXT: br i1 [[CMP24]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]174; CHECK: for.body.preheader:175; CHECK-NEXT: [[DOTPRE:%.*]] = load i16, ptr [[ARG3:%.*]], align 2176; CHECK-NEXT: [[DOTPRE27:%.*]] = load i16, ptr [[ARG2:%.*]], align 2177; CHECK-NEXT: br label [[FOR_BODY:%.*]]178; CHECK: for.cond.cleanup:179; CHECK-NEXT: [[MAC1_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP13:%.*]], [[FOR_BODY]] ]180; CHECK-NEXT: ret i32 [[MAC1_0_LCSSA]]181; CHECK: for.body:182; CHECK-NEXT: [[MAC1_026:%.*]] = phi i32 [ [[TMP13]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ]183; CHECK-NEXT: [[I_025:%.*]] = phi i32 [ [[ADD:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ]184; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[I_025]]185; CHECK-NEXT: store i16 42, ptr [[ARRAYIDX]], align 2186; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 2187; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX]], align 2188; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i16189; CHECK-NEXT: [[TMP4:%.*]] = sext i16 [[TMP3]] to i32190; CHECK-NEXT: [[TMP5:%.*]] = lshr i32 [[TMP2]], 16191; CHECK-NEXT: [[TMP6:%.*]] = trunc i32 [[TMP5]] to i16192; CHECK-NEXT: [[TMP7:%.*]] = sext i16 [[TMP6]] to i32193; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[I_025]], 1194; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[ADD]]195; CHECK-NEXT: [[TMP8:%.*]] = load i16, ptr [[ARRAYIDX1]], align 2196; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[I_025]]197; CHECK-NEXT: [[TMP9:%.*]] = load i16, ptr [[ARRAYIDX3]], align 2198; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[ARRAYIDX3]], align 2199; CHECK-NEXT: [[TMP12:%.*]] = trunc i32 [[TMP11]] to i16200; CHECK-NEXT: [[TMP13]] = call i32 @llvm.arm.smlad(i32 [[TMP11]], i32 [[TMP2]], i32 [[MAC1_026]])201; CHECK-NEXT: [[TMP14:%.*]] = sext i16 [[TMP12]] to i32202; CHECK-NEXT: [[TMP15:%.*]] = lshr i32 [[TMP11]], 16203; CHECK-NEXT: [[TMP16:%.*]] = trunc i32 [[TMP15]] to i16204; CHECK-NEXT: [[TMP17:%.*]] = sext i16 [[TMP16]] to i32205; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP9]] to i32206; CHECK-NEXT: [[CONV4:%.*]] = sext i16 [[TMP0]] to i32207; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], [[TMP4]]208; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[ADD]]209; CHECK-NEXT: [[TMP18:%.*]] = load i16, ptr [[ARRAYIDX6]], align 2210; CHECK-NEXT: [[CONV7:%.*]] = sext i16 [[TMP18]] to i32211; CHECK-NEXT: [[CONV8:%.*]] = sext i16 [[TMP8]] to i32212; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP17]], [[TMP7]]213; CHECK-NEXT: [[ADD10:%.*]] = add i32 [[MUL]], [[MAC1_026]]214; CHECK-NEXT: [[ADD11:%.*]] = add i32 [[MUL9]], [[ADD10]]215; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[ADD]], [[ARG]]216; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP]]217;218entry:219 %cmp24 = icmp sgt i32 %arg, 0220 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup221 222for.body.preheader:223 %.pre = load i16, ptr %arg3, align 2224 %.pre27 = load i16, ptr %arg2, align 2225 br label %for.body226 227for.cond.cleanup:228 %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ]229 ret i32 %mac1.0.lcssa230 231for.body:232 %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ]233 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]234 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.025235 store i16 42, ptr %arrayidx, align 2236 %0 = load i16, ptr %arrayidx, align 2237 %add = add nuw nsw i32 %i.025, 1238 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add239 %1 = load i16, ptr %arrayidx1, align 2240 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.025241 %2 = load i16, ptr %arrayidx3, align 2242 %conv = sext i16 %2 to i32243 %conv4 = sext i16 %0 to i32244 %mul = mul nsw i32 %conv, %conv4245 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add246 %3 = load i16, ptr %arrayidx6, align 2247 %conv7 = sext i16 %3 to i32248 %conv8 = sext i16 %1 to i32249 %mul9 = mul nsw i32 %conv7, %conv8250 %add10 = add i32 %mul, %mac1.026251 %add11 = add i32 %mul9, %add10252 %exitcond = icmp ne i32 %add, %arg253 br i1 %exitcond, label %for.body, label %for.cond.cleanup254}255 256define dso_local i32 @loads_dominate(i32 %arg, ptr nocapture %arg1, ptr nocapture readonly %arg2, ptr nocapture readonly %arg3) {257; CHECK-LABEL: @loads_dominate(258; CHECK-NEXT: entry:259; CHECK-NEXT: [[CMP24:%.*]] = icmp sgt i32 [[ARG:%.*]], 0260; CHECK-NEXT: br i1 [[CMP24]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]261; CHECK: for.body.preheader:262; CHECK-NEXT: [[DOTPRE:%.*]] = load i16, ptr [[ARG3:%.*]], align 2263; CHECK-NEXT: [[DOTPRE27:%.*]] = load i16, ptr [[ARG2:%.*]], align 2264; CHECK-NEXT: br label [[FOR_BODY:%.*]]265; CHECK: for.cond.cleanup:266; CHECK-NEXT: [[MAC1_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP13:%.*]], [[FOR_BODY]] ]267; CHECK-NEXT: ret i32 [[MAC1_0_LCSSA]]268; CHECK: for.body:269; CHECK-NEXT: [[MAC1_026:%.*]] = phi i32 [ [[TMP13]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ]270; CHECK-NEXT: [[I_025:%.*]] = phi i32 [ [[ADD:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ]271; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[I_025]]272; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 2273; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX]], align 2274; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i16275; CHECK-NEXT: [[TMP4:%.*]] = sext i16 [[TMP3]] to i32276; CHECK-NEXT: [[TMP5:%.*]] = lshr i32 [[TMP2]], 16277; CHECK-NEXT: [[TMP6:%.*]] = trunc i32 [[TMP5]] to i16278; CHECK-NEXT: [[TMP7:%.*]] = sext i16 [[TMP6]] to i32279; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[I_025]], 1280; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[ADD]]281; CHECK-NEXT: [[TMP8:%.*]] = load i16, ptr [[ARRAYIDX1]], align 2282; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[I_025]]283; CHECK-NEXT: [[TMP9:%.*]] = load i16, ptr [[ARRAYIDX3]], align 2284; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[ARRAYIDX3]], align 2285; CHECK-NEXT: [[TMP12:%.*]] = trunc i32 [[TMP11]] to i16286; CHECK-NEXT: [[TMP13]] = call i32 @llvm.arm.smlad(i32 [[TMP11]], i32 [[TMP2]], i32 [[MAC1_026]])287; CHECK-NEXT: [[TMP14:%.*]] = sext i16 [[TMP12]] to i32288; CHECK-NEXT: [[TMP15:%.*]] = lshr i32 [[TMP11]], 16289; CHECK-NEXT: [[TMP16:%.*]] = trunc i32 [[TMP15]] to i16290; CHECK-NEXT: [[TMP17:%.*]] = sext i16 [[TMP16]] to i32291; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP9]] to i32292; CHECK-NEXT: [[CONV4:%.*]] = sext i16 [[TMP0]] to i32293; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], [[TMP4]]294; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[ADD]]295; CHECK-NEXT: [[TMP18:%.*]] = load i16, ptr [[ARRAYIDX6]], align 2296; CHECK-NEXT: [[CONV7:%.*]] = sext i16 [[TMP18]] to i32297; CHECK-NEXT: [[CONV8:%.*]] = sext i16 [[TMP8]] to i32298; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP17]], [[TMP7]]299; CHECK-NEXT: [[ADD10:%.*]] = add i32 [[MUL]], [[MAC1_026]]300; CHECK-NEXT: [[ADD11:%.*]] = add i32 [[MUL9]], [[ADD10]]301; CHECK-NEXT: store i16 42, ptr [[ARRAYIDX]], align 2302; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[ADD]], [[ARG]]303; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP]]304;305entry:306 %cmp24 = icmp sgt i32 %arg, 0307 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup308 309for.body.preheader:310 %.pre = load i16, ptr %arg3, align 2311 %.pre27 = load i16, ptr %arg2, align 2312 br label %for.body313 314for.cond.cleanup:315 %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ]316 ret i32 %mac1.0.lcssa317 318for.body:319 %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ]320 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]321 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.025322 %0 = load i16, ptr %arrayidx, align 2323 %add = add nuw nsw i32 %i.025, 1324 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add325 %1 = load i16, ptr %arrayidx1, align 2326 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.025327 %2 = load i16, ptr %arrayidx3, align 2328 %conv = sext i16 %2 to i32329 %conv4 = sext i16 %0 to i32330 %mul = mul nsw i32 %conv, %conv4331 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add332 %3 = load i16, ptr %arrayidx6, align 2333 %conv7 = sext i16 %3 to i32334 %conv8 = sext i16 %1 to i32335 %mul9 = mul nsw i32 %conv7, %conv8336 %add10 = add i32 %mul, %mac1.026337 %add11 = add i32 %mul9, %add10338 store i16 42, ptr %arrayidx, align 2339 %exitcond = icmp ne i32 %add, %arg340 br i1 %exitcond, label %for.body, label %for.cond.cleanup341}342 343define dso_local i32 @store_alias_arg3_legal_1(i32 %arg, ptr nocapture %arg1, ptr noalias nocapture readonly %arg2, ptr nocapture readonly %arg3) {344; CHECK-LABEL: @store_alias_arg3_legal_1(345; CHECK-NEXT: entry:346; CHECK-NEXT: [[CMP24:%.*]] = icmp sgt i32 [[ARG:%.*]], 0347; CHECK-NEXT: br i1 [[CMP24]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]348; CHECK: for.body.preheader:349; CHECK-NEXT: [[DOTPRE:%.*]] = load i16, ptr [[ARG3:%.*]], align 2350; CHECK-NEXT: [[DOTPRE27:%.*]] = load i16, ptr [[ARG2:%.*]], align 2351; CHECK-NEXT: br label [[FOR_BODY:%.*]]352; CHECK: for.cond.cleanup:353; CHECK-NEXT: [[MAC1_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP13:%.*]], [[FOR_BODY]] ]354; CHECK-NEXT: ret i32 [[MAC1_0_LCSSA]]355; CHECK: for.body:356; CHECK-NEXT: [[MAC1_026:%.*]] = phi i32 [ [[TMP13]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ]357; CHECK-NEXT: [[I_025:%.*]] = phi i32 [ [[ADD:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ]358; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[I_025]]359; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 2360; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX]], align 2361; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i16362; CHECK-NEXT: [[TMP4:%.*]] = sext i16 [[TMP3]] to i32363; CHECK-NEXT: [[TMP5:%.*]] = lshr i32 [[TMP2]], 16364; CHECK-NEXT: [[TMP6:%.*]] = trunc i32 [[TMP5]] to i16365; CHECK-NEXT: [[TMP7:%.*]] = sext i16 [[TMP6]] to i32366; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[I_025]], 1367; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[ADD]]368; CHECK-NEXT: [[TMP8:%.*]] = load i16, ptr [[ARRAYIDX1]], align 2369; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[I_025]]370; CHECK-NEXT: [[TMP9:%.*]] = load i16, ptr [[ARRAYIDX3]], align 2371; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[ARRAYIDX3]], align 2372; CHECK-NEXT: [[TMP12:%.*]] = trunc i32 [[TMP11]] to i16373; CHECK-NEXT: [[TMP13]] = call i32 @llvm.arm.smlad(i32 [[TMP11]], i32 [[TMP2]], i32 [[MAC1_026]])374; CHECK-NEXT: [[TMP14:%.*]] = sext i16 [[TMP12]] to i32375; CHECK-NEXT: [[TMP15:%.*]] = lshr i32 [[TMP11]], 16376; CHECK-NEXT: [[TMP16:%.*]] = trunc i32 [[TMP15]] to i16377; CHECK-NEXT: [[TMP17:%.*]] = sext i16 [[TMP16]] to i32378; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP9]] to i32379; CHECK-NEXT: [[CONV4:%.*]] = sext i16 [[TMP0]] to i32380; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], [[TMP4]]381; CHECK-NEXT: store i16 42, ptr [[ARRAYIDX]], align 2382; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[ADD]]383; CHECK-NEXT: [[TMP18:%.*]] = load i16, ptr [[ARRAYIDX6]], align 2384; CHECK-NEXT: [[CONV7:%.*]] = sext i16 [[TMP18]] to i32385; CHECK-NEXT: [[CONV8:%.*]] = sext i16 [[TMP8]] to i32386; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP17]], [[TMP7]]387; CHECK-NEXT: [[ADD10:%.*]] = add i32 [[MUL]], [[MAC1_026]]388; CHECK-NEXT: [[ADD11:%.*]] = add i32 [[MUL9]], [[ADD10]]389; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[ADD]], [[ARG]]390; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP]]391;392entry:393 %cmp24 = icmp sgt i32 %arg, 0394 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup395 396for.body.preheader:397 %.pre = load i16, ptr %arg3, align 2398 %.pre27 = load i16, ptr %arg2, align 2399 br label %for.body400 401for.cond.cleanup:402 %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ]403 ret i32 %mac1.0.lcssa404 405for.body:406 %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ]407 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]408 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.025409 %0 = load i16, ptr %arrayidx, align 2410 %add = add nuw nsw i32 %i.025, 1411 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add412 %1 = load i16, ptr %arrayidx1, align 2413 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.025414 %2 = load i16, ptr %arrayidx3, align 2415 %conv = sext i16 %2 to i32416 %conv4 = sext i16 %0 to i32417 %mul = mul nsw i32 %conv, %conv4418 store i16 42, ptr %arrayidx, align 2419 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add420 %3 = load i16, ptr %arrayidx6, align 2421 %conv7 = sext i16 %3 to i32422 %conv8 = sext i16 %1 to i32423 %mul9 = mul nsw i32 %conv7, %conv8424 %add10 = add i32 %mul, %mac1.026425 %add11 = add i32 %mul9, %add10426 %exitcond = icmp ne i32 %add, %arg427 br i1 %exitcond, label %for.body, label %for.cond.cleanup428}429 430define dso_local i32 @store_alias_arg3_legal_2(i32 %arg, ptr nocapture %arg1, ptr noalias nocapture readonly %arg2, ptr nocapture readonly %arg3) {431; CHECK-LABEL: @store_alias_arg3_legal_2(432; CHECK-NEXT: entry:433; CHECK-NEXT: [[CMP24:%.*]] = icmp sgt i32 [[ARG:%.*]], 0434; CHECK-NEXT: br i1 [[CMP24]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]435; CHECK: for.body.preheader:436; CHECK-NEXT: [[DOTPRE:%.*]] = load i16, ptr [[ARG3:%.*]], align 2437; CHECK-NEXT: [[DOTPRE27:%.*]] = load i16, ptr [[ARG2:%.*]], align 2438; CHECK-NEXT: br label [[FOR_BODY:%.*]]439; CHECK: for.cond.cleanup:440; CHECK-NEXT: [[MAC1_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP13:%.*]], [[FOR_BODY]] ]441; CHECK-NEXT: ret i32 [[MAC1_0_LCSSA]]442; CHECK: for.body:443; CHECK-NEXT: [[MAC1_026:%.*]] = phi i32 [ [[TMP13]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ]444; CHECK-NEXT: [[I_025:%.*]] = phi i32 [ [[ADD:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ]445; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[I_025]]446; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 2447; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX]], align 2448; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i16449; CHECK-NEXT: [[TMP4:%.*]] = sext i16 [[TMP3]] to i32450; CHECK-NEXT: [[TMP5:%.*]] = lshr i32 [[TMP2]], 16451; CHECK-NEXT: [[TMP6:%.*]] = trunc i32 [[TMP5]] to i16452; CHECK-NEXT: [[TMP7:%.*]] = sext i16 [[TMP6]] to i32453; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[I_025]], 1454; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[ADD]]455; CHECK-NEXT: [[TMP8:%.*]] = load i16, ptr [[ARRAYIDX1]], align 2456; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[I_025]]457; CHECK-NEXT: store i16 42, ptr [[ARRAYIDX]], align 2458; CHECK-NEXT: [[TMP9:%.*]] = load i16, ptr [[ARRAYIDX3]], align 2459; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[ARRAYIDX3]], align 2460; CHECK-NEXT: [[TMP12:%.*]] = trunc i32 [[TMP11]] to i16461; CHECK-NEXT: [[TMP13]] = call i32 @llvm.arm.smlad(i32 [[TMP11]], i32 [[TMP2]], i32 [[MAC1_026]])462; CHECK-NEXT: [[TMP14:%.*]] = sext i16 [[TMP12]] to i32463; CHECK-NEXT: [[TMP15:%.*]] = lshr i32 [[TMP11]], 16464; CHECK-NEXT: [[TMP16:%.*]] = trunc i32 [[TMP15]] to i16465; CHECK-NEXT: [[TMP17:%.*]] = sext i16 [[TMP16]] to i32466; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP9]] to i32467; CHECK-NEXT: [[CONV4:%.*]] = sext i16 [[TMP0]] to i32468; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], [[TMP4]]469; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[ADD]]470; CHECK-NEXT: [[TMP18:%.*]] = load i16, ptr [[ARRAYIDX6]], align 2471; CHECK-NEXT: [[CONV7:%.*]] = sext i16 [[TMP18]] to i32472; CHECK-NEXT: [[CONV8:%.*]] = sext i16 [[TMP8]] to i32473; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP17]], [[TMP7]]474; CHECK-NEXT: [[ADD10:%.*]] = add i32 [[MUL]], [[MAC1_026]]475; CHECK-NEXT: [[ADD11:%.*]] = add i32 [[MUL9]], [[ADD10]]476; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[ADD]], [[ARG]]477; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP]]478;479entry:480 %cmp24 = icmp sgt i32 %arg, 0481 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup482 483for.body.preheader:484 %.pre = load i16, ptr %arg3, align 2485 %.pre27 = load i16, ptr %arg2, align 2486 br label %for.body487 488for.cond.cleanup:489 %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ]490 ret i32 %mac1.0.lcssa491 492for.body:493 %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ]494 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]495 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.025496 %0 = load i16, ptr %arrayidx, align 2497 %add = add nuw nsw i32 %i.025, 1498 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add499 %1 = load i16, ptr %arrayidx1, align 2500 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.025501 store i16 42, ptr %arrayidx, align 2502 %2 = load i16, ptr %arrayidx3, align 2503 %conv = sext i16 %2 to i32504 %conv4 = sext i16 %0 to i32505 %mul = mul nsw i32 %conv, %conv4506 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add507 %3 = load i16, ptr %arrayidx6, align 2508 %conv7 = sext i16 %3 to i32509 %conv8 = sext i16 %1 to i32510 %mul9 = mul nsw i32 %conv7, %conv8511 %add10 = add i32 %mul, %mac1.026512 %add11 = add i32 %mul9, %add10513 %exitcond = icmp ne i32 %add, %arg514 br i1 %exitcond, label %for.body, label %for.cond.cleanup515}516 517define dso_local i32 @store_alias_arg3_illegal_1(i32 %arg, ptr nocapture %arg1, ptr noalias nocapture readonly %arg2, ptr noalias nocapture %arg3) {518; CHECK-LABEL: @store_alias_arg3_illegal_1(519; CHECK-NEXT: entry:520; CHECK-NEXT: [[CMP24:%.*]] = icmp sgt i32 [[ARG:%.*]], 0521; CHECK-NEXT: br i1 [[CMP24]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]522; CHECK: for.body.preheader:523; CHECK-NEXT: [[DOTPRE:%.*]] = load i16, ptr [[ARG3:%.*]], align 2524; CHECK-NEXT: [[DOTPRE27:%.*]] = load i16, ptr [[ARG2:%.*]], align 2525; CHECK-NEXT: br label [[FOR_BODY:%.*]]526; CHECK: for.cond.cleanup:527; CHECK-NEXT: [[MAC1_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[ADD11:%.*]], [[FOR_BODY]] ]528; CHECK-NEXT: ret i32 [[MAC1_0_LCSSA]]529; CHECK: for.body:530; CHECK-NEXT: [[MAC1_026:%.*]] = phi i32 [ [[ADD11]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ]531; CHECK-NEXT: [[I_025:%.*]] = phi i32 [ [[ADD:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ]532; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[I_025]]533; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 2534; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[I_025]], 1535; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[ADD]]536; CHECK-NEXT: store i16 42, ptr [[ARRAYIDX1]], align 2537; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[ARRAYIDX1]], align 2538; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[I_025]]539; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr [[ARRAYIDX3]], align 2540; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP2]] to i32541; CHECK-NEXT: [[CONV4:%.*]] = sext i16 [[TMP0]] to i32542; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[CONV]], [[CONV4]]543; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[ADD]]544; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr [[ARRAYIDX6]], align 2545; CHECK-NEXT: [[CONV7:%.*]] = sext i16 [[TMP3]] to i32546; CHECK-NEXT: [[CONV8:%.*]] = sext i16 [[TMP1]] to i32547; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[CONV7]], [[CONV8]]548; CHECK-NEXT: [[ADD10:%.*]] = add i32 [[MUL]], [[MAC1_026]]549; CHECK-NEXT: [[ADD11]] = add i32 [[MUL9]], [[ADD10]]550; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[ADD]], [[ARG]]551; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP]]552;553entry:554 %cmp24 = icmp sgt i32 %arg, 0555 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup556 557for.body.preheader:558 %.pre = load i16, ptr %arg3, align 2559 %.pre27 = load i16, ptr %arg2, align 2560 br label %for.body561 562for.cond.cleanup:563 %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ]564 ret i32 %mac1.0.lcssa565 566for.body:567 %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ]568 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]569 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.025570 %0 = load i16, ptr %arrayidx, align 2571 %add = add nuw nsw i32 %i.025, 1572 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add573 store i16 42, ptr %arrayidx1, align 2574 %1 = load i16, ptr %arrayidx1, align 2575 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.025576 %2 = load i16, ptr %arrayidx3, align 2577 %conv = sext i16 %2 to i32578 %conv4 = sext i16 %0 to i32579 %mul = mul nsw i32 %conv, %conv4580 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add581 %3 = load i16, ptr %arrayidx6, align 2582 %conv7 = sext i16 %3 to i32583 %conv8 = sext i16 %1 to i32584 %mul9 = mul nsw i32 %conv7, %conv8585 %add10 = add i32 %mul, %mac1.026586 %add11 = add i32 %mul9, %add10587 %exitcond = icmp ne i32 %add, %arg588 br i1 %exitcond, label %for.body, label %for.cond.cleanup589}590 591define dso_local i32 @store_alias_arg3_illegal_2(i32 %arg, ptr nocapture %arg1, ptr noalias nocapture readonly %arg2, ptr noalias nocapture %arg3) {592; CHECK-LABEL: @store_alias_arg3_illegal_2(593; CHECK-NEXT: entry:594; CHECK-NEXT: [[CMP24:%.*]] = icmp sgt i32 [[ARG:%.*]], 0595; CHECK-NEXT: br i1 [[CMP24]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]596; CHECK: for.body.preheader:597; CHECK-NEXT: [[DOTPRE:%.*]] = load i16, ptr [[ARG3:%.*]], align 2598; CHECK-NEXT: [[DOTPRE27:%.*]] = load i16, ptr [[ARG2:%.*]], align 2599; CHECK-NEXT: br label [[FOR_BODY:%.*]]600; CHECK: for.cond.cleanup:601; CHECK-NEXT: [[MAC1_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[ADD11:%.*]], [[FOR_BODY]] ]602; CHECK-NEXT: ret i32 [[MAC1_0_LCSSA]]603; CHECK: for.body:604; CHECK-NEXT: [[MAC1_026:%.*]] = phi i32 [ [[ADD11]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ]605; CHECK-NEXT: [[I_025:%.*]] = phi i32 [ [[ADD:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ]606; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[I_025]]607; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 2608; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[I_025]], 1609; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[ADD]]610; CHECK-NEXT: store i16 42, ptr [[ARRAYIDX]], align 2611; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[ARRAYIDX1]], align 2612; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[I_025]]613; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr [[ARRAYIDX3]], align 2614; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP2]] to i32615; CHECK-NEXT: [[CONV4:%.*]] = sext i16 [[TMP0]] to i32616; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[CONV]], [[CONV4]]617; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[ADD]]618; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr [[ARRAYIDX6]], align 2619; CHECK-NEXT: [[CONV7:%.*]] = sext i16 [[TMP3]] to i32620; CHECK-NEXT: [[CONV8:%.*]] = sext i16 [[TMP1]] to i32621; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[CONV7]], [[CONV8]]622; CHECK-NEXT: [[ADD10:%.*]] = add i32 [[MUL]], [[MAC1_026]]623; CHECK-NEXT: [[ADD11]] = add i32 [[MUL9]], [[ADD10]]624; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[ADD]], [[ARG]]625; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP]]626;627entry:628 %cmp24 = icmp sgt i32 %arg, 0629 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup630 631for.body.preheader:632 %.pre = load i16, ptr %arg3, align 2633 %.pre27 = load i16, ptr %arg2, align 2634 br label %for.body635 636for.cond.cleanup:637 %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ]638 ret i32 %mac1.0.lcssa639 640for.body:641 %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ]642 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]643 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.025644 %0 = load i16, ptr %arrayidx, align 2645 %add = add nuw nsw i32 %i.025, 1646 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add647 store i16 42, ptr %arrayidx, align 2648 %1 = load i16, ptr %arrayidx1, align 2649 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.025650 %2 = load i16, ptr %arrayidx3, align 2651 %conv = sext i16 %2 to i32652 %conv4 = sext i16 %0 to i32653 %mul = mul nsw i32 %conv, %conv4654 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add655 %3 = load i16, ptr %arrayidx6, align 2656 %conv7 = sext i16 %3 to i32657 %conv8 = sext i16 %1 to i32658 %mul9 = mul nsw i32 %conv7, %conv8659 %add10 = add i32 %mul, %mac1.026660 %add11 = add i32 %mul9, %add10661 %exitcond = icmp ne i32 %add, %arg662 br i1 %exitcond, label %for.body, label %for.cond.cleanup663}664 665define dso_local i32 @store_alias_arg2_illegal_1(i32 %arg, ptr nocapture %arg1, ptr nocapture readonly %arg2, ptr nocapture readonly %arg3) {666; CHECK-LABEL: @store_alias_arg2_illegal_1(667; CHECK-NEXT: entry:668; CHECK-NEXT: [[CMP24:%.*]] = icmp sgt i32 [[ARG:%.*]], 0669; CHECK-NEXT: br i1 [[CMP24]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]670; CHECK: for.body.preheader:671; CHECK-NEXT: [[DOTPRE:%.*]] = load i16, ptr [[ARG3:%.*]], align 2672; CHECK-NEXT: [[DOTPRE27:%.*]] = load i16, ptr [[ARG2:%.*]], align 2673; CHECK-NEXT: br label [[FOR_BODY:%.*]]674; CHECK: for.cond.cleanup:675; CHECK-NEXT: [[MAC1_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[ADD11:%.*]], [[FOR_BODY]] ]676; CHECK-NEXT: ret i32 [[MAC1_0_LCSSA]]677; CHECK: for.body:678; CHECK-NEXT: [[MAC1_026:%.*]] = phi i32 [ [[ADD11]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ]679; CHECK-NEXT: [[I_025:%.*]] = phi i32 [ [[ADD:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ]680; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[I_025]]681; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 2682; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[I_025]], 1683; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[ADD]]684; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[ARRAYIDX1]], align 2685; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[I_025]]686; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr [[ARRAYIDX3]], align 2687; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP2]] to i32688; CHECK-NEXT: [[CONV4:%.*]] = sext i16 [[TMP0]] to i32689; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[CONV]], [[CONV4]]690; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[ADD]]691; CHECK-NEXT: store i16 42, ptr [[ARRAYIDX6]], align 2692; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr [[ARRAYIDX6]], align 2693; CHECK-NEXT: [[CONV7:%.*]] = sext i16 [[TMP3]] to i32694; CHECK-NEXT: [[CONV8:%.*]] = sext i16 [[TMP1]] to i32695; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[CONV7]], [[CONV8]]696; CHECK-NEXT: [[ADD10:%.*]] = add i32 [[MUL]], [[MAC1_026]]697; CHECK-NEXT: [[ADD11]] = add i32 [[MUL9]], [[ADD10]]698; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[ADD]], [[ARG]]699; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP]]700;701entry:702 %cmp24 = icmp sgt i32 %arg, 0703 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup704 705for.body.preheader:706 %.pre = load i16, ptr %arg3, align 2707 %.pre27 = load i16, ptr %arg2, align 2708 br label %for.body709 710for.cond.cleanup:711 %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ]712 ret i32 %mac1.0.lcssa713 714for.body:715 %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ]716 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]717 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.025718 %0 = load i16, ptr %arrayidx, align 2719 %add = add nuw nsw i32 %i.025, 1720 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add721 %1 = load i16, ptr %arrayidx1, align 2722 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.025723 %2 = load i16, ptr %arrayidx3, align 2724 %conv = sext i16 %2 to i32725 %conv4 = sext i16 %0 to i32726 %mul = mul nsw i32 %conv, %conv4727 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add728 store i16 42, ptr %arrayidx6, align 2729 %3 = load i16, ptr %arrayidx6, align 2730 %conv7 = sext i16 %3 to i32731 %conv8 = sext i16 %1 to i32732 %mul9 = mul nsw i32 %conv7, %conv8733 %add10 = add i32 %mul, %mac1.026734 %add11 = add i32 %mul9, %add10735 %exitcond = icmp ne i32 %add, %arg736 br i1 %exitcond, label %for.body, label %for.cond.cleanup737}738 739define dso_local i32 @store_alias_arg2_illegal_2(i32 %arg, ptr nocapture %arg1, ptr nocapture readonly %arg2, ptr nocapture readonly %arg3) {740; CHECK-LABEL: @store_alias_arg2_illegal_2(741; CHECK-NEXT: entry:742; CHECK-NEXT: [[CMP24:%.*]] = icmp sgt i32 [[ARG:%.*]], 0743; CHECK-NEXT: br i1 [[CMP24]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]744; CHECK: for.body.preheader:745; CHECK-NEXT: [[DOTPRE:%.*]] = load i16, ptr [[ARG3:%.*]], align 2746; CHECK-NEXT: [[DOTPRE27:%.*]] = load i16, ptr [[ARG2:%.*]], align 2747; CHECK-NEXT: br label [[FOR_BODY:%.*]]748; CHECK: for.cond.cleanup:749; CHECK-NEXT: [[MAC1_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[ADD11:%.*]], [[FOR_BODY]] ]750; CHECK-NEXT: ret i32 [[MAC1_0_LCSSA]]751; CHECK: for.body:752; CHECK-NEXT: [[MAC1_026:%.*]] = phi i32 [ [[ADD11]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ]753; CHECK-NEXT: [[I_025:%.*]] = phi i32 [ [[ADD:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ]754; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[I_025]]755; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[ARRAYIDX]], align 2756; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[I_025]], 1757; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[ARG3]], i32 [[ADD]]758; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[ARRAYIDX1]], align 2759; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[I_025]]760; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr [[ARRAYIDX3]], align 2761; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP2]] to i32762; CHECK-NEXT: [[CONV4:%.*]] = sext i16 [[TMP0]] to i32763; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[CONV]], [[CONV4]]764; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i16, ptr [[ARG2]], i32 [[ADD]]765; CHECK-NEXT: store i16 42, ptr [[ARRAYIDX3]], align 2766; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr [[ARRAYIDX6]], align 2767; CHECK-NEXT: [[CONV7:%.*]] = sext i16 [[TMP3]] to i32768; CHECK-NEXT: [[CONV8:%.*]] = sext i16 [[TMP1]] to i32769; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[CONV7]], [[CONV8]]770; CHECK-NEXT: [[ADD10:%.*]] = add i32 [[MUL]], [[MAC1_026]]771; CHECK-NEXT: [[ADD11]] = add i32 [[MUL9]], [[ADD10]]772; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[ADD]], [[ARG]]773; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP]]774;775entry:776 %cmp24 = icmp sgt i32 %arg, 0777 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup778 779for.body.preheader:780 %.pre = load i16, ptr %arg3, align 2781 %.pre27 = load i16, ptr %arg2, align 2782 br label %for.body783 784for.cond.cleanup:785 %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ]786 ret i32 %mac1.0.lcssa787 788for.body:789 %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ]790 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]791 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.025792 %0 = load i16, ptr %arrayidx, align 2793 %add = add nuw nsw i32 %i.025, 1794 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add795 %1 = load i16, ptr %arrayidx1, align 2796 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.025797 %2 = load i16, ptr %arrayidx3, align 2798 %conv = sext i16 %2 to i32799 %conv4 = sext i16 %0 to i32800 %mul = mul nsw i32 %conv, %conv4801 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add802 store i16 42, ptr %arrayidx3, align 2803 %3 = load i16, ptr %arrayidx6, align 2804 %conv7 = sext i16 %3 to i32805 %conv8 = sext i16 %1 to i32806 %mul9 = mul nsw i32 %conv7, %conv8807 %add10 = add i32 %mul, %mac1.026808 %add11 = add i32 %mul9, %add10809 %exitcond = icmp ne i32 %add, %arg810 br i1 %exitcond, label %for.body, label %for.cond.cleanup811}812 813; TODO: I think we should be able to generate one smlad here. The search fails814; when it finds the alias.815define i32 @one_pair_alias(ptr noalias nocapture readonly %b, ptr noalias nocapture %c) {816; CHECK-LABEL: @one_pair_alias(817; CHECK-NEXT: entry:818; CHECK-NEXT: br label [[FOR_BODY:%.*]]819; CHECK: for.cond.cleanup:820; CHECK-NEXT: ret i32 [[ADD26:%.*]]821; CHECK: for.body:822; CHECK-NEXT: [[I_050:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[ADD27:%.*]], [[FOR_BODY]] ]823; CHECK-NEXT: [[A_049:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[ADD26]], [[FOR_BODY]] ]824; CHECK-NEXT: [[ADD3:%.*]] = or i32 [[I_050]], 1825; CHECK-NEXT: [[ADD11:%.*]] = or i32 [[I_050]], 2826; CHECK-NEXT: [[ADD19:%.*]] = or i32 [[I_050]], 3827; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[B:%.*]], i32 [[I_050]]828; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i16, ptr [[B]], i32 [[ADD3]]829; CHECK-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds i16, ptr [[B]], i32 [[ADD11]]830; CHECK-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds i16, ptr [[B]], i32 [[ADD19]]831; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[C:%.*]], i32 [[I_050]]832; CHECK-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i16, ptr [[C]], i32 [[ADD3]]833; CHECK-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds i16, ptr [[C]], i32 [[ADD11]]834; CHECK-NEXT: [[ARRAYIDX23:%.*]] = getelementptr inbounds i16, ptr [[C]], i32 [[ADD19]]835; CHECK-NEXT: [[TMP:%.*]] = load i16, ptr [[ARRAYIDX]], align 2836; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr [[ARRAYIDX4]], align 2837; CHECK-NEXT: [[TMP4:%.*]] = load i16, ptr [[ARRAYIDX12]], align 2838; CHECK-NEXT: [[TMP6:%.*]] = load i16, ptr [[ARRAYIDX20]], align 2839; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[ARRAYIDX1]], align 2840; CHECK-NEXT: store i16 43, ptr [[ARRAYIDX7]], align 2841; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr [[ARRAYIDX7]], align 2842; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[ARRAYIDX15]], align 2843; CHECK-NEXT: [[TMP7:%.*]] = load i16, ptr [[ARRAYIDX23]], align 2844; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP]] to i32845; CHECK-NEXT: [[CONV2:%.*]] = sext i16 [[TMP1]] to i32846; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[CONV2]], [[CONV]]847; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[MUL]], [[A_049]]848; CHECK-NEXT: [[CONV5:%.*]] = sext i16 [[TMP2]] to i32849; CHECK-NEXT: [[CONV8:%.*]] = sext i16 [[TMP3]] to i32850; CHECK-NEXT: [[MUL9:%.*]] = mul nsw i32 [[CONV8]], [[CONV5]]851; CHECK-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD]], [[MUL9]]852; CHECK-NEXT: [[CONV13:%.*]] = sext i16 [[TMP4]] to i32853; CHECK-NEXT: [[CONV16:%.*]] = sext i16 [[TMP5]] to i32854; CHECK-NEXT: [[MUL17:%.*]] = mul nsw i32 [[CONV16]], [[CONV13]]855; CHECK-NEXT: [[ADD18:%.*]] = add nsw i32 [[ADD10]], [[MUL17]]856; CHECK-NEXT: [[CONV21:%.*]] = sext i16 [[TMP6]] to i32857; CHECK-NEXT: [[CONV24:%.*]] = sext i16 [[TMP7]] to i32858; CHECK-NEXT: [[MUL25:%.*]] = mul nsw i32 [[CONV24]], [[CONV21]]859; CHECK-NEXT: [[ADD26]] = add nsw i32 [[ADD18]], [[MUL25]]860; CHECK-NEXT: [[ADD27]] = add nuw nsw i32 [[I_050]], 4861; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ADD27]], 100862; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]863;864entry:865 br label %for.body866 867for.cond.cleanup: ; preds = %for.body868 ret i32 %add26869 870for.body: ; preds = %for.body, %entry871 %i.050 = phi i32 [ 0, %entry ], [ %add27, %for.body ]872 %a.049 = phi i32 [ 0, %entry ], [ %add26, %for.body ]873 %add3 = or i32 %i.050, 1874 %add11 = or i32 %i.050, 2875 %add19 = or i32 %i.050, 3876 %arrayidx = getelementptr inbounds i16, ptr %b, i32 %i.050877 %arrayidx4 = getelementptr inbounds i16, ptr %b, i32 %add3878 %arrayidx12 = getelementptr inbounds i16, ptr %b, i32 %add11879 %arrayidx20 = getelementptr inbounds i16, ptr %b, i32 %add19880 %arrayidx1 = getelementptr inbounds i16, ptr %c, i32 %i.050881 %arrayidx7 = getelementptr inbounds i16, ptr %c, i32 %add3882 %arrayidx15 = getelementptr inbounds i16, ptr %c, i32 %add11883 %arrayidx23 = getelementptr inbounds i16, ptr %c, i32 %add19884 %tmp = load i16, ptr %arrayidx, align 2885 %tmp2 = load i16, ptr %arrayidx4, align 2886 %tmp4 = load i16, ptr %arrayidx12, align 2887 %tmp6 = load i16, ptr %arrayidx20, align 2888 %tmp1 = load i16, ptr %arrayidx1, align 2889 store i16 43, ptr %arrayidx7890 %tmp3 = load i16, ptr %arrayidx7, align 2891 %tmp5 = load i16, ptr %arrayidx15, align 2892 %tmp7 = load i16, ptr %arrayidx23, align 2893 %conv = sext i16 %tmp to i32894 %conv2 = sext i16 %tmp1 to i32895 %mul = mul nsw i32 %conv2, %conv896 %add = add nsw i32 %mul, %a.049897 %conv5 = sext i16 %tmp2 to i32898 %conv8 = sext i16 %tmp3 to i32899 %mul9 = mul nsw i32 %conv8, %conv5900 %add10 = add nsw i32 %add, %mul9901 %conv13 = sext i16 %tmp4 to i32902 %conv16 = sext i16 %tmp5 to i32903 %mul17 = mul nsw i32 %conv16, %conv13904 %add18 = add nsw i32 %add10, %mul17905 %conv21 = sext i16 %tmp6 to i32906 %conv24 = sext i16 %tmp7 to i32907 %mul25 = mul nsw i32 %conv24, %conv21908 %add26 = add nsw i32 %add18, %mul25909 %add27 = add nuw nsw i32 %i.050, 4910 %cmp = icmp ult i32 %add27, 100911 br i1 %cmp, label %for.body, label %for.cond.cleanup912}913 914