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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -mtriple=thumbv7-unknown-linux-android -arm-parallel-dsp -S %s -o - | FileCheck %s3 4define void @undef_no_return(ptr %a) {5; CHECK-LABEL: @undef_no_return(6; CHECK-NEXT: entry:7; CHECK-NEXT: [[INCDEC_PTR21:%.*]] = getelementptr inbounds i16, ptr [[A:%.*]], i32 38; CHECK-NEXT: [[INCDEC_PTR29:%.*]] = getelementptr inbounds i16, ptr [[A]], i32 49; CHECK-NEXT: br label [[FOR_BODY:%.*]]10; CHECK: for.body:11; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[INCDEC_PTR21]], align 212; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[INCDEC_PTR21]], align 213; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i1614; CHECK-NEXT: [[TMP4:%.*]] = sext i16 [[TMP3]] to i3215; CHECK-NEXT: [[TMP5:%.*]] = lshr i32 [[TMP2]], 1616; CHECK-NEXT: [[TMP6:%.*]] = trunc i32 [[TMP5]] to i1617; CHECK-NEXT: [[TMP7:%.*]] = sext i16 [[TMP6]] to i3218; CHECK-NEXT: [[CONV25:%.*]] = sext i16 [[TMP0]] to i3219; CHECK-NEXT: [[UGLYGEP15:%.*]] = getelementptr i8, ptr undef, i32 undef20; CHECK-NEXT: [[SCEVGEP17:%.*]] = getelementptr i16, ptr [[UGLYGEP15]], i32 721; CHECK-NEXT: [[TMP8:%.*]] = load i16, ptr [[SCEVGEP17]], align 222; CHECK-NEXT: [[UGLYGEP12:%.*]] = getelementptr i8, ptr undef, i32 undef23; CHECK-NEXT: [[SCEVGEP14:%.*]] = getelementptr i16, ptr [[UGLYGEP12]], i32 624; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[SCEVGEP14]], align 225; CHECK-NEXT: [[TMP11:%.*]] = trunc i32 [[TMP10]] to i1626; CHECK-NEXT: [[TMP12:%.*]] = call i32 @llvm.arm.smladx(i32 [[TMP10]], i32 [[TMP2]], i32 undef)27; CHECK-NEXT: [[TMP13:%.*]] = sext i16 [[TMP11]] to i3228; CHECK-NEXT: [[TMP14:%.*]] = lshr i32 [[TMP10]], 1629; CHECK-NEXT: [[TMP15:%.*]] = trunc i32 [[TMP14]] to i1630; CHECK-NEXT: [[TMP16:%.*]] = sext i16 [[TMP15]] to i3231; CHECK-NEXT: [[CONV31:%.*]] = sext i16 [[TMP8]] to i3232; CHECK-NEXT: [[TMP17:%.*]] = load i16, ptr [[INCDEC_PTR29]], align 233; CHECK-NEXT: [[CONV33:%.*]] = sext i16 [[TMP17]] to i3234; CHECK-NEXT: [[TMP18:%.*]] = load i16, ptr [[SCEVGEP14]], align 235; CHECK-NEXT: [[CONV39:%.*]] = sext i16 [[TMP18]] to i3236; CHECK-NEXT: [[MUL_I287_NEG_NEG:%.*]] = mul nsw i32 [[TMP16]], [[TMP4]]37; CHECK-NEXT: [[MUL_I283_NEG_NEG:%.*]] = mul nsw i32 [[TMP13]], [[TMP7]]38; CHECK-NEXT: [[REASS_ADD408:%.*]] = add i32 undef, [[MUL_I287_NEG_NEG]]39; CHECK-NEXT: [[REASS_ADD409:%.*]] = add i32 [[REASS_ADD408]], [[MUL_I283_NEG_NEG]]40; CHECK-NEXT: br label [[FOR_BODY]]41;42entry:43 %incdec.ptr21 = getelementptr inbounds i16, ptr %a, i32 344 %incdec.ptr29 = getelementptr inbounds i16, ptr %a, i32 445 br label %for.body46 47for.body:48 %0 = load i16, ptr %incdec.ptr21, align 249 %conv25 = sext i16 %0 to i3250 %uglygep15 = getelementptr i8, ptr undef, i32 undef51 %scevgep17 = getelementptr i16, ptr %uglygep15, i32 752 %1 = load i16, ptr %scevgep17, align 253 %conv31 = sext i16 %1 to i3254 %2 = load i16, ptr %incdec.ptr29, align 255 %conv33 = sext i16 %2 to i3256 %uglygep12 = getelementptr i8, ptr undef, i32 undef57 %scevgep14 = getelementptr i16, ptr %uglygep12, i32 658 %3 = load i16, ptr %scevgep14, align 259 %conv39 = sext i16 %3 to i3260 %mul.i287.neg.neg = mul nsw i32 %conv31, %conv2561 %mul.i283.neg.neg = mul nsw i32 %conv39, %conv3362 %reass.add408 = add i32 undef, %mul.i287.neg.neg63 %reass.add409 = add i32 %reass.add408, %mul.i283.neg.neg64 br label %for.body65}66 67define i32 @return(ptr %a, ptr %b, i32 %N) {68; CHECK-LABEL: @return(69; CHECK-NEXT: entry:70; CHECK-NEXT: [[INCDEC_PTR21:%.*]] = getelementptr inbounds i16, ptr [[A:%.*]], i32 371; CHECK-NEXT: [[INCDEC_PTR29:%.*]] = getelementptr inbounds i16, ptr [[A]], i32 472; CHECK-NEXT: br label [[FOR_BODY:%.*]]73; CHECK: for.body:74; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[N:%.*]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY]] ]75; CHECK-NEXT: [[ACC:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[TMP12:%.*]], [[FOR_BODY]] ]76; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[INCDEC_PTR21]], align 277; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[INCDEC_PTR21]], align 278; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i1679; CHECK-NEXT: [[TMP4:%.*]] = sext i16 [[TMP3]] to i3280; CHECK-NEXT: [[TMP5:%.*]] = lshr i32 [[TMP2]], 1681; CHECK-NEXT: [[TMP6:%.*]] = trunc i32 [[TMP5]] to i1682; CHECK-NEXT: [[TMP7:%.*]] = sext i16 [[TMP6]] to i3283; CHECK-NEXT: [[CONV25:%.*]] = sext i16 [[TMP0]] to i3284; CHECK-NEXT: [[B_IDX:%.*]] = add nuw nsw i32 [[IV]], 185; CHECK-NEXT: [[SCEVGEP17:%.*]] = getelementptr i16, ptr [[B:%.*]], i32 [[B_IDX]]86; CHECK-NEXT: [[SCEVGEP14:%.*]] = getelementptr i16, ptr [[B]], i32 [[IV]]87; CHECK-NEXT: [[TMP8:%.*]] = load i16, ptr [[SCEVGEP17]], align 288; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[SCEVGEP14]], align 289; CHECK-NEXT: [[TMP11:%.*]] = trunc i32 [[TMP10]] to i1690; CHECK-NEXT: [[TMP12]] = call i32 @llvm.arm.smladx(i32 [[TMP10]], i32 [[TMP2]], i32 [[ACC]])91; CHECK-NEXT: [[TMP13:%.*]] = sext i16 [[TMP11]] to i3292; CHECK-NEXT: [[TMP14:%.*]] = lshr i32 [[TMP10]], 1693; CHECK-NEXT: [[TMP15:%.*]] = trunc i32 [[TMP14]] to i1694; CHECK-NEXT: [[TMP16:%.*]] = sext i16 [[TMP15]] to i3295; CHECK-NEXT: [[CONV31:%.*]] = sext i16 [[TMP8]] to i3296; CHECK-NEXT: [[TMP17:%.*]] = load i16, ptr [[INCDEC_PTR29]], align 297; CHECK-NEXT: [[CONV33:%.*]] = sext i16 [[TMP17]] to i3298; CHECK-NEXT: [[TMP18:%.*]] = load i16, ptr [[SCEVGEP14]], align 299; CHECK-NEXT: [[CONV39:%.*]] = sext i16 [[TMP18]] to i32100; CHECK-NEXT: [[MUL_I287_NEG_NEG:%.*]] = mul nsw i32 [[TMP16]], [[TMP4]]101; CHECK-NEXT: [[MUL_I283_NEG_NEG:%.*]] = mul nsw i32 [[TMP13]], [[TMP7]]102; CHECK-NEXT: [[REASS_ADD408:%.*]] = add i32 [[ACC]], [[MUL_I287_NEG_NEG]]103; CHECK-NEXT: [[REASS_ADD409:%.*]] = add i32 [[REASS_ADD408]], [[MUL_I283_NEG_NEG]]104; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], -1105; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[IV_NEXT]], 0106; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[EXIT:%.*]]107; CHECK: exit:108; CHECK-NEXT: ret i32 [[TMP12]]109;110entry:111 %incdec.ptr21 = getelementptr inbounds i16, ptr %a, i32 3112 %incdec.ptr29 = getelementptr inbounds i16, ptr %a, i32 4113 br label %for.body114 115for.body:116 %iv = phi i32 [ %N, %entry ], [ %iv.next, %for.body ]117 %acc = phi i32 [ 0, %entry ], [ %reass.add409, %for.body ]118 %0 = load i16, ptr %incdec.ptr21, align 2119 %conv25 = sext i16 %0 to i32120 %b.idx = add nuw nsw i32 %iv, 1121 %scevgep17 = getelementptr i16, ptr %b, i32 %b.idx122 %scevgep14 = getelementptr i16, ptr %b, i32 %iv123 %1 = load i16, ptr %scevgep17, align 2124 %conv31 = sext i16 %1 to i32125 %2 = load i16, ptr %incdec.ptr29, align 2126 %conv33 = sext i16 %2 to i32127 %3 = load i16, ptr %scevgep14, align 2128 %conv39 = sext i16 %3 to i32129 %mul.i287.neg.neg = mul nsw i32 %conv31, %conv25130 %mul.i283.neg.neg = mul nsw i32 %conv39, %conv33131 %reass.add408 = add i32 %acc, %mul.i287.neg.neg132 %reass.add409 = add i32 %reass.add408, %mul.i283.neg.neg133 %iv.next = add nuw nsw i32 %iv, -1134 %cmp = icmp ne i32 %iv.next, 0135 br i1 %cmp, label %for.body, label %exit136 137exit:138 ret i32 %reass.add409139}140