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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -arm-parallel-dsp -dce -mtriple=armv7-a -S %s -o - | FileCheck %s3 4define i64 @sext_acc_1(ptr %a, ptr %b, i32 %acc) {5; CHECK-LABEL: @sext_acc_1(6; CHECK-NEXT: entry:7; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[A:%.*]], align 28; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[B:%.*]], align 29; CHECK-NEXT: [[TMP4:%.*]] = sext i32 [[ACC:%.*]] to i6410; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.arm.smlald(i32 [[TMP1]], i32 [[TMP3]], i64 [[TMP4]])11; CHECK-NEXT: ret i64 [[TMP5]]12;13entry:14 %ld.a.0 = load i16, ptr %a15 %sext.a.0 = sext i16 %ld.a.0 to i3216 %ld.b.0 = load i16, ptr %b17 %sext.b.0 = sext i16 %ld.b.0 to i3218 %mul.0 = mul i32 %sext.a.0, %sext.b.019 %addr.a.1 = getelementptr i16, ptr %a, i32 120 %addr.b.1 = getelementptr i16, ptr %b, i32 121 %ld.a.1 = load i16, ptr %addr.a.122 %sext.a.1 = sext i16 %ld.a.1 to i3223 %ld.b.1 = load i16, ptr %addr.b.124 %sext.b.1 = sext i16 %ld.b.1 to i3225 %mul.1 = mul i32 %sext.a.1, %sext.b.126 %sext.mul.0 = sext i32 %mul.0 to i6427 %sext.mul.1 = sext i32 %mul.1 to i6428 %add = add i64 %sext.mul.0, %sext.mul.129 %sext.acc = sext i32 %acc to i6430 %res = add i64 %add, %sext.acc31 ret i64 %res32}33 34define i64 @sext_acc_2(ptr %a, ptr %b, i32 %acc) {35; CHECK-LABEL: @sext_acc_2(36; CHECK-NEXT: entry:37; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[A:%.*]], align 238; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[B:%.*]], align 239; CHECK-NEXT: [[ADDR_A_2:%.*]] = getelementptr i16, ptr [[A]], i32 240; CHECK-NEXT: [[ADDR_B_2:%.*]] = getelementptr i16, ptr [[B]], i32 241; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[ADDR_A_2]], align 242; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[ADDR_B_2]], align 243; CHECK-NEXT: [[TMP8:%.*]] = sext i32 [[ACC:%.*]] to i6444; CHECK-NEXT: [[TMP9:%.*]] = call i64 @llvm.arm.smlald(i32 [[TMP1]], i32 [[TMP3]], i64 [[TMP8]])45; CHECK-NEXT: [[TMP10:%.*]] = call i64 @llvm.arm.smlald(i32 [[TMP5]], i32 [[TMP7]], i64 [[TMP9]])46; CHECK-NEXT: ret i64 [[TMP10]]47;48entry:49 %ld.a.0 = load i16, ptr %a50 %sext.a.0 = sext i16 %ld.a.0 to i3251 %ld.b.0 = load i16, ptr %b52 %sext.b.0 = sext i16 %ld.b.0 to i3253 %mul.0 = mul i32 %sext.a.0, %sext.b.054 %addr.a.1 = getelementptr i16, ptr %a, i32 155 %addr.b.1 = getelementptr i16, ptr %b, i32 156 %ld.a.1 = load i16, ptr %addr.a.157 %sext.a.1 = sext i16 %ld.a.1 to i3258 %ld.b.1 = load i16, ptr %addr.b.159 %sext.b.1 = sext i16 %ld.b.1 to i3260 %mul.1 = mul i32 %sext.a.1, %sext.b.161 %sext.mul.0 = sext i32 %mul.0 to i6462 %sext.mul.1 = sext i32 %mul.1 to i6463 %add = add i64 %sext.mul.0, %sext.mul.164 %sext.acc = sext i32 %acc to i6465 %add.1 = add i64 %add, %sext.acc66 %addr.a.2 = getelementptr i16, ptr %a, i32 267 %addr.b.2 = getelementptr i16, ptr %b, i32 268 %ld.a.2 = load i16, ptr %addr.a.269 %sext.a.2 = sext i16 %ld.a.2 to i3270 %ld.b.2 = load i16, ptr %addr.b.271 %sext.b.2 = sext i16 %ld.b.2 to i3272 %mul.2 = mul i32 %sext.a.2, %sext.b.273 %sext.mul.2 = sext i32 %mul.2 to i6474 %addr.a.3 = getelementptr i16, ptr %a, i32 375 %addr.b.3 = getelementptr i16, ptr %b, i32 376 %ld.a.3 = load i16, ptr %addr.a.377 %sext.a.3 = sext i16 %ld.a.3 to i3278 %ld.b.3 = load i16, ptr %addr.b.379 %sext.b.3 = sext i16 %ld.b.3 to i3280 %mul.3 = mul i32 %sext.a.3, %sext.b.381 %sext.mul.3 = sext i32 %mul.3 to i6482 %add.2 = add i64 %sext.mul.2, %sext.mul.383 %add.3 = add i64 %add.1, %add.284 ret i64 %add.385}86 87define i64 @sext_acc_3(ptr %a, ptr %b, i32 %acc) {88; CHECK-LABEL: @sext_acc_3(89; CHECK-NEXT: entry:90; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[A:%.*]], align 291; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[B:%.*]], align 292; CHECK-NEXT: [[ADDR_A_2:%.*]] = getelementptr i16, ptr [[A]], i32 293; CHECK-NEXT: [[ADDR_B_2:%.*]] = getelementptr i16, ptr [[B]], i32 294; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[ADDR_A_2]], align 295; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[ADDR_B_2]], align 296; CHECK-NEXT: [[TMP8:%.*]] = sext i32 [[ACC:%.*]] to i6497; CHECK-NEXT: [[TMP9:%.*]] = call i64 @llvm.arm.smlald(i32 [[TMP1]], i32 [[TMP3]], i64 [[TMP8]])98; CHECK-NEXT: [[TMP10:%.*]] = call i64 @llvm.arm.smlald(i32 [[TMP5]], i32 [[TMP7]], i64 [[TMP9]])99; CHECK-NEXT: ret i64 [[TMP10]]100;101entry:102 %ld.a.0 = load i16, ptr %a103 %sext.a.0 = sext i16 %ld.a.0 to i32104 %ld.b.0 = load i16, ptr %b105 %sext.b.0 = sext i16 %ld.b.0 to i32106 %mul.0 = mul i32 %sext.a.0, %sext.b.0107 %addr.a.1 = getelementptr i16, ptr %a, i32 1108 %addr.b.1 = getelementptr i16, ptr %b, i32 1109 %ld.a.1 = load i16, ptr %addr.a.1110 %sext.a.1 = sext i16 %ld.a.1 to i32111 %ld.b.1 = load i16, ptr %addr.b.1112 %sext.b.1 = sext i16 %ld.b.1 to i32113 %mul.1 = mul i32 %sext.a.1, %sext.b.1114 %sext.mul.0 = sext i32 %mul.0 to i64115 %sext.mul.1 = sext i32 %mul.1 to i64116 %add = add i64 %sext.mul.0, %sext.mul.1117 %addr.a.2 = getelementptr i16, ptr %a, i32 2118 %addr.b.2 = getelementptr i16, ptr %b, i32 2119 %ld.a.2 = load i16, ptr %addr.a.2120 %sext.a.2 = sext i16 %ld.a.2 to i32121 %ld.b.2 = load i16, ptr %addr.b.2122 %sext.b.2 = sext i16 %ld.b.2 to i32123 %mul.2 = mul i32 %sext.a.2, %sext.b.2124 %sext.mul.2 = sext i32 %mul.2 to i64125 %addr.a.3 = getelementptr i16, ptr %a, i32 3126 %addr.b.3 = getelementptr i16, ptr %b, i32 3127 %ld.a.3 = load i16, ptr %addr.a.3128 %sext.a.3 = sext i16 %ld.a.3 to i32129 %ld.b.3 = load i16, ptr %addr.b.3130 %sext.b.3 = sext i16 %ld.b.3 to i32131 %mul.3 = mul i32 %sext.a.3, %sext.b.3132 %sext.mul.3 = sext i32 %mul.3 to i64133 %add.1 = add i64 %sext.mul.2, %sext.mul.3134 %add.2 = add i64 %add, %add.1135 %sext.acc = sext i32 %acc to i64136 %add.3 = add i64 %add.2, %sext.acc137 ret i64 %add.3138}139 140define i64 @sext_acc_4(ptr %a, ptr %b, i32 %acc) {141; CHECK-LABEL: @sext_acc_4(142; CHECK-NEXT: entry:143; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[A:%.*]], align 2144; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[B:%.*]], align 2145; CHECK-NEXT: [[ADDR_A_2:%.*]] = getelementptr i16, ptr [[A]], i32 2146; CHECK-NEXT: [[ADDR_B_2:%.*]] = getelementptr i16, ptr [[B]], i32 2147; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[ADDR_A_2]], align 2148; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[ADDR_B_2]], align 2149; CHECK-NEXT: [[TMP8:%.*]] = sext i32 [[ACC:%.*]] to i64150; CHECK-NEXT: [[TMP9:%.*]] = call i64 @llvm.arm.smlald(i32 [[TMP1]], i32 [[TMP3]], i64 [[TMP8]])151; CHECK-NEXT: [[TMP10:%.*]] = call i64 @llvm.arm.smlald(i32 [[TMP5]], i32 [[TMP7]], i64 [[TMP9]])152; CHECK-NEXT: ret i64 [[TMP10]]153;154entry:155 %ld.a.0 = load i16, ptr %a156 %sext.a.0 = sext i16 %ld.a.0 to i32157 %ld.b.0 = load i16, ptr %b158 %sext.b.0 = sext i16 %ld.b.0 to i32159 %mul.0 = mul i32 %sext.a.0, %sext.b.0160 %addr.a.1 = getelementptr i16, ptr %a, i32 1161 %addr.b.1 = getelementptr i16, ptr %b, i32 1162 %ld.a.1 = load i16, ptr %addr.a.1163 %sext.a.1 = sext i16 %ld.a.1 to i32164 %ld.b.1 = load i16, ptr %addr.b.1165 %sext.b.1 = sext i16 %ld.b.1 to i32166 %mul.1 = mul i32 %sext.a.1, %sext.b.1167 %add = add i32 %mul.0, %mul.1168 %sext.add = sext i32 %add to i64169 %addr.a.2 = getelementptr i16, ptr %a, i32 2170 %addr.b.2 = getelementptr i16, ptr %b, i32 2171 %ld.a.2 = load i16, ptr %addr.a.2172 %sext.a.2 = sext i16 %ld.a.2 to i32173 %ld.b.2 = load i16, ptr %addr.b.2174 %sext.b.2 = sext i16 %ld.b.2 to i32175 %mul.2 = mul i32 %sext.a.2, %sext.b.2176 %sext.mul.2 = sext i32 %mul.2 to i64177 %addr.a.3 = getelementptr i16, ptr %a, i32 3178 %addr.b.3 = getelementptr i16, ptr %b, i32 3179 %ld.a.3 = load i16, ptr %addr.a.3180 %sext.a.3 = sext i16 %ld.a.3 to i32181 %ld.b.3 = load i16, ptr %addr.b.3182 %sext.b.3 = sext i16 %ld.b.3 to i32183 %mul.3 = mul i32 %sext.a.3, %sext.b.3184 %sext.mul.3 = sext i32 %mul.3 to i64185 %sext.acc = sext i32 %acc to i64186 %add.1 = add i64 %sext.mul.2, %sext.add187 %add.2 = add i64 %sext.add, %add.1188 %add.3 = add i64 %add.2, %sext.mul.3189 %add.4 = add i64 %add.3, %sext.acc190 ret i64 %add.4191}192