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1; RUN: opt -mtriple=armv8m.main-none-none-eabi -mattr=+dsp < %s -arm-parallel-dsp -S | FileCheck %s2;3; Operands of both muls are not symmetrical (see also comments inlined below), check4; that the rewrite isn't triggered.5;6; CHECK-NOT: call i32 @llvm.arm.smlad7;8define dso_local i32 @test(i32 %arg, ptr nocapture readnone %arg1, ptr nocapture readonly %arg2, ptr nocapture readonly %arg3) {9entry:10 %cmp24 = icmp sgt i32 %arg, 011 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup12 13for.body.preheader:14 %.pre = load i16, ptr %arg3, align 215 %.pre27 = load i16, ptr %arg2, align 216 br label %for.body17 18for.cond.cleanup:19 %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add11, %for.body ]20 ret i32 %mac1.0.lcssa21 22for.body:23 %mac1.026 = phi i32 [ %add11, %for.body ], [ 0, %for.body.preheader ]24 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]25 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.02526 %0 = load i16, ptr %arrayidx, align 227 %add = add nuw nsw i32 %i.025, 128 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add29 %1 = load i16, ptr %arrayidx1, align 230 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.02531 %2 = load i16, ptr %arrayidx3, align 232 %conv = sext i16 %2 to i3233 34; This zero-extends the 2nd operand of %mul:35 %conv4 = zext i16 %0 to i3236 37 %mul = mul nsw i32 %conv, %conv438 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add39 %3 = load i16, ptr %arrayidx6, align 240 41; And here we only have sign-extensions. Thus, the operands of42; %mul and %mul9 are not symmetrical:43 %conv7 = sext i16 %3 to i3244 %conv8 = sext i16 %1 to i3245 46 %mul9 = mul nsw i32 %conv7, %conv847 %add10 = add i32 %mul, %mac1.02648 %add11 = add i32 %add10, %mul949 %exitcond = icmp ne i32 %add, %arg50 br i1 %exitcond, label %for.body, label %for.cond.cleanup51}52