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1; RUN: opt -mtriple=armv8m.main-none-none-eabi -mattr=+dsp < %s -arm-parallel-dsp -S | FileCheck %s2;3; The loads are not narrow loads: check that the rewrite isn't triggered.4;5; CHECK-NOT: call i32 @llvm.arm.smlad6;7; Arg2 is now an i32, while Arg3 is still and i16:8;9define dso_local i32 @test(i32 %arg, ptr nocapture readnone %arg1, ptr nocapture readonly %arg2, ptr nocapture readonly %arg3) {10entry:11 %cmp22 = icmp sgt i32 %arg, 012 br i1 %cmp22, label %for.body.preheader, label %for.cond.cleanup13 14for.body.preheader:15 %.pre = load i16, ptr %arg3, align 216 br label %for.body17 18for.cond.cleanup:19 %mac1.0.lcssa = phi i32 [ 0, %entry ], [ %add9, %for.body ]20 ret i32 %mac1.0.lcssa21 22for.body:23 %0 = phi i16 [ %1, %for.body ], [ %.pre, %for.body.preheader ]24 %mac1.024 = phi i32 [ %add9, %for.body ], [ 0, %for.body.preheader ]25 %i.023 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]26 %add = add nuw nsw i32 %i.023, 127 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add28 %1 = load i16, ptr %arrayidx1, align 229 %conv = sext i16 %0 to i3230 31; This is a 'normal' i32 load to %2:32 %arrayidx3 = getelementptr inbounds i32, ptr %arg2, i32 %i.02333 %2 = load i32, ptr %arrayidx3, align 434 35; This mul has now 1 operand which is a narrow load, and the other a normal36; i32 load:37 %mul = mul nsw i32 %2, %conv38 39 %add4 = add nuw nsw i32 %i.023, 240 %arrayidx5 = getelementptr inbounds i32, ptr %arg2, i32 %add441 %3 = load i32, ptr %arrayidx5, align 442 %conv6 = sext i16 %1 to i3243 %mul7 = mul nsw i32 %3, %conv644 %add8 = add i32 %mul, %mac1.02445 %add9 = add i32 %add8, %mul746 %exitcond = icmp eq i32 %add, %arg47 br i1 %exitcond, label %for.cond.cleanup, label %for.body48}49