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1; RUN: opt -mtriple=armv8m.main-none-none-eabi -mattr=+dsp < %s -arm-parallel-dsp -S | FileCheck %s2;3; The Cortex-M0 does not support unaligned accesses:4; RUN: opt -mtriple=armv6m-none-none-eabi < %s -arm-parallel-dsp -S | FileCheck %s --check-prefix=CHECK-UNSUPPORTED5;6; Check DSP extension:7; RUN: opt -mtriple=armv8m.main-none-none-eabi -mattr=-dsp < %s -arm-parallel-dsp -S | FileCheck %s --check-prefix=CHECK-UNSUPPORTED8 9define dso_local i64 @OneReduction(i32 %arg, ptr nocapture readnone %arg1, ptr nocapture readonly %arg2, ptr nocapture readonly %arg3) {10;11; CHECK-LABEL: @OneReduction12; CHECK: %mac1{{\.}}026 = phi i64 [ [[V8:%[0-9]+]], %for.body ], [ 0, %for.body.preheader ]13; CHECK: [[V7:%[0-9]+]] = load i32, ptr %arrayidx, align 214; CHECK: [[V5:%[0-9]+]] = load i32, ptr %arrayidx3, align 215; CHECK: [[V8]] = call i64 @llvm.arm.smlald(i32 [[V5]], i32 [[V7]], i64 %mac1{{\.}}026)16; CHECK-NOT: call i64 @llvm.arm.smlald17;18; CHECK-UNSUPPORTED-NOT: call i64 @llvm.arm.smlald19;20entry:21 %cmp24 = icmp sgt i32 %arg, 022 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup23 24for.body.preheader:25 %.pre = load i16, ptr %arg3, align 226 %.pre27 = load i16, ptr %arg2, align 227 br label %for.body28 29for.cond.cleanup:30 %mac1.0.lcssa = phi i64 [ 0, %entry ], [ %add11, %for.body ]31 ret i64 %mac1.0.lcssa32 33for.body:34; One reduction statement here:35 %mac1.026 = phi i64 [ %add11, %for.body ], [ 0, %for.body.preheader ]36 37 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]38 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.02539 %0 = load i16, ptr %arrayidx, align 240 %add = add nuw nsw i32 %i.025, 141 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add42 %1 = load i16, ptr %arrayidx1, align 243 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.02544 %2 = load i16, ptr %arrayidx3, align 245 %conv = sext i16 %2 to i3246 %conv4 = sext i16 %0 to i3247 %mul = mul nsw i32 %conv, %conv448 %sext0 = sext i32 %mul to i6449 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add50 %3 = load i16, ptr %arrayidx6, align 251 %conv7 = sext i16 %3 to i3252 %conv8 = sext i16 %1 to i3253 %mul9 = mul nsw i32 %conv7, %conv854 %sext1 = sext i32 %mul9 to i6455 %add10 = add i64 %sext0, %mac1.02656 57; Here the Mul is the LHS, and the Add the RHS.58 %add11 = add i64 %sext1, %add1059 60 %exitcond = icmp ne i32 %add, %arg61 br i1 %exitcond, label %for.body, label %for.cond.cleanup62}63 64define dso_local arm_aapcs_vfpcc i64 @TwoReductions(i32 %arg, ptr nocapture readnone %arg1, ptr nocapture readonly %arg2, ptr nocapture readonly %arg3) {65;66; CHECK-LABEL: @TwoReductions67;68; CHECK: %mac1{{\.}}058 = phi i64 [ [[V10:%[0-9]+]], %for.body ], [ 0, %for.body.preheader ]69; CHECK: %mac2{{\.}}057 = phi i64 [ [[V17:%[0-9]+]], %for.body ], [ 0, %for.body.preheader ]70; CHECK: [[V10]] = call i64 @llvm.arm.smlald(i32 %{{.*}}, i32 %{{.*}}, i64 %mac1{{\.}}058)71; CHECK: [[V17]] = call i64 @llvm.arm.smlald(i32 %{{.*}}, i32 %{{.*}}, i64 %mac2{{\.}}057)72; CHECK-NOT: call i64 @llvm.arm.smlald73;74entry:75 %cmp55 = icmp sgt i32 %arg, 076 br i1 %cmp55, label %for.body.preheader, label %for.cond.cleanup77 78for.cond.cleanup:79 %mac2.0.lcssa = phi i64 [ 0, %entry ], [ %add28, %for.body ]80 %mac1.0.lcssa = phi i64 [ 0, %entry ], [ %add16, %for.body ]81 %add30 = add nsw i64 %mac1.0.lcssa, %mac2.0.lcssa82 ret i64 %add3083 84for.body.preheader:85 br label %for.body86 87for.body:88; And two reduction statements here:89 %mac1.058 = phi i64 [ %add16, %for.body ], [ 0, %for.body.preheader ]90 %mac2.057 = phi i64 [ %add28, %for.body ], [ 0, %for.body.preheader ]91 92 %i.056 = phi i32 [ %add29, %for.body ], [ 0, %for.body.preheader ]93 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.05694 %0 = load i16, ptr %arrayidx, align 295 %add1 = or disjoint i32 %i.056, 196 %arrayidx2 = getelementptr inbounds i16, ptr %arg3, i32 %add197 %1 = load i16, ptr %arrayidx2, align 298 %add3 = or disjoint i32 %i.056, 299 %arrayidx4 = getelementptr inbounds i16, ptr %arg3, i32 %add3100 %2 = load i16, ptr %arrayidx4, align 2101 102 %add5 = or disjoint i32 %i.056, 3103 %arrayidx6 = getelementptr inbounds i16, ptr %arg3, i32 %add5104 %3 = load i16, ptr %arrayidx6, align 2105 %arrayidx8 = getelementptr inbounds i16, ptr %arg2, i32 %i.056106 %4 = load i16, ptr %arrayidx8, align 2107 %conv = sext i16 %4 to i32108 %conv9 = sext i16 %0 to i32109 %mul = mul nsw i32 %conv, %conv9110 %sext0 = sext i32 %mul to i64111 %arrayidx11 = getelementptr inbounds i16, ptr %arg2, i32 %add1112 %5 = load i16, ptr %arrayidx11, align 2113 %conv12 = sext i16 %5 to i32114 %conv13 = sext i16 %1 to i32115 %mul14 = mul nsw i32 %conv12, %conv13116 %sext1 = sext i32 %mul14 to i64117 %add15 = add i64 %sext0, %mac1.058118 %add16 = add i64 %add15, %sext1119 %arrayidx18 = getelementptr inbounds i16, ptr %arg2, i32 %add3120 %6 = load i16, ptr %arrayidx18, align 2121 %conv19 = sext i16 %6 to i32122 %conv20 = sext i16 %2 to i32123 %mul21 = mul nsw i32 %conv19, %conv20124 %sext2 = sext i32 %mul21 to i64125 %arrayidx23 = getelementptr inbounds i16, ptr %arg2, i32 %add5126 %7 = load i16, ptr %arrayidx23, align 2127 %conv24 = sext i16 %7 to i32128 %conv25 = sext i16 %3 to i32129 %mul26 = mul nsw i32 %conv24, %conv25130 %sext3 = sext i32 %mul26 to i64131 %add27 = add i64 %sext2, %mac2.057132 %add28 = add i64 %add27, %sext3133 %add29 = add nuw nsw i32 %i.056, 4134 %cmp = icmp slt i32 %add29, %arg135 br i1 %cmp, label %for.body, label %for.cond.cleanup136}137 138define i64 @zext_mul_reduction(i32 %arg, ptr nocapture readnone %arg1, ptr nocapture readonly %arg2, ptr nocapture readonly %arg3) {139; CHECK-LABEL: @zext_mul_reduction140; CHECK-NOT: call i64 @llvm.arm.smlald141; CHECK-NOT: call i32 @llvm.arm.smlad142entry:143 %cmp24 = icmp sgt i32 %arg, 0144 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup145 146for.body.preheader:147 %.pre = load i16, ptr %arg3, align 2148 %.pre27 = load i16, ptr %arg2, align 2149 br label %for.body150 151for.cond.cleanup:152 %mac1.0.lcssa = phi i64 [ 0, %entry ], [ %add11, %for.body ]153 ret i64 %mac1.0.lcssa154 155for.body:156 %mac1.026 = phi i64 [ %add11, %for.body ], [ 0, %for.body.preheader ]157 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]158 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.025159 %0 = load i16, ptr %arrayidx, align 2160 %add = add nuw nsw i32 %i.025, 1161 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add162 %1 = load i16, ptr %arrayidx1, align 2163 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.025164 %2 = load i16, ptr %arrayidx3, align 2165 %conv = zext i16 %2 to i32166 %conv4 = sext i16 %0 to i32167 %mul = mul nsw i32 %conv, %conv4168 %sext0 = sext i32 %mul to i64169 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add170 %3 = load i16, ptr %arrayidx6, align 2171 %conv7 = zext i16 %3 to i32172 %conv8 = sext i16 %1 to i32173 %mul9 = mul nsw i32 %conv7, %conv8174 %sext1 = sext i32 %mul9 to i64175 %add10 = add i64 %sext0, %mac1.026176 %add11 = add i64 %sext1, %add10177 %exitcond = icmp ne i32 %add, %arg178 br i1 %exitcond, label %for.body, label %for.cond.cleanup179}180 181define i64 @zext_add_reduction(i32 %arg, ptr nocapture readnone %arg1, ptr nocapture readonly %arg2, ptr nocapture readonly %arg3) {182; CHECK-LABEL: @zext_add_reduction183; CHECK-NOT: call i64 @llvm.arm.smlald184; CHECK-NOT: call i32 @llvm.arm.smlad185entry:186 %cmp24 = icmp sgt i32 %arg, 0187 br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup188 189for.body.preheader:190 %.pre = load i16, ptr %arg3, align 2191 %.pre27 = load i16, ptr %arg2, align 2192 br label %for.body193 194for.cond.cleanup:195 %mac1.0.lcssa = phi i64 [ 0, %entry ], [ %add11, %for.body ]196 ret i64 %mac1.0.lcssa197 198for.body:199 %mac1.026 = phi i64 [ %add11, %for.body ], [ 0, %for.body.preheader ]200 %i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]201 %arrayidx = getelementptr inbounds i16, ptr %arg3, i32 %i.025202 %0 = load i16, ptr %arrayidx, align 2203 %add = add nuw nsw i32 %i.025, 1204 %arrayidx1 = getelementptr inbounds i16, ptr %arg3, i32 %add205 %1 = load i16, ptr %arrayidx1, align 2206 %arrayidx3 = getelementptr inbounds i16, ptr %arg2, i32 %i.025207 %2 = load i16, ptr %arrayidx3, align 2208 %conv = sext i16 %2 to i32209 %conv4 = sext i16 %0 to i32210 %mul = mul nsw i32 %conv, %conv4211 %sext0 = zext i32 %mul to i64212 %arrayidx6 = getelementptr inbounds i16, ptr %arg2, i32 %add213 %3 = load i16, ptr %arrayidx6, align 2214 %conv7 = sext i16 %3 to i32215 %conv8 = sext i16 %1 to i32216 %mul9 = mul nsw i32 %conv7, %conv8217 %sext1 = zext i32 %mul9 to i64218 %add10 = add i64 %sext0, %mac1.026219 %add11 = add i64 %sext1, %add10220 %exitcond = icmp ne i32 %add, %arg221 br i1 %exitcond, label %for.body, label %for.cond.cleanup222}223