271 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -mtriple=armv8-a-linux-gnueabihf -arm-parallel-dsp -dce --verify %s -S -o - | FileCheck %s3 4define dso_local void @a() align 2 {5; CHECK-LABEL: @a(6; CHECK-NEXT: for.end:7; CHECK-NEXT: [[B:%.*]] = alloca i32, align 48; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @a, align 29; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP0]] to i3210; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[CONV]], [[CONV]]11; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr getelementptr (i16, ptr @a, i32 1), align 212; CHECK-NEXT: [[CONV3:%.*]] = sext i16 [[TMP1]] to i3213; CHECK-NEXT: [[MUL6:%.*]] = mul nsw i32 [[CONV3]], [[CONV3]]14; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[MUL6]], [[MUL]]15; CHECK-NEXT: [[TMP2:%.*]] = load i16, ptr getelementptr (i16, ptr @a, i32 2), align 216; CHECK-NEXT: [[CONV11:%.*]] = sext i16 [[TMP2]] to i3217; CHECK-NEXT: [[MUL12:%.*]] = mul nsw i32 [[CONV11]], [[CONV3]]18; CHECK-NEXT: [[ADD14:%.*]] = add nsw i32 [[MUL12]], [[ADD]]19; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr getelementptr (i16, ptr @a, i32 3), align 220; CHECK-NEXT: [[CONV17:%.*]] = sext i16 [[TMP3]] to i3221; CHECK-NEXT: [[ADD19:%.*]] = add nsw i32 [[ADD14]], [[CONV17]]22; CHECK-NEXT: store i32 [[ADD19]], ptr [[B]], align 423; CHECK-NEXT: [[TMP4:%.*]] = load i16, ptr getelementptr (i16, ptr @a, i32 4), align 224; CHECK-NEXT: [[CONV21:%.*]] = sext i16 [[TMP4]] to i3225; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[CONV21]]26; CHECK-NEXT: [[ARRAYIDX22:%.*]] = getelementptr inbounds i32, ptr [[ADD_PTR]], i32 927; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[ARRAYIDX22]], align 428; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[TMP5]], 129; CHECK-NEXT: store i32 [[SHL]], ptr [[ARRAYIDX22]], align 430; CHECK-NEXT: br label [[FOR_COND23:%.*]]31; CHECK: for.cond23:32; CHECK-NEXT: br label [[FOR_COND23]]33;34for.end:35 %b = alloca i32, align 436 %0 = load i16, ptr @a, align 237 %conv = sext i16 %0 to i3238 %mul = mul nsw i32 %conv, %conv39 %1 = load i16, ptr getelementptr (i16, ptr @a, i32 1), align 240 %conv3 = sext i16 %1 to i3241 %mul6 = mul nsw i32 %conv3, %conv342 %add = add nuw nsw i32 %mul6, %mul43 %2 = load i16, ptr getelementptr (i16, ptr @a, i32 2), align 244 %conv11 = sext i16 %2 to i3245 %mul12 = mul nsw i32 %conv11, %conv346 %add14 = add nsw i32 %mul12, %add47 %3 = load i16, ptr getelementptr (i16, ptr @a, i32 3), align 248 %conv17 = sext i16 %3 to i3249 %add19 = add nsw i32 %add14, %conv1750 store i32 %add19, ptr %b, align 451 %4 = load i16, ptr getelementptr (i16, ptr @a, i32 4), align 252 %conv21 = sext i16 %4 to i3253 %add.ptr = getelementptr inbounds i32, ptr %b, i32 %conv2154 %arrayidx22 = getelementptr inbounds i32, ptr %add.ptr, i32 955 %5 = load i32, ptr %arrayidx22, align 456 %shl = shl i32 %5, 157 store i32 %shl, ptr %arrayidx22, align 458 br label %for.cond2359 60for.cond23: ; preds = %for.cond23, %for.end61 br label %for.cond2362}63 64define i32 @accumulate_square_a0(ptr %a, ptr %b, i32 %acc) {65; CHECK-LABEL: @accumulate_square_a0(66; CHECK-NEXT: entry:67; CHECK-NEXT: [[ADDR_A_1:%.*]] = getelementptr i16, ptr [[A:%.*]], i32 168; CHECK-NEXT: [[ADDR_B_1:%.*]] = getelementptr i16, ptr [[B:%.*]], i32 169; CHECK-NEXT: [[LD_A_0:%.*]] = load i16, ptr [[A]]70; CHECK-NEXT: [[SEXT_A_0:%.*]] = sext i16 [[LD_A_0]] to i3271; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ADDR_A_1]], align 272; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i1673; CHECK-NEXT: [[TMP3:%.*]] = sext i16 [[TMP2]] to i3274; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[ADDR_B_1]], align 275; CHECK-NEXT: [[TMP6:%.*]] = trunc i32 [[TMP5]] to i1676; CHECK-NEXT: [[TMP7:%.*]] = sext i16 [[TMP6]] to i3277; CHECK-NEXT: [[MUL_0:%.*]] = mul i32 [[SEXT_A_0]], [[SEXT_A_0]]78; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[MUL_0]], [[ACC:%.*]]79; CHECK-NEXT: [[MUL_1:%.*]] = mul i32 [[TMP3]], [[TMP7]]80; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[MUL_1]], [[TMP8]]81; CHECK-NEXT: [[TMP10:%.*]] = call i32 @llvm.arm.smlad(i32 [[TMP1]], i32 [[TMP5]], i32 [[TMP9]])82; CHECK-NEXT: ret i32 [[TMP10]]83;84entry:85 %addr.a.1 = getelementptr i16, ptr %a, i32 186 %addr.b.1 = getelementptr i16, ptr %b, i32 187 %ld.a.0 = load i16, ptr %a88 %sext.a.0 = sext i16 %ld.a.0 to i3289 %ld.b.0 = load i16, ptr %b90 %ld.a.1 = load i16, ptr %addr.a.191 %ld.b.1 = load i16, ptr %addr.b.192 %sext.a.1 = sext i16 %ld.a.1 to i3293 %sext.b.1 = sext i16 %ld.b.1 to i3294 %sext.b.0 = sext i16 %ld.b.0 to i3295 %mul.0 = mul i32 %sext.a.0, %sext.a.096 %mul.1 = mul i32 %sext.a.1, %sext.b.197 %addr.a.2 = getelementptr i16, ptr %a, i32 298 %addr.b.2 = getelementptr i16, ptr %b, i32 299 %ld.a.2 = load i16, ptr %addr.a.2100 %ld.b.2 = load i16, ptr %addr.b.2101 %sext.a.2 = sext i16 %ld.a.2 to i32102 %sext.b.2 = sext i16 %ld.b.2 to i32103 %mul.2 = mul i32 %sext.a.2, %sext.b.2104 %add = add i32 %mul.0, %mul.1105 %add.1 = add i32 %mul.1, %mul.2106 %add.2 = add i32 %add.1, %add107 %res = add i32 %add.2, %acc108 ret i32 %res109}110 111define i32 @accumulate_square_a2(ptr %a, ptr %b, i32 %acc) {112; CHECK-LABEL: @accumulate_square_a2(113; CHECK-NEXT: entry:114; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[A:%.*]], align 2115; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP1]], 16116; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i16117; CHECK-NEXT: [[TMP4:%.*]] = sext i16 [[TMP3]] to i32118; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[B:%.*]], align 2119; CHECK-NEXT: [[TMP7:%.*]] = lshr i32 [[TMP6]], 16120; CHECK-NEXT: [[TMP8:%.*]] = trunc i32 [[TMP7]] to i16121; CHECK-NEXT: [[TMP9:%.*]] = sext i16 [[TMP8]] to i32122; CHECK-NEXT: [[MUL_1:%.*]] = mul i32 [[TMP4]], [[TMP9]]123; CHECK-NEXT: [[ADDR_A_2:%.*]] = getelementptr i16, ptr [[A]], i32 2124; CHECK-NEXT: [[ADDR_B_2:%.*]] = getelementptr i16, ptr [[B]], i32 2125; CHECK-NEXT: [[LD_A_2:%.*]] = load i16, ptr [[ADDR_A_2]]126; CHECK-NEXT: [[LD_B_2:%.*]] = load i16, ptr [[ADDR_B_2]]127; CHECK-NEXT: [[SEXT_A_2:%.*]] = sext i16 [[LD_A_2]] to i32128; CHECK-NEXT: [[SEXT_B_2:%.*]] = sext i16 [[LD_B_2]] to i32129; CHECK-NEXT: [[MUL_2:%.*]] = mul i32 [[SEXT_A_2]], [[SEXT_A_2]]130; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[MUL_2]], [[ACC:%.*]]131; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[MUL_1]], [[TMP10]]132; CHECK-NEXT: [[TMP12:%.*]] = call i32 @llvm.arm.smlad(i32 [[TMP1]], i32 [[TMP6]], i32 [[TMP11]])133; CHECK-NEXT: [[RES:%.*]] = add i32 [[TMP12]], [[SEXT_B_2]]134; CHECK-NEXT: ret i32 [[RES]]135;136entry:137 %addr.a.1 = getelementptr i16, ptr %a, i32 1138 %addr.b.1 = getelementptr i16, ptr %b, i32 1139 %ld.a.0 = load i16, ptr %a140 %sext.a.0 = sext i16 %ld.a.0 to i32141 %ld.b.0 = load i16, ptr %b142 %ld.a.1 = load i16, ptr %addr.a.1143 %ld.b.1 = load i16, ptr %addr.b.1144 %sext.a.1 = sext i16 %ld.a.1 to i32145 %sext.b.1 = sext i16 %ld.b.1 to i32146 %sext.b.0 = sext i16 %ld.b.0 to i32147 %mul.0 = mul i32 %sext.a.0, %sext.b.0148 %mul.1 = mul i32 %sext.a.1, %sext.b.1149 %addr.a.2 = getelementptr i16, ptr %a, i32 2150 %addr.b.2 = getelementptr i16, ptr %b, i32 2151 %ld.a.2 = load i16, ptr %addr.a.2152 %ld.b.2 = load i16, ptr %addr.b.2153 %sext.a.2 = sext i16 %ld.a.2 to i32154 %sext.b.2 = sext i16 %ld.b.2 to i32155 %mul.2 = mul i32 %sext.a.2, %sext.a.2156 %add = add i32 %mul.0, %mul.1157 %add.1 = add i32 %mul.1, %mul.2158 %add.2 = add i32 %add.1, %add159 %add.3 = add i32 %add.2, %acc160 %res = add i32 %add.3, %sext.b.2161 ret i32 %res162}163 164define i32 @accumulate_square_b2(ptr %a, ptr %b, i32 %acc) {165; CHECK-LABEL: @accumulate_square_b2(166; CHECK-NEXT: entry:167; CHECK-NEXT: [[ADDR_A_1:%.*]] = getelementptr i16, ptr [[A:%.*]], i32 1168; CHECK-NEXT: [[ADDR_B_1:%.*]] = getelementptr i16, ptr [[B:%.*]], i32 1169; CHECK-NEXT: [[LD_A_0:%.*]] = load i16, ptr [[A]]170; CHECK-NEXT: [[SEXT_A_0:%.*]] = sext i16 [[LD_A_0]] to i32171; CHECK-NEXT: [[LD_A_1:%.*]] = load i16, ptr [[ADDR_A_1]]172; CHECK-NEXT: [[LD_B_1:%.*]] = load i16, ptr [[ADDR_B_1]]173; CHECK-NEXT: [[SEXT_A_1:%.*]] = sext i16 [[LD_A_1]] to i32174; CHECK-NEXT: [[SEXT_B_1:%.*]] = sext i16 [[LD_B_1]] to i32175; CHECK-NEXT: [[MUL_0:%.*]] = mul i32 [[SEXT_A_0]], [[SEXT_A_0]]176; CHECK-NEXT: [[MUL_1:%.*]] = mul i32 [[SEXT_A_1]], [[SEXT_B_1]]177; CHECK-NEXT: [[ADDR_B_2:%.*]] = getelementptr i16, ptr [[B]], i32 2178; CHECK-NEXT: [[LD_B_2:%.*]] = load i16, ptr [[ADDR_B_2]]179; CHECK-NEXT: [[SEXT_B_2:%.*]] = sext i16 [[LD_B_2]] to i32180; CHECK-NEXT: [[MUL_2:%.*]] = mul i32 [[SEXT_B_2]], [[SEXT_B_2]]181; CHECK-NEXT: [[ADD:%.*]] = add i32 [[MUL_0]], [[MUL_1]]182; CHECK-NEXT: [[ADD_1:%.*]] = add i32 [[MUL_1]], [[MUL_2]]183; CHECK-NEXT: [[ADD_2:%.*]] = add i32 [[ADD_1]], [[ADD]]184; CHECK-NEXT: [[RES:%.*]] = add i32 [[ADD_2]], [[ACC:%.*]]185; CHECK-NEXT: ret i32 [[RES]]186;187entry:188 %addr.a.1 = getelementptr i16, ptr %a, i32 1189 %addr.b.1 = getelementptr i16, ptr %b, i32 1190 %ld.a.0 = load i16, ptr %a191 %sext.a.0 = sext i16 %ld.a.0 to i32192 %ld.b.0 = load i16, ptr %b193 %ld.a.1 = load i16, ptr %addr.a.1194 %ld.b.1 = load i16, ptr %addr.b.1195 %sext.a.1 = sext i16 %ld.a.1 to i32196 %sext.b.1 = sext i16 %ld.b.1 to i32197 %sext.b.0 = sext i16 %ld.b.0 to i32198 %mul.0 = mul i32 %sext.a.0, %sext.a.0199 %mul.1 = mul i32 %sext.a.1, %sext.b.1200 %addr.a.2 = getelementptr i16, ptr %a, i32 2201 %addr.b.2 = getelementptr i16, ptr %b, i32 2202 %ld.a.2 = load i16, ptr %addr.a.2203 %ld.b.2 = load i16, ptr %addr.b.2204 %sext.a.2 = sext i16 %ld.a.2 to i32205 %sext.b.2 = sext i16 %ld.b.2 to i32206 %mul.2 = mul i32 %sext.b.2, %sext.b.2207 %add = add i32 %mul.0, %mul.1208 %add.1 = add i32 %mul.1, %mul.2209 %add.2 = add i32 %add.1, %add210 %add.3 = add i32 %add.2, %sext.a.2211 %res = add i32 %add.2, %acc212 ret i32 %res213}214 215define i32 @accumulate_square_a1(ptr %a, ptr %b, i32 %acc) {216; CHECK-LABEL: @accumulate_square_a1(217; CHECK-NEXT: entry:218; CHECK-NEXT: [[ADDR_A_1:%.*]] = getelementptr i16, ptr [[A:%.*]], i32 1219; CHECK-NEXT: [[ADDR_B_1:%.*]] = getelementptr i16, ptr [[B:%.*]], i32 1220; CHECK-NEXT: [[LD_A_0:%.*]] = load i16, ptr [[A]]221; CHECK-NEXT: [[SEXT_A_0:%.*]] = sext i16 [[LD_A_0]] to i32222; CHECK-NEXT: [[LD_A_1:%.*]] = load i16, ptr [[ADDR_A_1]]223; CHECK-NEXT: [[LD_B_1:%.*]] = load i16, ptr [[ADDR_B_1]]224; CHECK-NEXT: [[SEXT_A_1:%.*]] = sext i16 [[LD_A_1]] to i32225; CHECK-NEXT: [[SEXT_B_1:%.*]] = sext i16 [[LD_B_1]] to i32226; CHECK-NEXT: [[MUL_0:%.*]] = mul i32 [[SEXT_A_0]], [[SEXT_A_0]]227; CHECK-NEXT: [[MUL_1:%.*]] = mul i32 [[SEXT_A_1]], [[SEXT_A_1]]228; CHECK-NEXT: [[ADDR_A_2:%.*]] = getelementptr i16, ptr [[A]], i32 2229; CHECK-NEXT: [[ADDR_B_2:%.*]] = getelementptr i16, ptr [[B]], i32 2230; CHECK-NEXT: [[LD_A_2:%.*]] = load i16, ptr [[ADDR_A_2]]231; CHECK-NEXT: [[LD_B_2:%.*]] = load i16, ptr [[ADDR_B_2]]232; CHECK-NEXT: [[SEXT_A_2:%.*]] = sext i16 [[LD_A_2]] to i32233; CHECK-NEXT: [[SEXT_B_2:%.*]] = sext i16 [[LD_B_2]] to i32234; CHECK-NEXT: [[MUL_2:%.*]] = mul i32 [[SEXT_A_2]], [[SEXT_B_2]]235; CHECK-NEXT: [[ADD:%.*]] = add i32 [[MUL_1]], [[SEXT_B_1]]236; CHECK-NEXT: [[ADD_1:%.*]] = add i32 [[MUL_0]], [[ADD]]237; CHECK-NEXT: [[ADD_2:%.*]] = add i32 [[MUL_1]], [[MUL_2]]238; CHECK-NEXT: [[ADD_3:%.*]] = add i32 [[ADD_2]], [[ADD_1]]239; CHECK-NEXT: [[ADD_4:%.*]] = add i32 [[ADD_3]], [[SEXT_A_2]]240; CHECK-NEXT: [[RES:%.*]] = add i32 [[ADD_4]], [[ACC:%.*]]241; CHECK-NEXT: ret i32 [[RES]]242;243entry:244 %addr.a.1 = getelementptr i16, ptr %a, i32 1245 %addr.b.1 = getelementptr i16, ptr %b, i32 1246 %ld.a.0 = load i16, ptr %a247 %sext.a.0 = sext i16 %ld.a.0 to i32248 %ld.b.0 = load i16, ptr %b249 %ld.a.1 = load i16, ptr %addr.a.1250 %ld.b.1 = load i16, ptr %addr.b.1251 %sext.a.1 = sext i16 %ld.a.1 to i32252 %sext.b.1 = sext i16 %ld.b.1 to i32253 %sext.b.0 = sext i16 %ld.b.0 to i32254 %mul.0 = mul i32 %sext.a.0, %sext.a.0255 %mul.1 = mul i32 %sext.a.1, %sext.a.1256 %addr.a.2 = getelementptr i16, ptr %a, i32 2257 %addr.b.2 = getelementptr i16, ptr %b, i32 2258 %ld.a.2 = load i16, ptr %addr.a.2259 %ld.b.2 = load i16, ptr %addr.b.2260 %sext.a.2 = sext i16 %ld.a.2 to i32261 %sext.b.2 = sext i16 %ld.b.2 to i32262 %mul.2 = mul i32 %sext.a.2, %sext.b.2263 %add = add i32 %mul.1, %sext.b.1264 %add.1 = add i32 %mul.0, %add265 %add.2 = add i32 %mul.1, %mul.2266 %add.3 = add i32 %add.2, %add.1267 %add.4 = add i32 %add.3, %sext.a.2268 %res = add i32 %add.4, %acc269 ret i32 %res270}271