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1; RUN: llc -O1 -mattr=+splat-vfp-neon -mtriple=armv7-linux-gnueabi -verify-machineinstrs -disable-a15-sd-optimization < %s | FileCheck -check-prefixes=CHECK,CHECK-DISABLED %s2; RUN: llc -O1 -mattr=-splat-vfp-neon -mtriple=armv7-linux-gnueabi -verify-machineinstrs                              < %s | FileCheck -check-prefixes=CHECK,CHECK-DISABLED %s3; RUN: llc -O1 -mattr=+splat-vfp-neon -mtriple=armv7-linux-gnueabi -verify-machineinstrs                              < %s | FileCheck -check-prefixes=CHECK,CHECK-ENABLED  %s4 5; CHECK-LABEL: t1:6define <2 x float> @t1(float %f) {7  ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0]8  ; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0]9  %i1 = insertelement <2 x float> undef, float %f, i32 110  %i2 = fadd <2 x float> %i1, %i111  ret <2 x float> %i212}13 14; CHECK-LABEL: t2:15define <4 x float> @t2(float %g, float %f) {16  ; CHECK-ENABLED: vdup.32 q{{[0-9]*}}, d0[0]17  ; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0]18  %i1 = insertelement <4 x float> undef, float %f, i32 119  %i2 = fadd <4 x float> %i1, %i120  ret <4 x float> %i221}22 23; CHECK-LABEL: t3:24define arm_aapcs_vfpcc <2 x float> @t3(float %f) {25  ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0] 26  ; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0]27  %i1 = insertelement <2 x float> undef, float %f, i32 128  %i2 = fadd <2 x float> %i1, %i129  ret <2 x float> %i230}31 32; CHECK-LABEL: t4:33define <2 x float> @t4(float %f) {34  ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0]35  ; CHECK-DISABLED-NOT: vdup36  %i1 = insertelement <2 x float> undef, float %f, i32 137  br label %b38 39  ; Block %b has an S-reg as live-in.40b:41  %i2 = fadd <2 x float> %i1, %i142  ret <2 x float> %i243}44 45; CHECK-LABEL: t5:46define arm_aapcs_vfpcc <4 x float> @t5(<4 x float> %q, float %f) {47  ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d{{[0-9]*}}[0]48  ; CHECK-ENABLED: vadd.f3249  ; CHECK-ENABLED-NEXT: bx lr50  ; CHECK-DISABLED-NOT: vdup51  %i1 = insertelement <4 x float> %q, float %f, i32 152  %i2 = fadd <4 x float> %i1, %i153  ret <4 x float> %i254}55 56; Test that DPair can be successfully passed as QPR.57; CHECK-LABEL: test_DPair1:58define void @test_DPair1(i32 %vsout, ptr nocapture %out, float %x, float %y) {59entry:60  %0 = insertelement <4 x float> undef, float %x, i32 161  %1 = insertelement <4 x float> %0, float %y, i32 062  ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d{{[0-9]*}}[0]63  ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d{{[0-9]*}}[1]64  ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d{{[0-9]*}}[0]65  ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d{{[0-9]*}}[1]66  ; CHECK-DISABLED-NOT: vdup67  switch i32 %vsout, label %sw.epilog [68    i32 1, label %sw.bb69    i32 0, label %sw.bb670  ]71 72sw.bb:                                            ; preds = %entry73  %2 = insertelement <4 x float> %1, float 0.000000e+00, i32 074  br label %sw.bb675 76sw.bb6:                                           ; preds = %sw.bb, %entry77  %sum.0 = phi <4 x float> [ %1, %entry ], [ %2, %sw.bb ]78  %3 = extractelement <4 x float> %sum.0, i32 079  %conv = fptoui float %3 to i880  store i8 %conv, ptr %out, align 181  ret void82 83sw.epilog:                                        ; preds = %entry84  ret void85}86 87; CHECK-LABEL: test_DPair2:88define void @test_DPair2(i32 %vsout, ptr nocapture %out, float %x) {89entry:90  %0 = insertelement <4 x float> undef, float %x, i32 091  ; CHECK-ENABLED: vdup.32 q{{[0-9]*}}, d{{[0-9]*}}[0]92  ; CHECK-DISABLED-NOT: vdup93  switch i32 %vsout, label %sw.epilog [94    i32 1, label %sw.bb95    i32 0, label %sw.bb196  ]97 98sw.bb:                                            ; preds = %entry99  %1 = insertelement <4 x float> %0, float 0.000000e+00, i32 0100  br label %sw.bb1101 102sw.bb1:                                           ; preds = %entry, %sw.bb103  %sum.0 = phi <4 x float> [ %0, %entry ], [ %1, %sw.bb ]104  %2 = extractelement <4 x float> %sum.0, i32 0105  %conv = fptoui float %2 to i8106  store i8 %conv, ptr %out, align 1107  br label %sw.epilog108 109sw.epilog:                                        ; preds = %entry, %sw.bb1110  ret void111}112