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1; RUN: llc -mtriple=thumbv8m.main -mcpu=cortex-m33 %s -o - | FileCheck %s2; RUN: llc -mtriple=thumbv7em %s -o - | FileCheck %s3; RUN: llc -mtriple=armv6 %s -o - | FileCheck %s4; RUN: llc -mtriple=armv7 %s -o - | FileCheck %s5; RUN: llc -mtriple=armv8 %s -o - | FileCheck %s6 7; CHECK-LABEL: sxtb16_ror_88; CHECK: sxtb16 r0, r0, ror #89define i32 @sxtb16_ror_8(i32 %a) {10entry:11 %shr.i = lshr i32 %a, 812 %shl.i = shl i32 %a, 2413 %or.i = or i32 %shl.i, %shr.i14 %0 = tail call i32 @llvm.arm.sxtb16(i32 %or.i)15 ret i32 %016}17 18; CHECK-LABEL: sxtb16_ror_1619; CHECK: sxtb16 r0, r0, ror #1620define i32 @sxtb16_ror_16(i32 %a) {21entry:22 %shr.i = lshr i32 %a, 1623 %shl.i = shl i32 %a, 1624 %or.i = or i32 %shl.i, %shr.i25 %0 = tail call i32 @llvm.arm.sxtb16(i32 %or.i)26 ret i32 %027}28 29; CHECK-LABEL: sxtb16_ror_2430; CHECK: sxtb16 r0, r0, ror #2431define i32 @sxtb16_ror_24(i32 %a) {32entry:33 %shr.i = lshr i32 %a, 2434 %shl.i = shl i32 %a, 835 %or.i = or i32 %shl.i, %shr.i36 %0 = tail call i32 @llvm.arm.sxtb16(i32 %or.i)37 ret i32 %038}39 40; CHECK-LABEL: uxtb16_ror_841; CHECK: uxtb16 r0, r0, ror #842define i32 @uxtb16_ror_8(i32 %a) {43entry:44 %shr.i = lshr i32 %a, 845 %shl.i = shl i32 %a, 2446 %or.i = or i32 %shl.i, %shr.i47 %0 = tail call i32 @llvm.arm.uxtb16(i32 %or.i)48 ret i32 %049}50 51; CHECK-LABEL: uxtb16_ror_1652; CHECK: uxtb16 r0, r0, ror #1653define i32 @uxtb16_ror_16(i32 %a) {54entry:55 %shr.i = lshr i32 %a, 1656 %shl.i = shl i32 %a, 1657 %or.i = or i32 %shl.i, %shr.i58 %0 = tail call i32 @llvm.arm.uxtb16(i32 %or.i)59 ret i32 %060}61 62; CHECK-LABEL: uxtb16_ror_2463; CHECK: uxtb16 r0, r0, ror #2464define i32 @uxtb16_ror_24(i32 %a) {65entry:66 %shr.i = lshr i32 %a, 2467 %shl.i = shl i32 %a, 868 %or.i = or i32 %shl.i, %shr.i69 %0 = tail call i32 @llvm.arm.uxtb16(i32 %or.i)70 ret i32 %071}72 73; CHECK-LABEL: sxtab16_ror_874; CHECK: sxtab16 r0, r0, r1, ror #875define i32 @sxtab16_ror_8(i32 %a, i32 %b) {76entry:77 %shr.i = lshr i32 %b, 878 %shl.i = shl i32 %b, 2479 %or.i = or i32 %shl.i, %shr.i80 %0 = tail call i32 @llvm.arm.sxtab16(i32 %a, i32 %or.i)81 ret i32 %082}83 84; CHECK-LABEL: sxtab16_ror_1685; CHECK: sxtab16 r0, r0, r1, ror #1686define i32 @sxtab16_ror_16(i32 %a, i32 %b) {87entry:88 %shr.i = lshr i32 %b, 1689 %shl.i = shl i32 %b, 1690 %or.i = or i32 %shl.i, %shr.i91 %0 = tail call i32 @llvm.arm.sxtab16(i32 %a, i32 %or.i)92 ret i32 %093}94 95; CHECK-LABEL: sxtab16_ror_2496; CHECK: sxtab16 r0, r0, r1, ror #2497define i32 @sxtab16_ror_24(i32 %a, i32 %b) {98entry:99 %shr.i = lshr i32 %b, 24100 %shl.i = shl i32 %b, 8101 %or.i = or i32 %shl.i, %shr.i102 %0 = tail call i32 @llvm.arm.sxtab16(i32 %a, i32 %or.i)103 ret i32 %0104}105 106; CHECK-LABEL: uxtab16_ror_8107; CHECK: uxtab16 r0, r0, r1, ror #8108define i32 @uxtab16_ror_8(i32 %a, i32 %b) {109entry:110 %shr.i = lshr i32 %b, 8111 %shl.i = shl i32 %b, 24112 %or.i = or i32 %shl.i, %shr.i113 %0 = tail call i32 @llvm.arm.uxtab16(i32 %a, i32 %or.i)114 ret i32 %0115}116 117; CHECK-LABEL: uxtab16_ror_16118; CHECK: uxtab16 r0, r0, r1, ror #16119define i32 @uxtab16_ror_16(i32 %a, i32 %b) {120entry:121 %shr.i = lshr i32 %b, 16122 %shl.i = shl i32 %b, 16123 %or.i = or i32 %shl.i, %shr.i124 %0 = tail call i32 @llvm.arm.uxtab16(i32 %a, i32 %or.i)125 ret i32 %0126}127 128; CHECK-LABEL: uxtab16_ror_24129; CHECK: uxtab16 r0, r0, r1, ror #24130define i32 @uxtab16_ror_24(i32 %a, i32 %b) {131entry:132 %shr.i = lshr i32 %b, 24133 %shl.i = shl i32 %b, 8134 %or.i = or i32 %shl.i, %shr.i135 %0 = tail call i32 @llvm.arm.uxtab16(i32 %a, i32 %or.i)136 ret i32 %0137}138 139declare i32 @llvm.arm.sxtb16(i32)140declare i32 @llvm.arm.uxtb16(i32)141declare i32 @llvm.arm.sxtab16(i32, i32)142declare i32 @llvm.arm.uxtab16(i32, i32)143 144