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1; RUN: llc -O1 -mtriple=armv6-none-none-eabi %s -o - | FileCheck %s2; RUN: llc -O1 -mtriple=armv7-none-none-eabi %s -o - | FileCheck %s3; RUN: llc -O1 -mtriple=thumbv7-none-none-eabi %s -o - | FileCheck %s4; RUN: llc -O1 -mtriple=thumbv6t2-none-none-eabi %s -o - | FileCheck %s5; RUN: llc -O1 -mtriple=thumbv7em-none-none-eabi %s -o - | FileCheck %s6; RUN: llc -O1 -mtriple=thumbv8m.main-none-none-eabi -mattr=+dsp %s -o - | FileCheck %s7 8 9; upper-bound of the immediate argument10define i32 @ssat1(i32 %a) nounwind {11; CHECK-LABEL: ssat112; CHECK: ssat r0, #32, r013 %tmp = call i32 @llvm.arm.ssat(i32 %a, i32 32)14 ret i32 %tmp15}16 17; lower-bound of the immediate argument18define i32 @ssat2(i32 %a) nounwind {19; CHECK-LABEL: ssat220; CHECK: ssat r0, #1, r021 %tmp = call i32 @llvm.arm.ssat(i32 %a, i32 1)22 ret i32 %tmp23}24 25; upper-bound of the immediate argument26define i32 @usat1(i32 %a) nounwind {27; CHECK-LABEL: usat128; CHECK: usat r0, #31, r029 %tmp = call i32 @llvm.arm.usat(i32 %a, i32 31)30 ret i32 %tmp31}32 33; lower-bound of the immediate argument34define i32 @usat2(i32 %a) nounwind {35; CHECK-LABEL: usat236; CHECK: usat r0, #0, r037 %tmp = call i32 @llvm.arm.usat(i32 %a, i32 0)38 ret i32 %tmp39}40 41define i32 @ssat16 (i32 %a) nounwind {42; CHECK-LABEL: ssat1643; CHECK: ssat16 r0, #1, r044; CHECK: ssat16 r0, #16, r045 %tmp = call i32 @llvm.arm.ssat16(i32 %a, i32 1)46 %tmp2 = call i32 @llvm.arm.ssat16(i32 %tmp, i32 16)47 ret i32 %tmp248}49 50define i32 @usat16(i32 %a) nounwind {51; CHECK-LABEL: usat1652; CHECK: usat16 r0, #0, r053; CHECK: usat16 r0, #15, r054 %tmp = call i32 @llvm.arm.usat16(i32 %a, i32 0)55 %tmp2 = call i32 @llvm.arm.usat16(i32 %tmp, i32 15)56 ret i32 %tmp257}58 59define i32 @pack_unpack(i32 %a, i32 %b) nounwind {60; CHECK-LABEL: pack_unpack61; CHECK: sxtab16 r0, r0, r162; CHECK: sxtb16 r0, r063; CHECK: uxtab16 r0, r1, r064; CHECK: uxtb16 r0, r065 %tmp = call i32 @llvm.arm.sxtab16(i32 %a, i32 %b)66 %tmp1 = call i32 @llvm.arm.sxtb16(i32 %tmp)67 %tmp2 = call i32 @llvm.arm.uxtab16(i32 %b, i32 %tmp1)68 %tmp3 = call i32 @llvm.arm.uxtb16(i32 %tmp2)69 ret i32 %tmp370}71 72define i32 @sel(i32 %a, i32 %b) nounwind {73; CHECK-LABEL: sel74; CHECK: sel r0, r0, r175 %tmp = call i32 @llvm.arm.sel(i32 %a, i32 %b)76 ret i32 %tmp77}78 79define i32 @qadd8(i32 %a, i32 %b) nounwind {80; CHECK-LABEL: qadd881; CHECK: qadd8 r0, r0, r182 %tmp = call i32 @llvm.arm.qadd8(i32 %a, i32 %b)83 ret i32 %tmp84}85 86define i32 @qsub8(i32 %a, i32 %b) nounwind {87; CHECK-LABEL: qsub888; CHECK: qsub8 r0, r0, r189 %tmp = call i32 @llvm.arm.qsub8(i32 %a, i32 %b)90 ret i32 %tmp91}92 93define i32 @sadd8(i32 %a, i32 %b) nounwind {94; CHECK-LABEL: sadd895; CHECK: sadd8 r0, r0, r196 %tmp = call i32 @llvm.arm.sadd8(i32 %a, i32 %b)97 ret i32 %tmp98}99 100define i32 @shadd8(i32 %a, i32 %b) nounwind {101; CHECK-LABEL: shadd8102; CHECK: shadd8 r0, r0, r1103 %tmp = call i32 @llvm.arm.shadd8(i32 %a, i32 %b)104 ret i32 %tmp105}106 107define i32 @shsub8(i32 %a, i32 %b) nounwind {108; CHECK-LABEL: shsub8109; CHECK: shsub8 r0, r0, r1110 %tmp = call i32 @llvm.arm.shsub8(i32 %a, i32 %b)111 ret i32 %tmp112}113 114define i32 @ssub8(i32 %a, i32 %b) nounwind {115; CHECK-LABEL: ssub8116; CHECK: ssub8 r0, r0, r1117 %tmp = call i32 @llvm.arm.ssub8(i32 %a, i32 %b)118 ret i32 %tmp119}120 121define i32 @uadd8(i32 %a, i32 %b) nounwind {122; CHECK-LABEL: uadd8123; CHECK: uadd8 r0, r0, r1124 %tmp = call i32 @llvm.arm.uadd8(i32 %a, i32 %b)125 ret i32 %tmp126}127 128define i32 @uhadd8(i32 %a, i32 %b) nounwind {129; CHECK-LABEL: uhadd8130; CHECK: uhadd8 r0, r0, r1131 %tmp = call i32 @llvm.arm.uhadd8(i32 %a, i32 %b)132 ret i32 %tmp133}134 135define i32 @uhsub8(i32 %a, i32 %b) nounwind {136; CHECK-LABEL: uhsub8137; CHECK: uhsub8 r0, r0, r1138 %tmp = call i32 @llvm.arm.uhsub8(i32 %a, i32 %b)139 ret i32 %tmp140}141 142define i32 @uqadd8(i32 %a, i32 %b) nounwind {143; CHECK-LABEL: uqadd8144; CHECK: uqadd8 r0, r0, r1145 %tmp = call i32 @llvm.arm.uqadd8(i32 %a, i32 %b)146 ret i32 %tmp147}148 149define i32 @uqsub8(i32 %a, i32 %b) nounwind {150; CHECK-LABEL: uqsub8151; CHECK: uqsub8 r0, r0, r1152 %tmp = call i32 @llvm.arm.uqsub8(i32 %a, i32 %b)153 ret i32 %tmp154}155 156define i32 @usub8(i32 %a, i32 %b) nounwind {157; CHECK-LABEL: usub8158; CHECK: usub8 r0, r0, r1159 %tmp = call i32 @llvm.arm.usub8(i32 %a, i32 %b)160 ret i32 %tmp161}162 163define i32 @usad(i32 %a, i32 %b, i32 %c) nounwind {164; CHECK-LABEL: usad165; CHECK: usad8 r0, r0, r1166; CHECK: usada8 r0, r0, r1, r2167 %tmp = call i32 @llvm.arm.usad8(i32 %a, i32 %b)168 %tmp1 = call i32 @llvm.arm.usada8(i32 %tmp, i32 %b, i32 %c)169 ret i32 %tmp1170}171 172define i32 @qadd16(i32 %a, i32 %b) nounwind {173; CHECK-LABEL: qadd16174; CHECK: qadd16 r0, r0, r1175 %tmp = call i32 @llvm.arm.qadd16(i32 %a, i32 %b)176 ret i32 %tmp177}178 179define i32 @qasx(i32 %a, i32 %b) nounwind {180; CHECK-LABEL: qasx181; CHECK: qasx r0, r0, r1182 %tmp = call i32 @llvm.arm.qasx(i32 %a, i32 %b)183 ret i32 %tmp184}185 186define i32 @qsax(i32 %a, i32 %b) nounwind {187; CHECK-LABEL: qsax188; CHECK: qsax r0, r0, r1189 %tmp = call i32 @llvm.arm.qsax(i32 %a, i32 %b)190 ret i32 %tmp191}192 193define i32 @qsub16(i32 %a, i32 %b) nounwind {194; CHECK-LABEL: qsub16195; CHECK: qsub16 r0, r0, r1196 %tmp = call i32 @llvm.arm.qsub16(i32 %a, i32 %b)197 ret i32 %tmp198}199 200define i32 @sadd16(i32 %a, i32 %b) nounwind {201; CHECK-LABEL: sadd16202; CHECK: sadd16 r0, r0, r1203 %tmp = call i32 @llvm.arm.sadd16(i32 %a, i32 %b)204 ret i32 %tmp205}206 207define i32 @sasx(i32 %a, i32 %b) nounwind {208; CHECK-LABEL: sasx209; CHECK: sasx r0, r0, r1210 %tmp = call i32 @llvm.arm.sasx(i32 %a, i32 %b)211 ret i32 %tmp212}213 214define i32 @shadd16(i32 %a, i32 %b) nounwind {215; CHECK-LABEL: shadd16216; CHECK: shadd16 r0, r0, r1217 %tmp = call i32 @llvm.arm.shadd16(i32 %a, i32 %b)218 ret i32 %tmp219}220 221define i32 @shasx(i32 %a, i32 %b) nounwind {222; CHECK-LABEL: shasx223; CHECK: shasx r0, r0, r1224 %tmp = call i32 @llvm.arm.shasx(i32 %a, i32 %b)225 ret i32 %tmp226}227 228define i32 @shsax(i32 %a, i32 %b) nounwind {229; CHECK-LABEL: shsax230; CHECK: shsax r0, r0, r1231 %tmp = call i32 @llvm.arm.shsax(i32 %a, i32 %b)232 ret i32 %tmp233}234 235define i32 @shsub16(i32 %a, i32 %b) nounwind {236; CHECK-LABEL: shsub16237; CHECK: shsub16 r0, r0, r1238 %tmp = call i32 @llvm.arm.shsub16(i32 %a, i32 %b)239 ret i32 %tmp240}241 242define i32 @ssax(i32 %a, i32 %b) nounwind {243; CHECK-LABEL: ssax244; CHECK: ssax r0, r0, r1245 %tmp = call i32 @llvm.arm.ssax(i32 %a, i32 %b)246 ret i32 %tmp247}248 249define i32 @ssub16(i32 %a, i32 %b) nounwind {250; CHECK-LABEL: ssub16251; CHECK: ssub16 r0, r0, r1252 %tmp = call i32 @llvm.arm.ssub16(i32 %a, i32 %b)253 ret i32 %tmp254}255 256define i32 @uadd16(i32 %a, i32 %b) nounwind {257; CHECK-LABEL: uadd16258; CHECK: uadd16 r0, r0, r1259 %tmp = call i32 @llvm.arm.uadd16(i32 %a, i32 %b)260 ret i32 %tmp261}262 263define i32 @uasx(i32 %a, i32 %b) nounwind {264; CHECK-LABEL: uasx265; CHECK: uasx r0, r0, r1266 %tmp = call i32 @llvm.arm.uasx(i32 %a, i32 %b)267 ret i32 %tmp268}269 270define i32 @uhadd16(i32 %a, i32 %b) nounwind {271; CHECK-LABEL: uhadd16272; CHECK: uhadd16 r0, r0, r1273 %tmp = call i32 @llvm.arm.uhadd16(i32 %a, i32 %b)274 ret i32 %tmp275}276 277define i32 @uhasx(i32 %a, i32 %b) nounwind {278; CHECK-LABEL: uhasx279; CHECK: uhasx r0, r0, r1280 %tmp = call i32 @llvm.arm.uhasx(i32 %a, i32 %b)281 ret i32 %tmp282}283 284define i32 @uhsax(i32 %a, i32 %b) nounwind {285; CHECK-LABEL: uhsax286; CHECK: uhsax r0, r0, r1287 %tmp = call i32 @llvm.arm.uhsax(i32 %a, i32 %b)288 ret i32 %tmp289}290 291define i32 @uhsub16(i32 %a, i32 %b) nounwind {292; CHECK-LABEL: uhsub16293; CHECK: uhsub16 r0, r0, r1294 %tmp = call i32 @llvm.arm.uhsub16(i32 %a, i32 %b)295 ret i32 %tmp296}297 298define i32 @uqadd16(i32 %a, i32 %b) nounwind {299; CHECK-LABEL: uqadd16300; CHECK: uqadd16 r0, r0, r1301 %tmp = call i32 @llvm.arm.uqadd16(i32 %a, i32 %b)302 ret i32 %tmp303}304 305define i32 @uqasx(i32 %a, i32 %b) nounwind {306; CHECK-LABEL: uqasx307; CHECK: uqasx r0, r0, r1308 %tmp = call i32 @llvm.arm.uqasx(i32 %a, i32 %b)309 ret i32 %tmp310}311 312define i32 @uqsax(i32 %a, i32 %b) nounwind {313; CHECK-LABEL: uqsax314; CHECK: uqsax r0, r0, r1315 %tmp = call i32 @llvm.arm.uqsax(i32 %a, i32 %b)316 ret i32 %tmp317}318 319define i32 @uqsub16(i32 %a, i32 %b) nounwind {320; CHECK-LABEL: uqsub16321; CHECK: uqsub16 r0, r0, r1322 %tmp = call i32 @llvm.arm.uqsub16(i32 %a, i32 %b)323 ret i32 %tmp324}325 326define i32 @usax(i32 %a, i32 %b) nounwind {327; CHECK-LABEL: usax328; CHECK: usax r0, r0, r1329 %tmp = call i32 @llvm.arm.usax(i32 %a, i32 %b)330 ret i32 %tmp331}332 333define i32 @usub16(i32 %a, i32 %b) nounwind {334; CHECK-LABEL: usub16335; CHECK: usub16 r0, r0, r1336 %tmp = call i32 @llvm.arm.usub16(i32 %a, i32 %b)337 ret i32 %tmp338}339 340define i32 @smlad(i32 %a, i32 %b, i32 %c) nounwind {341; CHECK-LABEL: smlad342; CHECK: smlad r0, r0, r1, r2343 %tmp = call i32 @llvm.arm.smlad(i32 %a, i32 %b, i32 %c)344 ret i32 %tmp345}346 347define i32 @smladx(i32 %a, i32 %b, i32 %c) nounwind {348; CHECK-LABEL: smladx349; CHECK: smladx r0, r0, r1, r2350 %tmp = call i32 @llvm.arm.smladx(i32 %a, i32 %b, i32 %c)351 ret i32 %tmp352}353 354define i64 @smlald(i32 %a, i32 %b, i64 %c) nounwind {355; CHECK-LABEL: smlald356; CHECK: smlald r2, r3, r0, r1357 %tmp = call i64 @llvm.arm.smlald(i32 %a, i32 %b, i64 %c)358 ret i64 %tmp359}360 361define i64 @smlaldx(i32 %a, i32 %b, i64 %c) nounwind {362; CHECK-LABEL: smlaldx363; CHECK: smlaldx r2, r3, r0, r1364 %tmp = call i64 @llvm.arm.smlaldx(i32 %a, i32 %b, i64 %c)365 ret i64 %tmp366}367 368define i32 @smlsd(i32 %a, i32 %b, i32 %c) nounwind {369; CHECK-LABEL: smlsd370; CHECK: smlsd r0, r0, r1, r2371 %tmp = call i32 @llvm.arm.smlsd(i32 %a, i32 %b, i32 %c)372 ret i32 %tmp373}374 375define i32 @smlsdx(i32 %a, i32 %b, i32 %c) nounwind {376; CHECK-LABEL: smlsdx377; CHECK: smlsdx r0, r0, r1, r2378 %tmp = call i32 @llvm.arm.smlsdx(i32 %a, i32 %b, i32 %c)379 ret i32 %tmp380}381 382define i64 @smlsld(i32 %a, i32 %b, i64 %c) nounwind {383; CHECK-LABEL: smlsld384; CHECK: smlsld r2, r3, r0, r1385 %tmp = call i64 @llvm.arm.smlsld(i32 %a, i32 %b, i64 %c)386 ret i64 %tmp387}388 389define i64 @smlsldx(i32 %a, i32 %b, i64 %c) nounwind {390; CHECK-LABEL: smlsldx391; CHECK: smlsldx r2, r3, r0, r1392 %tmp = call i64 @llvm.arm.smlsldx(i32 %a, i32 %b, i64 %c)393 ret i64 %tmp394}395 396define i32 @smuad(i32 %a, i32 %b) nounwind {397; CHECK-LABEL: smuad398; CHECK: smuad r0, r0, r1399 %tmp = call i32 @llvm.arm.smuad(i32 %a, i32 %b)400 ret i32 %tmp401}402 403define i32 @smuadx(i32 %a, i32 %b) nounwind {404;CHECK-LABEL: smuadx405; CHECK: smuadx r0, r0, r1406 %tmp = call i32 @llvm.arm.smuadx(i32 %a, i32 %b)407 ret i32 %tmp408}409 410define i32 @smusd(i32 %a, i32 %b) nounwind {411; CHECK-LABEL: smusd412; CHECK: smusd r0, r0, r1413 %tmp = call i32 @llvm.arm.smusd(i32 %a, i32 %b)414 ret i32 %tmp415}416 417define i32 @smusdx(i32 %a, i32 %b) nounwind {418; CHECK-LABEL: smusdx419; CHECK: smusdx r0, r0, r1420 %tmp = call i32 @llvm.arm.smusdx(i32 %a, i32 %b)421 ret i32 %tmp422}423declare i32 @llvm.arm.ssat(i32, i32) nounwind readnone424declare i32 @llvm.arm.usat(i32, i32) nounwind readnone425declare i32 @llvm.arm.ssat16(i32, i32) nounwind426declare i32 @llvm.arm.usat16(i32, i32) nounwind427declare i32 @llvm.arm.sxtab16(i32, i32)428declare i32 @llvm.arm.sxtb16(i32)429declare i32 @llvm.arm.uxtab16(i32, i32)430declare i32 @llvm.arm.uxtb16(i32)431declare i32 @llvm.arm.sel(i32, i32) nounwind432declare i32 @llvm.arm.qadd8(i32, i32) nounwind433declare i32 @llvm.arm.qsub8(i32, i32) nounwind434declare i32 @llvm.arm.sadd8(i32, i32) nounwind435declare i32 @llvm.arm.shadd8(i32, i32) nounwind436declare i32 @llvm.arm.shsub8(i32, i32) nounwind437declare i32 @llvm.arm.ssub8(i32, i32) nounwind438declare i32 @llvm.arm.uadd8(i32, i32) nounwind439declare i32 @llvm.arm.uhadd8(i32, i32) nounwind440declare i32 @llvm.arm.uhsub8(i32, i32) nounwind441declare i32 @llvm.arm.uqadd8(i32, i32) nounwind442declare i32 @llvm.arm.uqsub8(i32, i32) nounwind443declare i32 @llvm.arm.usub8(i32, i32) nounwind444declare i32 @llvm.arm.usad8(i32, i32) nounwind readnone445declare i32 @llvm.arm.usada8(i32, i32, i32) nounwind readnone446declare i32 @llvm.arm.qadd16(i32, i32) nounwind447declare i32 @llvm.arm.qasx(i32, i32) nounwind448declare i32 @llvm.arm.qsax(i32, i32) nounwind449declare i32 @llvm.arm.qsub16(i32, i32) nounwind450declare i32 @llvm.arm.sadd16(i32, i32) nounwind451declare i32 @llvm.arm.sasx(i32, i32) nounwind452declare i32 @llvm.arm.shadd16(i32, i32) nounwind453declare i32 @llvm.arm.shasx(i32, i32) nounwind454declare i32 @llvm.arm.shsax(i32, i32) nounwind455declare i32 @llvm.arm.shsub16(i32, i32) nounwind456declare i32 @llvm.arm.ssax(i32, i32) nounwind457declare i32 @llvm.arm.ssub16(i32, i32) nounwind458declare i32 @llvm.arm.uadd16(i32, i32) nounwind459declare i32 @llvm.arm.uasx(i32, i32) nounwind460declare i32 @llvm.arm.usax(i32, i32) nounwind461declare i32 @llvm.arm.uhadd16(i32, i32) nounwind462declare i32 @llvm.arm.uhasx(i32, i32) nounwind463declare i32 @llvm.arm.uhsax(i32, i32) nounwind464declare i32 @llvm.arm.uhsub16(i32, i32) nounwind465declare i32 @llvm.arm.uqadd16(i32, i32) nounwind466declare i32 @llvm.arm.uqasx(i32, i32) nounwind467declare i32 @llvm.arm.uqsax(i32, i32) nounwind468declare i32 @llvm.arm.uqsub16(i32, i32) nounwind469declare i32 @llvm.arm.usub16(i32, i32) nounwind470declare i32 @llvm.arm.smlad(i32, i32, i32) nounwind471declare i32 @llvm.arm.smladx(i32, i32, i32) nounwind472declare i64 @llvm.arm.smlald(i32, i32, i64) nounwind473declare i64 @llvm.arm.smlaldx(i32, i32, i64) nounwind474declare i32 @llvm.arm.smlsd(i32, i32, i32) nounwind475declare i32 @llvm.arm.smlsdx(i32, i32, i32) nounwind476declare i64 @llvm.arm.smlsld(i32, i32, i64) nounwind477declare i64 @llvm.arm.smlsldx(i32, i32, i64) nounwind478declare i32 @llvm.arm.smuad(i32, i32) nounwind479declare i32 @llvm.arm.smuadx(i32, i32) nounwind480declare i32 @llvm.arm.smusd(i32, i32) nounwind481declare i32 @llvm.arm.smusdx(i32, i32) nounwind482