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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumbv6m-none-eabi %s -o - | FileCheck %s --check-prefixes=CHECK-T13; RUN: llc -mtriple=thumbv7m-none-eabi %s -o - | FileCheck %s --check-prefixes=CHECK-T24; RUN: llc -mtriple=armv7a-none-eabi %s -o - | FileCheck %s --check-prefixes=CHECK-A5 6define i32 @test_add_i3(i1 %tst, i32 %a, i32 %b) {7; CHECK-T1-LABEL: test_add_i3:8; CHECK-T1: @ %bb.0:9; CHECK-T1-NEXT: .save {r4, lr}10; CHECK-T1-NEXT: push {r4, lr}11; CHECK-T1-NEXT: lsls r0, r0, #3112; CHECK-T1-NEXT: bne .LBB0_213; CHECK-T1-NEXT: @ %bb.1:14; CHECK-T1-NEXT: movs r0, #315; CHECK-T1-NEXT: bics r2, r016; CHECK-T1-NEXT: mov r4, r217; CHECK-T1-NEXT: b .LBB0_318; CHECK-T1-NEXT: .LBB0_2:19; CHECK-T1-NEXT: mov r4, r120; CHECK-T1-NEXT: movs r0, #621; CHECK-T1-NEXT: bics r4, r022; CHECK-T1-NEXT: .LBB0_3:23; CHECK-T1-NEXT: mov r0, r424; CHECK-T1-NEXT: bl foo25; CHECK-T1-NEXT: adds r0, r4, #226; CHECK-T1-NEXT: pop {r4, pc}27;28; CHECK-T2-LABEL: test_add_i3:29; CHECK-T2: @ %bb.0:30; CHECK-T2-NEXT: .save {r4, lr}31; CHECK-T2-NEXT: push {r4, lr}32; CHECK-T2-NEXT: bic r4, r2, #333; CHECK-T2-NEXT: lsls r0, r0, #3134; CHECK-T2-NEXT: it ne35; CHECK-T2-NEXT: bicne r4, r1, #636; CHECK-T2-NEXT: mov r0, r437; CHECK-T2-NEXT: bl foo38; CHECK-T2-NEXT: adds r0, r4, #239; CHECK-T2-NEXT: pop {r4, pc}40;41; CHECK-A-LABEL: test_add_i3:42; CHECK-A: @ %bb.0:43; CHECK-A-NEXT: .save {r4, lr}44; CHECK-A-NEXT: push {r4, lr}45; CHECK-A-NEXT: bic r4, r2, #346; CHECK-A-NEXT: tst r0, #147; CHECK-A-NEXT: bicne r4, r1, #648; CHECK-A-NEXT: mov r0, r449; CHECK-A-NEXT: bl foo50; CHECK-A-NEXT: orr r0, r4, #251; CHECK-A-NEXT: pop {r4, pc}52 %tmp = and i32 %a, -753 %tmp1 = and i32 %b, -454 %int = select i1 %tst, i32 %tmp, i32 %tmp155 56 ; Call to force %int into a register that isn't r0 so using the i3 form is a57 ; good idea.58 call void @foo(i32 %int)59 %res = or i32 %int, 260 ret i32 %res61}62 63define i32 @test_add_i8(i32 %a, i32 %b, i1 %tst) {64; CHECK-T1-LABEL: test_add_i8:65; CHECK-T1: @ %bb.0:66; CHECK-T1-NEXT: lsls r2, r2, #3167; CHECK-T1-NEXT: bne .LBB1_268; CHECK-T1-NEXT: @ %bb.1:69; CHECK-T1-NEXT: ldr r0, .LCPI1_070; CHECK-T1-NEXT: ands r1, r071; CHECK-T1-NEXT: mov r0, r172; CHECK-T1-NEXT: adds r0, #1273; CHECK-T1-NEXT: bx lr74; CHECK-T1-NEXT: .LBB1_2:75; CHECK-T1-NEXT: movs r1, #25576; CHECK-T1-NEXT: bics r0, r177; CHECK-T1-NEXT: adds r0, #1278; CHECK-T1-NEXT: bx lr79; CHECK-T1-NEXT: .p2align 280; CHECK-T1-NEXT: @ %bb.3:81; CHECK-T1-NEXT: .LCPI1_0:82; CHECK-T1-NEXT: .long 4294966784 @ 0xfffffe0083;84; CHECK-T2-LABEL: test_add_i8:85; CHECK-T2: @ %bb.0:86; CHECK-T2-NEXT: movw r3, #51187; CHECK-T2-NEXT: bics r1, r388; CHECK-T2-NEXT: lsls r2, r2, #3189; CHECK-T2-NEXT: it ne90; CHECK-T2-NEXT: bicne r1, r0, #25591; CHECK-T2-NEXT: add.w r0, r1, #1292; CHECK-T2-NEXT: bx lr93;94; CHECK-A-LABEL: test_add_i8:95; CHECK-A: @ %bb.0:96; CHECK-A-NEXT: bfc r1, #0, #997; CHECK-A-NEXT: tst r2, #198; CHECK-A-NEXT: bicne r1, r0, #25599; CHECK-A-NEXT: orr r0, r1, #12100; CHECK-A-NEXT: bx lr101 %tmp = and i32 %a, -256102 %tmp1 = and i32 %b, -512103 %int = select i1 %tst, i32 %tmp, i32 %tmp1104 %res = or i32 %int, 12105 ret i32 %res106}107 108define i32 @test_add_i12(i32 %a, i32 %b, i1 %tst) {109; CHECK-T1-LABEL: test_add_i12:110; CHECK-T1: @ %bb.0:111; CHECK-T1-NEXT: lsls r2, r2, #31112; CHECK-T1-NEXT: bne .LBB2_2113; CHECK-T1-NEXT: @ %bb.1:114; CHECK-T1-NEXT: ldr r0, .LCPI2_1115; CHECK-T1-NEXT: ands r1, r0116; CHECK-T1-NEXT: mov r0, r1117; CHECK-T1-NEXT: b .LBB2_3118; CHECK-T1-NEXT: .LBB2_2:119; CHECK-T1-NEXT: ldr r1, .LCPI2_0120; CHECK-T1-NEXT: ands r0, r1121; CHECK-T1-NEXT: .LBB2_3:122; CHECK-T1-NEXT: ldr r1, .LCPI2_2123; CHECK-T1-NEXT: adds r0, r0, r1124; CHECK-T1-NEXT: bx lr125; CHECK-T1-NEXT: .p2align 2126; CHECK-T1-NEXT: @ %bb.4:127; CHECK-T1-NEXT: .LCPI2_0:128; CHECK-T1-NEXT: .long 4294963200 @ 0xfffff000129; CHECK-T1-NEXT: .LCPI2_1:130; CHECK-T1-NEXT: .long 4294959104 @ 0xffffe000131; CHECK-T1-NEXT: .LCPI2_2:132; CHECK-T1-NEXT: .long 854 @ 0x356133;134; CHECK-T2-LABEL: test_add_i12:135; CHECK-T2: @ %bb.0:136; CHECK-T2-NEXT: movw r3, #8191137; CHECK-T2-NEXT: bics r1, r3138; CHECK-T2-NEXT: movw r12, #4095139; CHECK-T2-NEXT: lsls r2, r2, #31140; CHECK-T2-NEXT: it ne141; CHECK-T2-NEXT: bicne.w r1, r0, r12142; CHECK-T2-NEXT: addw r0, r1, #854143; CHECK-T2-NEXT: bx lr144;145; CHECK-A-LABEL: test_add_i12:146; CHECK-A: @ %bb.0:147; CHECK-A-NEXT: bfc r0, #0, #12148; CHECK-A-NEXT: bfc r1, #0, #13149; CHECK-A-NEXT: tst r2, #1150; CHECK-A-NEXT: movne r1, r0151; CHECK-A-NEXT: movw r0, #854152; CHECK-A-NEXT: orr r0, r1, r0153; CHECK-A-NEXT: bx lr154 %tmp = and i32 %a, -4096155 %tmp1 = and i32 %b, -8192156 %int = select i1 %tst, i32 %tmp, i32 %tmp1157 %res = or i32 %int, 854158 ret i32 %res159}160 161define i32 @oradd(i32 %i, i32 %y) {162; CHECK-T1-LABEL: oradd:163; CHECK-T1: @ %bb.0: @ %entry164; CHECK-T1-NEXT: lsls r0, r0, #1165; CHECK-T1-NEXT: adds r0, r1, r0166; CHECK-T1-NEXT: adds r0, r0, #1167; CHECK-T1-NEXT: bx lr168;169; CHECK-T2-LABEL: oradd:170; CHECK-T2: @ %bb.0: @ %entry171; CHECK-T2-NEXT: add.w r0, r1, r0, lsl #1172; CHECK-T2-NEXT: adds r0, #1173; CHECK-T2-NEXT: bx lr174;175; CHECK-A-LABEL: oradd:176; CHECK-A: @ %bb.0: @ %entry177; CHECK-A-NEXT: add r0, r1, r0, lsl #1178; CHECK-A-NEXT: add r0, r0, #1179; CHECK-A-NEXT: bx lr180entry:181 %mul = shl i32 %i, 1182 %or = or i32 %mul, 1183 %add = add i32 %or, %y184 ret i32 %add185}186 187define i32 @orgep(i32 %i, ptr %x, ptr %y) {188; CHECK-T1-LABEL: orgep:189; CHECK-T1: @ %bb.0: @ %entry190; CHECK-T1-NEXT: lsls r0, r0, #3191; CHECK-T1-NEXT: adds r0, r1, r0192; CHECK-T1-NEXT: ldr r0, [r0, #4]193; CHECK-T1-NEXT: bx lr194;195; CHECK-T2-LABEL: orgep:196; CHECK-T2: @ %bb.0: @ %entry197; CHECK-T2-NEXT: add.w r0, r1, r0, lsl #3198; CHECK-T2-NEXT: ldr r0, [r0, #4]199; CHECK-T2-NEXT: bx lr200;201; CHECK-A-LABEL: orgep:202; CHECK-A: @ %bb.0: @ %entry203; CHECK-A-NEXT: add r0, r1, r0, lsl #3204; CHECK-A-NEXT: ldr r0, [r0, #4]205; CHECK-A-NEXT: bx lr206entry:207 %mul = shl i32 %i, 1208 %add = or i32 %mul, 1209 %arrayidx = getelementptr inbounds i32, ptr %x, i32 %add210 %0 = load i32, ptr %arrayidx, align 8211 ret i32 %0212}213 214define i32 @orgeps(i32 %i, ptr %x, ptr %y) {215; CHECK-T1-LABEL: orgeps:216; CHECK-T1: @ %bb.0: @ %entry217; CHECK-T1-NEXT: lsls r0, r0, #3218; CHECK-T1-NEXT: adds r0, r1, r0219; CHECK-T1-NEXT: ldr r1, [r0, #4]220; CHECK-T1-NEXT: ldr r0, [r0, #8]221; CHECK-T1-NEXT: adds r0, r0, r1222; CHECK-T1-NEXT: bx lr223;224; CHECK-T2-LABEL: orgeps:225; CHECK-T2: @ %bb.0: @ %entry226; CHECK-T2-NEXT: add.w r0, r1, r0, lsl #3227; CHECK-T2-NEXT: ldrd r0, r1, [r0, #4]228; CHECK-T2-NEXT: add r0, r1229; CHECK-T2-NEXT: bx lr230;231; CHECK-A-LABEL: orgeps:232; CHECK-A: @ %bb.0: @ %entry233; CHECK-A-NEXT: add r0, r1, r0, lsl #3234; CHECK-A-NEXT: ldrd r0, r1, [r0, #4]235; CHECK-A-NEXT: add r0, r1, r0236; CHECK-A-NEXT: bx lr237entry:238 %mul = shl i32 %i, 1239 %add = or i32 %mul, 1240 %arrayidx = getelementptr inbounds i32, ptr %x, i32 %add241 %0 = load i32, ptr %arrayidx, align 8242 %add2 = add i32 %mul, 2243 %arrayidx3 = getelementptr inbounds i32, ptr %x, i32 %add2244 %1 = load i32, ptr %arrayidx3, align 8245 %add4 = add i32 %1, %0246 ret i32 %add4247}248 249define i32 @multiuse(i32 %i, ptr %x, ptr %y) {250; CHECK-T1-LABEL: multiuse:251; CHECK-T1: @ %bb.0: @ %entry252; CHECK-T1-NEXT: lsls r0, r0, #1253; CHECK-T1-NEXT: adds r0, r0, #1254; CHECK-T1-NEXT: lsls r2, r0, #2255; CHECK-T1-NEXT: ldr r1, [r1, r2]256; CHECK-T1-NEXT: adds r0, r0, r1257; CHECK-T1-NEXT: bx lr258;259; CHECK-T2-LABEL: multiuse:260; CHECK-T2: @ %bb.0: @ %entry261; CHECK-T2-NEXT: lsls r0, r0, #1262; CHECK-T2-NEXT: adds r0, #1263; CHECK-T2-NEXT: ldr.w r1, [r1, r0, lsl #2]264; CHECK-T2-NEXT: add r0, r1265; CHECK-T2-NEXT: bx lr266;267; CHECK-A-LABEL: multiuse:268; CHECK-A: @ %bb.0: @ %entry269; CHECK-A-NEXT: mov r2, #1270; CHECK-A-NEXT: orr r0, r2, r0, lsl #1271; CHECK-A-NEXT: ldr r1, [r1, r0, lsl #2]272; CHECK-A-NEXT: add r0, r0, r1273; CHECK-A-NEXT: bx lr274entry:275 %mul = shl i32 %i, 1276 %add = or i32 %mul, 1277 %arrayidx = getelementptr inbounds i32, ptr %x, i32 %add278 %0 = load i32, ptr %arrayidx, align 8279 %r = add i32 %add, %0280 ret i32 %r281}282 283declare void @foo(i32)284