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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple armv8---eabi -mattr=+aes,+fix-cortex-a57-aes-1742098 -verify-machineinstrs -o - %s | FileCheck %s --check-prefixes=CHECK-FIX,CHECK-FIX-NOSCHED3 4; These CPUs should have the fix enabled by default. They use different5; FileCheck prefixes because some instructions are scheduled differently.6;7; RUN: llc -mtriple armv8---eabi -mcpu=cortex-a57 -verify-machineinstrs -o - %s | FileCheck %s --check-prefixes=CHECK-FIX,CHECK-CORTEX-FIX8; RUN: llc -mtriple armv8---eabi -mcpu=cortex-a72 -verify-machineinstrs -o - %s | FileCheck %s --check-prefixes=CHECK-FIX,CHECK-CORTEX-FIX9 10; This checks that adding `+fix-cortex-a57-aes-1742098` causes `vorr` to be11; inserted wherever the compiler cannot prove that either input to the first aes12; instruction in a fused aes pair was set by 64-bit Neon register writes or13; 128-bit Neon register writes. All other register writes are unsafe, and14; require a `vorr` to protect the AES input.15 16declare <16 x i8> @llvm.arm.neon.aese(<16 x i8>, <16 x i8>)17declare <16 x i8> @llvm.arm.neon.aesmc(<16 x i8>)18declare <16 x i8> @llvm.arm.neon.aesd(<16 x i8>, <16 x i8>)19declare <16 x i8> @llvm.arm.neon.aesimc(<16 x i8>)20 21declare arm_aapcs_vfpcc <16 x i8> @get_input() local_unnamed_addr22declare arm_aapcs_vfpcc <16 x i8> @get_inputf16(half) local_unnamed_addr23declare arm_aapcs_vfpcc <16 x i8> @get_inputf32(float) local_unnamed_addr24 25 26 27define arm_aapcs_vfpcc void @aese_zero(ptr %0) nounwind {28; CHECK-FIX-LABEL: aese_zero:29; CHECK-FIX:       @ %bb.0:30; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r0]31; CHECK-FIX-NEXT:    vmov.i32 q9, #0x032; CHECK-FIX-NEXT:    aese.8 q9, q833; CHECK-FIX-NEXT:    aesmc.8 q8, q934; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r0]35; CHECK-FIX-NEXT:    bx lr36  %2 = load <16 x i8>, ptr %0, align 837  %3 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> zeroinitializer, <16 x i8> %2)38  %4 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %3)39  store <16 x i8> %4, ptr %0, align 840  ret void41}42 43define arm_aapcs_vfpcc void @aese_via_call1(ptr %0) nounwind {44; CHECK-FIX-LABEL: aese_via_call1:45; CHECK-FIX:       @ %bb.0:46; CHECK-FIX-NEXT:    .save {r4, lr}47; CHECK-FIX-NEXT:    push {r4, lr}48; CHECK-FIX-NEXT:    mov r4, r049; CHECK-FIX-NEXT:    bl get_input50; CHECK-FIX-NEXT:    vorr q0, q0, q051; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r4]52; CHECK-FIX-NEXT:    aese.8 q8, q053; CHECK-FIX-NEXT:    aesmc.8 q8, q854; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r4]55; CHECK-FIX-NEXT:    pop {r4, pc}56  %2 = call arm_aapcs_vfpcc <16 x i8> @get_input()57  %3 = load <16 x i8>, ptr %0, align 858  %4 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %2, <16 x i8> %3)59  %5 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %4)60  store <16 x i8> %5, ptr %0, align 861  ret void62}63 64define arm_aapcs_vfpcc void @aese_via_call2(half %0, ptr %1) nounwind {65; CHECK-FIX-LABEL: aese_via_call2:66; CHECK-FIX:       @ %bb.0:67; CHECK-FIX-NEXT:    .save {r4, lr}68; CHECK-FIX-NEXT:    push {r4, lr}69; CHECK-FIX-NEXT:    mov r4, r070; CHECK-FIX-NEXT:    bl get_inputf1671; CHECK-FIX-NEXT:    vorr q0, q0, q072; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r4]73; CHECK-FIX-NEXT:    aese.8 q8, q074; CHECK-FIX-NEXT:    aesmc.8 q8, q875; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r4]76; CHECK-FIX-NEXT:    pop {r4, pc}77  %3 = call arm_aapcs_vfpcc <16 x i8> @get_inputf16(half %0)78  %4 = load <16 x i8>, ptr %1, align 879  %5 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %3, <16 x i8> %4)80  %6 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %5)81  store <16 x i8> %6, ptr %1, align 882  ret void83}84 85define arm_aapcs_vfpcc void @aese_via_call3(float %0, ptr %1) nounwind {86; CHECK-FIX-LABEL: aese_via_call3:87; CHECK-FIX:       @ %bb.0:88; CHECK-FIX-NEXT:    .save {r4, lr}89; CHECK-FIX-NEXT:    push {r4, lr}90; CHECK-FIX-NEXT:    mov r4, r091; CHECK-FIX-NEXT:    bl get_inputf3292; CHECK-FIX-NEXT:    vorr q0, q0, q093; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r4]94; CHECK-FIX-NEXT:    aese.8 q8, q095; CHECK-FIX-NEXT:    aesmc.8 q8, q896; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r4]97; CHECK-FIX-NEXT:    pop {r4, pc}98  %3 = call arm_aapcs_vfpcc <16 x i8> @get_inputf32(float %0)99  %4 = load <16 x i8>, ptr %1, align 8100  %5 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %3, <16 x i8> %4)101  %6 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %5)102  store <16 x i8> %6, ptr %1, align 8103  ret void104}105 106define arm_aapcs_vfpcc void @aese_once_via_ptr(ptr %0, ptr %1) nounwind {107; CHECK-FIX-LABEL: aese_once_via_ptr:108; CHECK-FIX:       @ %bb.0:109; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r0]110; CHECK-FIX-NEXT:    vld1.64 {d18, d19}, [r1]111; CHECK-FIX-NEXT:    aese.8 q9, q8112; CHECK-FIX-NEXT:    aesmc.8 q8, q9113; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r1]114; CHECK-FIX-NEXT:    bx lr115  %3 = load <16 x i8>, ptr %1, align 8116  %4 = load <16 x i8>, ptr %0, align 8117  %5 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %3, <16 x i8> %4)118  %6 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %5)119  store <16 x i8> %6, ptr %1, align 8120  ret void121}122 123define arm_aapcs_vfpcc <16 x i8> @aese_once_via_val(<16 x i8> %0, <16 x i8> %1) nounwind {124; CHECK-FIX-LABEL: aese_once_via_val:125; CHECK-FIX:       @ %bb.0:126; CHECK-FIX-NEXT:    vorr q0, q0, q0127; CHECK-FIX-NEXT:    vorr q1, q1, q1128; CHECK-FIX-NEXT:    aese.8 q0, q1129; CHECK-FIX-NEXT:    aesmc.8 q0, q0130; CHECK-FIX-NEXT:    bx lr131  %3 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %1, <16 x i8> %0)132  %4 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %3)133  ret <16 x i8> %4134}135 136define arm_aapcs_vfpcc void @aese_twice_via_ptr(ptr %0, ptr %1) nounwind {137; CHECK-FIX-LABEL: aese_twice_via_ptr:138; CHECK-FIX:       @ %bb.0:139; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r0]140; CHECK-FIX-NEXT:    vld1.64 {d18, d19}, [r1]141; CHECK-FIX-NEXT:    aese.8 q9, q8142; CHECK-FIX-NEXT:    aesmc.8 q8, q9143; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r1]144; CHECK-FIX-NEXT:    vld1.64 {d18, d19}, [r0]145; CHECK-FIX-NEXT:    aese.8 q9, q8146; CHECK-FIX-NEXT:    aesmc.8 q8, q9147; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r1]148; CHECK-FIX-NEXT:    bx lr149  %3 = load <16 x i8>, ptr %1, align 8150  %4 = load <16 x i8>, ptr %0, align 8151  %5 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %3, <16 x i8> %4)152  %6 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %5)153  store <16 x i8> %6, ptr %1, align 8154  %7 = load <16 x i8>, ptr %0, align 8155  %8 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %6, <16 x i8> %7)156  %9 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %8)157  store <16 x i8> %9, ptr %1, align 8158  ret void159}160 161define arm_aapcs_vfpcc <16 x i8> @aese_twice_via_val(<16 x i8> %0, <16 x i8> %1) nounwind {162; CHECK-FIX-LABEL: aese_twice_via_val:163; CHECK-FIX:       @ %bb.0:164; CHECK-FIX-NEXT:    vorr q1, q1, q1165; CHECK-FIX-NEXT:    vorr q0, q0, q0166; CHECK-FIX-NEXT:    vorr q0, q0, q0167; CHECK-FIX-NEXT:    aese.8 q1, q0168; CHECK-FIX-NEXT:    aesmc.8 q8, q1169; CHECK-FIX-NEXT:    aese.8 q8, q0170; CHECK-FIX-NEXT:    aesmc.8 q0, q8171; CHECK-FIX-NEXT:    bx lr172  %3 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %1, <16 x i8> %0)173  %4 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %3)174  %5 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %4, <16 x i8> %0)175  %6 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %5)176  ret <16 x i8> %6177}178 179define arm_aapcs_vfpcc void @aese_loop_via_ptr(i32 %0, ptr %1, ptr %2) nounwind {180; CHECK-FIX-NOSCHED-LABEL: aese_loop_via_ptr:181; CHECK-FIX-NOSCHED:       @ %bb.0:182; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #0183; CHECK-FIX-NOSCHED-NEXT:    bxeq lr184; CHECK-FIX-NOSCHED-NEXT:  .LBB8_1: @ =>This Inner Loop Header: Depth=1185; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r1]186; CHECK-FIX-NOSCHED-NEXT:    subs r0, r0, #1187; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d18, d19}, [r2]188; CHECK-FIX-NOSCHED-NEXT:    aese.8 q9, q8189; CHECK-FIX-NOSCHED-NEXT:    aesmc.8 q8, q9190; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r2]191; CHECK-FIX-NOSCHED-NEXT:    bne .LBB8_1192; CHECK-FIX-NOSCHED-NEXT:  @ %bb.2:193; CHECK-FIX-NOSCHED-NEXT:    bx lr194;195; CHECK-CORTEX-FIX-LABEL: aese_loop_via_ptr:196; CHECK-CORTEX-FIX:       @ %bb.0:197; CHECK-CORTEX-FIX-NEXT:    cmp r0, #0198; CHECK-CORTEX-FIX-NEXT:    bxeq lr199; CHECK-CORTEX-FIX-NEXT:  .LBB8_1: @ =>This Inner Loop Header: Depth=1200; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r1]201; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d18, d19}, [r2]202; CHECK-CORTEX-FIX-NEXT:    subs r0, r0, #1203; CHECK-CORTEX-FIX-NEXT:    aese.8 q9, q8204; CHECK-CORTEX-FIX-NEXT:    aesmc.8 q8, q9205; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r2]206; CHECK-CORTEX-FIX-NEXT:    bne .LBB8_1207; CHECK-CORTEX-FIX-NEXT:  @ %bb.2:208; CHECK-CORTEX-FIX-NEXT:    bx lr209  %4 = icmp eq i32 %0, 0210  br i1 %4, label %5, label %6211 2125:213  ret void214 2156:216  %7 = phi i32 [ %12, %6 ], [ 0, %3 ]217  %8 = load <16 x i8>, ptr %2, align 8218  %9 = load <16 x i8>, ptr %1, align 8219  %10 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %8, <16 x i8> %9)220  %11 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %10)221  store <16 x i8> %11, ptr %2, align 8222  %12 = add nuw i32 %7, 1223  %13 = icmp eq i32 %12, %0224  br i1 %13, label %5, label %6225}226 227define arm_aapcs_vfpcc <16 x i8> @aese_loop_via_val(i32 %0, <16 x i8> %1, <16 x i8> %2) nounwind {228; CHECK-FIX-LABEL: aese_loop_via_val:229; CHECK-FIX:       @ %bb.0:230; CHECK-FIX-NEXT:    vorr q1, q1, q1231; CHECK-FIX-NEXT:    vorr q0, q0, q0232; CHECK-FIX-NEXT:    cmp r0, #0233; CHECK-FIX-NEXT:    beq .LBB9_2234; CHECK-FIX-NEXT:  .LBB9_1: @ =>This Inner Loop Header: Depth=1235; CHECK-FIX-NEXT:    aese.8 q1, q0236; CHECK-FIX-NEXT:    subs r0, r0, #1237; CHECK-FIX-NEXT:    aesmc.8 q1, q1238; CHECK-FIX-NEXT:    bne .LBB9_1239; CHECK-FIX-NEXT:  .LBB9_2:240; CHECK-FIX-NEXT:    vorr q0, q1, q1241; CHECK-FIX-NEXT:    bx lr242  %4 = icmp eq i32 %0, 0243  br i1 %4, label %5, label %7244 2455:246  %6 = phi <16 x i8> [ %2, %3 ], [ %11, %7 ]247  ret <16 x i8> %6248 2497:250  %8 = phi i32 [ %12, %7 ], [ 0, %3 ]251  %9 = phi <16 x i8> [ %11, %7 ], [ %2, %3 ]252  %10 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %9, <16 x i8> %1)253  %11 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %10)254  %12 = add nuw i32 %8, 1255  %13 = icmp eq i32 %12, %0256  br i1 %13, label %5, label %7257}258 259define arm_aapcs_vfpcc void @aese_set8_via_ptr(ptr %0, <16 x i8> %1, ptr %2) nounwind {260; CHECK-FIX-NOSCHED-LABEL: aese_set8_via_ptr:261; CHECK-FIX-NOSCHED:       @ %bb.0:262; CHECK-FIX-NOSCHED-NEXT:    vorr q0, q0, q0263; CHECK-FIX-NOSCHED-NEXT:    ldrb r0, [r0]264; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r1]265; CHECK-FIX-NOSCHED-NEXT:    vmov.8 d0[0], r0266; CHECK-FIX-NOSCHED-NEXT:    vmov.8 d16[0], r0267; CHECK-FIX-NOSCHED-NEXT:    aese.8 q8, q0268; CHECK-FIX-NOSCHED-NEXT:    aesmc.8 q8, q8269; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r1]270; CHECK-FIX-NOSCHED-NEXT:    bx lr271;272; CHECK-CORTEX-FIX-LABEL: aese_set8_via_ptr:273; CHECK-CORTEX-FIX:       @ %bb.0:274; CHECK-CORTEX-FIX-NEXT:    vorr q0, q0, q0275; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r1]276; CHECK-CORTEX-FIX-NEXT:    ldrb r0, [r0]277; CHECK-CORTEX-FIX-NEXT:    vmov.8 d0[0], r0278; CHECK-CORTEX-FIX-NEXT:    vmov.8 d16[0], r0279; CHECK-CORTEX-FIX-NEXT:    aese.8 q8, q0280; CHECK-CORTEX-FIX-NEXT:    aesmc.8 q8, q8281; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r1]282; CHECK-CORTEX-FIX-NEXT:    bx lr283  %4 = load i8, ptr %0, align 1284  %5 = load <16 x i8>, ptr %2, align 8285  %6 = insertelement <16 x i8> %5, i8 %4, i64 0286  %7 = insertelement <16 x i8> %1, i8 %4, i64 0287  %8 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %6, <16 x i8> %7)288  %9 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %8)289  store <16 x i8> %9, ptr %2, align 8290  ret void291}292 293define arm_aapcs_vfpcc void @aese_set8_via_val(i8 zeroext %0, <16 x i8> %1, ptr %2) nounwind {294; CHECK-FIX-LABEL: aese_set8_via_val:295; CHECK-FIX:       @ %bb.0:296; CHECK-FIX-NEXT:    vorr q0, q0, q0297; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r1]298; CHECK-FIX-NEXT:    vmov.8 d0[0], r0299; CHECK-FIX-NEXT:    vmov.8 d16[0], r0300; CHECK-FIX-NEXT:    aese.8 q8, q0301; CHECK-FIX-NEXT:    aesmc.8 q8, q8302; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r1]303; CHECK-FIX-NEXT:    bx lr304  %4 = load <16 x i8>, ptr %2, align 8305  %5 = insertelement <16 x i8> %4, i8 %0, i64 0306  %6 = insertelement <16 x i8> %1, i8 %0, i64 0307  %7 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %5, <16 x i8> %6)308  %8 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %7)309  store <16 x i8> %8, ptr %2, align 8310  ret void311}312 313define arm_aapcs_vfpcc void @aese_set8_cond_via_ptr(i1 zeroext %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {314; CHECK-FIX-LABEL: aese_set8_cond_via_ptr:315; CHECK-FIX:       @ %bb.0:316; CHECK-FIX-NEXT:    vorr q0, q0, q0317; CHECK-FIX-NEXT:    cmp r0, #0318; CHECK-FIX-NEXT:    beq .LBB12_2319; CHECK-FIX-NEXT:  @ %bb.1:320; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]321; CHECK-FIX-NEXT:    vld1.8 {d16[0]}, [r1]322; CHECK-FIX-NEXT:    cmp r0, #0323; CHECK-FIX-NEXT:    bne .LBB12_3324; CHECK-FIX-NEXT:    b .LBB12_4325; CHECK-FIX-NEXT:  .LBB12_2:326; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]327; CHECK-FIX-NEXT:    cmp r0, #0328; CHECK-FIX-NEXT:    beq .LBB12_4329; CHECK-FIX-NEXT:  .LBB12_3:330; CHECK-FIX-NEXT:    vld1.8 {d0[0]}, [r1]331; CHECK-FIX-NEXT:  .LBB12_4:332; CHECK-FIX-NEXT:    aese.8 q8, q0333; CHECK-FIX-NEXT:    aesmc.8 q8, q8334; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]335; CHECK-FIX-NEXT:    bx lr336  br i1 %0, label %5, label %9337 3385:339  %6 = load i8, ptr %1, align 1340  %7 = load <16 x i8>, ptr %3, align 8341  %8 = insertelement <16 x i8> %7, i8 %6, i64 0342  br label %11343 3449:345  %10 = load <16 x i8>, ptr %3, align 8346  br label %11347 34811:349  %12 = phi <16 x i8> [ %8, %5 ], [ %10, %9 ]350  br i1 %0, label %13, label %16351 35213:353  %14 = load i8, ptr %1, align 1354  %15 = insertelement <16 x i8> %2, i8 %14, i64 0355  br label %16356 35716:358  %17 = phi <16 x i8> [ %15, %13 ], [ %2, %11 ]359  %18 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %12, <16 x i8> %17)360  %19 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %18)361  store <16 x i8> %19, ptr %3, align 8362  ret void363}364 365define arm_aapcs_vfpcc void @aese_set8_cond_via_val(i1 zeroext %0, i8 zeroext %1, <16 x i8> %2, ptr %3) nounwind {366; CHECK-FIX-LABEL: aese_set8_cond_via_val:367; CHECK-FIX:       @ %bb.0:368; CHECK-FIX-NEXT:    vorr q0, q0, q0369; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]370; CHECK-FIX-NEXT:    cmp r0, #0371; CHECK-FIX-NEXT:    beq .LBB13_2372; CHECK-FIX-NEXT:  @ %bb.1:373; CHECK-FIX-NEXT:    vmov.8 d16[0], r1374; CHECK-FIX-NEXT:  .LBB13_2: @ %select.end375; CHECK-FIX-NEXT:    cmp r0, #0376; CHECK-FIX-NEXT:    beq .LBB13_4377; CHECK-FIX-NEXT:  @ %bb.3:378; CHECK-FIX-NEXT:    vmov.8 d0[0], r1379; CHECK-FIX-NEXT:  .LBB13_4: @ %select.end2380; CHECK-FIX-NEXT:    aese.8 q8, q0381; CHECK-FIX-NEXT:    aesmc.8 q8, q8382; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]383; CHECK-FIX-NEXT:    bx lr384  %5 = load <16 x i8>, ptr %3, align 8385  %6 = insertelement <16 x i8> %5, i8 %1, i64 0386  %7 = select i1 %0, <16 x i8> %6, <16 x i8> %5387  %8 = insertelement <16 x i8> %2, i8 %1, i64 0388  %9 = select i1 %0, <16 x i8> %8, <16 x i8> %2389  %10 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %7, <16 x i8> %9)390  %11 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %10)391  store <16 x i8> %11, ptr %3, align 8392  ret void393}394 395define arm_aapcs_vfpcc void @aese_set8_loop_via_ptr(i32 %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {396; CHECK-FIX-LABEL: aese_set8_loop_via_ptr:397; CHECK-FIX:       @ %bb.0:398; CHECK-FIX-NEXT:    vorr q0, q0, q0399; CHECK-FIX-NEXT:    ldrb r1, [r1]400; CHECK-FIX-NEXT:    cmp r0, #0401; CHECK-FIX-NEXT:    strb r1, [r2]402; CHECK-FIX-NEXT:    bxeq lr403; CHECK-FIX-NEXT:  .LBB14_1:404; CHECK-FIX-NEXT:    vmov.8 d0[0], r1405; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]406; CHECK-FIX-NEXT:  .LBB14_2: @ =>This Inner Loop Header: Depth=1407; CHECK-FIX-NEXT:    aese.8 q8, q0408; CHECK-FIX-NEXT:    subs r0, r0, #1409; CHECK-FIX-NEXT:    aesmc.8 q8, q8410; CHECK-FIX-NEXT:    bne .LBB14_2411; CHECK-FIX-NEXT:  @ %bb.3:412; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]413; CHECK-FIX-NEXT:    bx lr414  %5 = load i8, ptr %1, align 1415  %6 = insertelement <16 x i8> %2, i8 %5, i64 0416  %7 = getelementptr inbounds <16 x i8>, ptr %3, i32 0, i32 0417  store i8 %5, ptr %7, align 8418  %8 = icmp eq i32 %0, 0419  br i1 %8, label %12, label %9420 4219:422  %10 = load <16 x i8>, ptr %3, align 8423  br label %13424 42511:426  store <16 x i8> %17, ptr %3, align 8427  br label %12428 42912:430  ret void431 43213:433  %14 = phi <16 x i8> [ %10, %9 ], [ %17, %13 ]434  %15 = phi i32 [ 0, %9 ], [ %18, %13 ]435  %16 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %14, <16 x i8> %6)436  %17 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %16)437  %18 = add nuw i32 %15, 1438  %19 = icmp eq i32 %18, %0439  br i1 %19, label %11, label %13440}441 442define arm_aapcs_vfpcc void @aese_set8_loop_via_val(i32 %0, i8 zeroext %1, <16 x i8> %2, ptr %3) nounwind {443; CHECK-FIX-LABEL: aese_set8_loop_via_val:444; CHECK-FIX:       @ %bb.0:445; CHECK-FIX-NEXT:    vorr q0, q0, q0446; CHECK-FIX-NEXT:    cmp r0, #0447; CHECK-FIX-NEXT:    bxeq lr448; CHECK-FIX-NEXT:  .LBB15_1:449; CHECK-FIX-NEXT:    vmov.8 d0[0], r1450; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]451; CHECK-FIX-NEXT:  .LBB15_2: @ =>This Inner Loop Header: Depth=1452; CHECK-FIX-NEXT:    vmov.8 d16[0], r1453; CHECK-FIX-NEXT:    subs r0, r0, #1454; CHECK-FIX-NEXT:    aese.8 q8, q0455; CHECK-FIX-NEXT:    aesmc.8 q8, q8456; CHECK-FIX-NEXT:    bne .LBB15_2457; CHECK-FIX-NEXT:  @ %bb.3:458; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]459; CHECK-FIX-NEXT:    bx lr460  %5 = icmp eq i32 %0, 0461  br i1 %5, label %10, label %6462 4636:464  %7 = insertelement <16 x i8> %2, i8 %1, i64 0465  %8 = load <16 x i8>, ptr %3, align 8466  br label %11467 4689:469  store <16 x i8> %16, ptr %3, align 8470  br label %10471 47210:473  ret void474 47511:476  %12 = phi <16 x i8> [ %8, %6 ], [ %16, %11 ]477  %13 = phi i32 [ 0, %6 ], [ %17, %11 ]478  %14 = insertelement <16 x i8> %12, i8 %1, i64 0479  %15 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %14, <16 x i8> %7)480  %16 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %15)481  %17 = add nuw i32 %13, 1482  %18 = icmp eq i32 %17, %0483  br i1 %18, label %9, label %11484}485 486define arm_aapcs_vfpcc void @aese_set16_via_ptr(ptr %0, <16 x i8> %1, ptr %2) nounwind {487; CHECK-FIX-NOSCHED-LABEL: aese_set16_via_ptr:488; CHECK-FIX-NOSCHED:       @ %bb.0:489; CHECK-FIX-NOSCHED-NEXT:    vorr q0, q0, q0490; CHECK-FIX-NOSCHED-NEXT:    ldrh r0, [r0]491; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r1]492; CHECK-FIX-NOSCHED-NEXT:    vmov.16 d0[0], r0493; CHECK-FIX-NOSCHED-NEXT:    vmov.16 d16[0], r0494; CHECK-FIX-NOSCHED-NEXT:    aese.8 q8, q0495; CHECK-FIX-NOSCHED-NEXT:    aesmc.8 q8, q8496; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r1]497; CHECK-FIX-NOSCHED-NEXT:    bx lr498;499; CHECK-CORTEX-FIX-LABEL: aese_set16_via_ptr:500; CHECK-CORTEX-FIX:       @ %bb.0:501; CHECK-CORTEX-FIX-NEXT:    vorr q0, q0, q0502; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r1]503; CHECK-CORTEX-FIX-NEXT:    ldrh r0, [r0]504; CHECK-CORTEX-FIX-NEXT:    vmov.16 d0[0], r0505; CHECK-CORTEX-FIX-NEXT:    vmov.16 d16[0], r0506; CHECK-CORTEX-FIX-NEXT:    aese.8 q8, q0507; CHECK-CORTEX-FIX-NEXT:    aesmc.8 q8, q8508; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r1]509; CHECK-CORTEX-FIX-NEXT:    bx lr510  %4 = load i16, ptr %0, align 2511  %5 = bitcast ptr %2 to ptr512  %6 = load <8 x i16>, ptr %5, align 8513  %7 = insertelement <8 x i16> %6, i16 %4, i64 0514  %8 = bitcast <8 x i16> %7 to <16 x i8>515  %9 = bitcast <16 x i8> %1 to <8 x i16>516  %10 = insertelement <8 x i16> %9, i16 %4, i64 0517  %11 = bitcast <8 x i16> %10 to <16 x i8>518  %12 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %8, <16 x i8> %11)519  %13 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %12)520  store <16 x i8> %13, ptr %2, align 8521  ret void522}523 524define arm_aapcs_vfpcc void @aese_set16_via_val(i16 zeroext %0, <16 x i8> %1, ptr %2) nounwind {525; CHECK-FIX-LABEL: aese_set16_via_val:526; CHECK-FIX:       @ %bb.0:527; CHECK-FIX-NEXT:    vorr q0, q0, q0528; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r1]529; CHECK-FIX-NEXT:    vmov.16 d0[0], r0530; CHECK-FIX-NEXT:    vmov.16 d16[0], r0531; CHECK-FIX-NEXT:    aese.8 q8, q0532; CHECK-FIX-NEXT:    aesmc.8 q8, q8533; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r1]534; CHECK-FIX-NEXT:    bx lr535  %4 = bitcast ptr %2 to ptr536  %5 = load <8 x i16>, ptr %4, align 8537  %6 = insertelement <8 x i16> %5, i16 %0, i64 0538  %7 = bitcast <8 x i16> %6 to <16 x i8>539  %8 = bitcast <16 x i8> %1 to <8 x i16>540  %9 = insertelement <8 x i16> %8, i16 %0, i64 0541  %10 = bitcast <8 x i16> %9 to <16 x i8>542  %11 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %7, <16 x i8> %10)543  %12 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %11)544  store <16 x i8> %12, ptr %2, align 8545  ret void546}547 548define arm_aapcs_vfpcc void @aese_set16_cond_via_ptr(i1 zeroext %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {549; CHECK-FIX-LABEL: aese_set16_cond_via_ptr:550; CHECK-FIX:       @ %bb.0:551; CHECK-FIX-NEXT:    vorr q0, q0, q0552; CHECK-FIX-NEXT:    cmp r0, #0553; CHECK-FIX-NEXT:    beq .LBB18_2554; CHECK-FIX-NEXT:  @ %bb.1:555; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]556; CHECK-FIX-NEXT:    vld1.16 {d16[0]}, [r1:16]557; CHECK-FIX-NEXT:    cmp r0, #0558; CHECK-FIX-NEXT:    bne .LBB18_3559; CHECK-FIX-NEXT:    b .LBB18_4560; CHECK-FIX-NEXT:  .LBB18_2:561; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]562; CHECK-FIX-NEXT:    cmp r0, #0563; CHECK-FIX-NEXT:    beq .LBB18_4564; CHECK-FIX-NEXT:  .LBB18_3:565; CHECK-FIX-NEXT:    vld1.16 {d0[0]}, [r1:16]566; CHECK-FIX-NEXT:  .LBB18_4:567; CHECK-FIX-NEXT:    aese.8 q8, q0568; CHECK-FIX-NEXT:    aesmc.8 q8, q8569; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]570; CHECK-FIX-NEXT:    bx lr571  br i1 %0, label %5, label %10572 5735:574  %6 = load i16, ptr %1, align 2575  %7 = bitcast ptr %3 to ptr576  %8 = load <8 x i16>, ptr %7, align 8577  %9 = insertelement <8 x i16> %8, i16 %6, i64 0578  br label %13579 58010:581  %11 = bitcast ptr %3 to ptr582  %12 = load <8 x i16>, ptr %11, align 8583  br label %13584 58513:586  %14 = phi <8 x i16> [ %9, %5 ], [ %12, %10 ]587  br i1 %0, label %15, label %19588 58915:590  %16 = load i16, ptr %1, align 2591  %17 = bitcast <16 x i8> %2 to <8 x i16>592  %18 = insertelement <8 x i16> %17, i16 %16, i64 0593  br label %21594 59519:596  %20 = bitcast <16 x i8> %2 to <8 x i16>597  br label %21598 59921:600  %22 = phi <8 x i16> [ %18, %15 ], [ %20, %19 ]601  %23 = bitcast <8 x i16> %14 to <16 x i8>602  %24 = bitcast <8 x i16> %22 to <16 x i8>603  %25 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %23, <16 x i8> %24)604  %26 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %25)605  store <16 x i8> %26, ptr %3, align 8606  ret void607}608 609define arm_aapcs_vfpcc void @aese_set16_cond_via_val(i1 zeroext %0, i16 zeroext %1, <16 x i8> %2, ptr %3) nounwind {610; CHECK-FIX-LABEL: aese_set16_cond_via_val:611; CHECK-FIX:       @ %bb.0:612; CHECK-FIX-NEXT:    vorr q0, q0, q0613; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]614; CHECK-FIX-NEXT:    cmp r0, #0615; CHECK-FIX-NEXT:    beq .LBB19_2616; CHECK-FIX-NEXT:  @ %bb.1:617; CHECK-FIX-NEXT:    vmov.16 d16[0], r1618; CHECK-FIX-NEXT:  .LBB19_2: @ %select.end619; CHECK-FIX-NEXT:    cmp r0, #0620; CHECK-FIX-NEXT:    beq .LBB19_4621; CHECK-FIX-NEXT:  @ %bb.3:622; CHECK-FIX-NEXT:    vmov.16 d0[0], r1623; CHECK-FIX-NEXT:  .LBB19_4: @ %select.end2624; CHECK-FIX-NEXT:    aese.8 q8, q0625; CHECK-FIX-NEXT:    aesmc.8 q8, q8626; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]627; CHECK-FIX-NEXT:    bx lr628  %5 = bitcast ptr %3 to ptr629  %6 = load <8 x i16>, ptr %5, align 8630  %7 = insertelement <8 x i16> %6, i16 %1, i64 0631  %8 = select i1 %0, <8 x i16> %7, <8 x i16> %6632  %9 = bitcast <16 x i8> %2 to <8 x i16>633  %10 = insertelement <8 x i16> %9, i16 %1, i64 0634  %11 = select i1 %0, <8 x i16> %10, <8 x i16> %9635  %12 = bitcast <8 x i16> %8 to <16 x i8>636  %13 = bitcast <8 x i16> %11 to <16 x i8>637  %14 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %12, <16 x i8> %13)638  %15 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %14)639  store <16 x i8> %15, ptr %3, align 8640  ret void641}642 643define arm_aapcs_vfpcc void @aese_set16_loop_via_ptr(i32 %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {644; CHECK-FIX-LABEL: aese_set16_loop_via_ptr:645; CHECK-FIX:       @ %bb.0:646; CHECK-FIX-NEXT:    vorr q0, q0, q0647; CHECK-FIX-NEXT:    ldrh r1, [r1]648; CHECK-FIX-NEXT:    cmp r0, #0649; CHECK-FIX-NEXT:    strh r1, [r2]650; CHECK-FIX-NEXT:    bxeq lr651; CHECK-FIX-NEXT:  .LBB20_1:652; CHECK-FIX-NEXT:    vmov.16 d0[0], r1653; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]654; CHECK-FIX-NEXT:  .LBB20_2: @ =>This Inner Loop Header: Depth=1655; CHECK-FIX-NEXT:    aese.8 q8, q0656; CHECK-FIX-NEXT:    subs r0, r0, #1657; CHECK-FIX-NEXT:    aesmc.8 q8, q8658; CHECK-FIX-NEXT:    bne .LBB20_2659; CHECK-FIX-NEXT:  @ %bb.3:660; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]661; CHECK-FIX-NEXT:    bx lr662  %5 = load i16, ptr %1, align 2663  %6 = bitcast <16 x i8> %2 to <8 x i16>664  %7 = insertelement <8 x i16> %6, i16 %5, i64 0665  %8 = bitcast <8 x i16> %7 to <16 x i8>666  %9 = bitcast ptr %3 to ptr667  store i16 %5, ptr %9, align 8668  %10 = icmp eq i32 %0, 0669  br i1 %10, label %14, label %11670 67111:672  %12 = load <16 x i8>, ptr %3, align 8673  br label %15674 67513:676  store <16 x i8> %19, ptr %3, align 8677  br label %14678 67914:680  ret void681 68215:683  %16 = phi <16 x i8> [ %12, %11 ], [ %19, %15 ]684  %17 = phi i32 [ 0, %11 ], [ %20, %15 ]685  %18 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %16, <16 x i8> %8)686  %19 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %18)687  %20 = add nuw i32 %17, 1688  %21 = icmp eq i32 %20, %0689  br i1 %21, label %13, label %15690}691 692define arm_aapcs_vfpcc void @aese_set16_loop_via_val(i32 %0, i16 zeroext %1, <16 x i8> %2, ptr %3) nounwind {693; CHECK-FIX-LABEL: aese_set16_loop_via_val:694; CHECK-FIX:       @ %bb.0:695; CHECK-FIX-NEXT:    vorr q0, q0, q0696; CHECK-FIX-NEXT:    cmp r0, #0697; CHECK-FIX-NEXT:    bxeq lr698; CHECK-FIX-NEXT:  .LBB21_1:699; CHECK-FIX-NEXT:    vmov.16 d0[0], r1700; CHECK-FIX-NEXT:  .LBB21_2: @ =>This Inner Loop Header: Depth=1701; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]702; CHECK-FIX-NEXT:    subs r0, r0, #1703; CHECK-FIX-NEXT:    vmov.16 d16[0], r1704; CHECK-FIX-NEXT:    aese.8 q8, q0705; CHECK-FIX-NEXT:    aesmc.8 q8, q8706; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]707; CHECK-FIX-NEXT:    bne .LBB21_2708; CHECK-FIX-NEXT:  @ %bb.3:709; CHECK-FIX-NEXT:    bx lr710  %5 = icmp eq i32 %0, 0711  br i1 %5, label %12, label %6712 7136:714  %7 = bitcast <16 x i8> %2 to <8 x i16>715  %8 = insertelement <8 x i16> %7, i16 %1, i64 0716  %9 = bitcast <8 x i16> %8 to <16 x i8>717  %10 = bitcast ptr %3 to ptr718  %11 = bitcast ptr %3 to ptr719  br label %13720 72112:722  ret void723 72413:725  %14 = phi i32 [ 0, %6 ], [ %20, %13 ]726  %15 = load <8 x i16>, ptr %10, align 8727  %16 = insertelement <8 x i16> %15, i16 %1, i64 0728  %17 = bitcast <8 x i16> %16 to <16 x i8>729  store i16 %1, ptr %11, align 8730  %18 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %17, <16 x i8> %9)731  %19 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %18)732  store <16 x i8> %19, ptr %3, align 8733  %20 = add nuw i32 %14, 1734  %21 = icmp eq i32 %20, %0735  br i1 %21, label %12, label %13736}737 738define arm_aapcs_vfpcc void @aese_set32_via_ptr(ptr %0, <16 x i8> %1, ptr %2) nounwind {739; CHECK-FIX-NOSCHED-LABEL: aese_set32_via_ptr:740; CHECK-FIX-NOSCHED:       @ %bb.0:741; CHECK-FIX-NOSCHED-NEXT:    vorr q0, q0, q0742; CHECK-FIX-NOSCHED-NEXT:    ldr r0, [r0]743; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r1]744; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d0[0], r0745; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d16[0], r0746; CHECK-FIX-NOSCHED-NEXT:    aese.8 q8, q0747; CHECK-FIX-NOSCHED-NEXT:    aesmc.8 q8, q8748; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r1]749; CHECK-FIX-NOSCHED-NEXT:    bx lr750;751; CHECK-CORTEX-FIX-LABEL: aese_set32_via_ptr:752; CHECK-CORTEX-FIX:       @ %bb.0:753; CHECK-CORTEX-FIX-NEXT:    vorr q0, q0, q0754; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r1]755; CHECK-CORTEX-FIX-NEXT:    ldr r0, [r0]756; CHECK-CORTEX-FIX-NEXT:    vmov.32 d0[0], r0757; CHECK-CORTEX-FIX-NEXT:    vmov.32 d16[0], r0758; CHECK-CORTEX-FIX-NEXT:    aese.8 q8, q0759; CHECK-CORTEX-FIX-NEXT:    aesmc.8 q8, q8760; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r1]761; CHECK-CORTEX-FIX-NEXT:    bx lr762  %4 = load i32, ptr %0, align 4763  %5 = bitcast ptr %2 to ptr764  %6 = load <4 x i32>, ptr %5, align 8765  %7 = insertelement <4 x i32> %6, i32 %4, i64 0766  %8 = bitcast <4 x i32> %7 to <16 x i8>767  %9 = bitcast <16 x i8> %1 to <4 x i32>768  %10 = insertelement <4 x i32> %9, i32 %4, i64 0769  %11 = bitcast <4 x i32> %10 to <16 x i8>770  %12 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %8, <16 x i8> %11)771  %13 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %12)772  store <16 x i8> %13, ptr %2, align 8773  ret void774}775 776define arm_aapcs_vfpcc void @aese_set32_via_val(i32 %0, <16 x i8> %1, ptr %2) nounwind {777; CHECK-FIX-LABEL: aese_set32_via_val:778; CHECK-FIX:       @ %bb.0:779; CHECK-FIX-NEXT:    vorr q0, q0, q0780; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r1]781; CHECK-FIX-NEXT:    vmov.32 d0[0], r0782; CHECK-FIX-NEXT:    vmov.32 d16[0], r0783; CHECK-FIX-NEXT:    aese.8 q8, q0784; CHECK-FIX-NEXT:    aesmc.8 q8, q8785; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r1]786; CHECK-FIX-NEXT:    bx lr787  %4 = bitcast ptr %2 to ptr788  %5 = load <4 x i32>, ptr %4, align 8789  %6 = insertelement <4 x i32> %5, i32 %0, i64 0790  %7 = bitcast <4 x i32> %6 to <16 x i8>791  %8 = bitcast <16 x i8> %1 to <4 x i32>792  %9 = insertelement <4 x i32> %8, i32 %0, i64 0793  %10 = bitcast <4 x i32> %9 to <16 x i8>794  %11 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %7, <16 x i8> %10)795  %12 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %11)796  store <16 x i8> %12, ptr %2, align 8797  ret void798}799 800define arm_aapcs_vfpcc void @aese_set32_cond_via_ptr(i1 zeroext %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {801; CHECK-FIX-LABEL: aese_set32_cond_via_ptr:802; CHECK-FIX:       @ %bb.0:803; CHECK-FIX-NEXT:    vorr q0, q0, q0804; CHECK-FIX-NEXT:    cmp r0, #0805; CHECK-FIX-NEXT:    beq .LBB24_2806; CHECK-FIX-NEXT:  @ %bb.1:807; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]808; CHECK-FIX-NEXT:    vld1.32 {d16[0]}, [r1:32]809; CHECK-FIX-NEXT:    cmp r0, #0810; CHECK-FIX-NEXT:    bne .LBB24_3811; CHECK-FIX-NEXT:    b .LBB24_4812; CHECK-FIX-NEXT:  .LBB24_2:813; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]814; CHECK-FIX-NEXT:    cmp r0, #0815; CHECK-FIX-NEXT:    beq .LBB24_4816; CHECK-FIX-NEXT:  .LBB24_3:817; CHECK-FIX-NEXT:    vld1.32 {d0[0]}, [r1:32]818; CHECK-FIX-NEXT:  .LBB24_4:819; CHECK-FIX-NEXT:    aese.8 q8, q0820; CHECK-FIX-NEXT:    aesmc.8 q8, q8821; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]822; CHECK-FIX-NEXT:    bx lr823  br i1 %0, label %5, label %10824 8255:826  %6 = load i32, ptr %1, align 4827  %7 = bitcast ptr %3 to ptr828  %8 = load <4 x i32>, ptr %7, align 8829  %9 = insertelement <4 x i32> %8, i32 %6, i64 0830  br label %13831 83210:833  %11 = bitcast ptr %3 to ptr834  %12 = load <4 x i32>, ptr %11, align 8835  br label %13836 83713:838  %14 = phi <4 x i32> [ %9, %5 ], [ %12, %10 ]839  br i1 %0, label %15, label %19840 84115:842  %16 = load i32, ptr %1, align 4843  %17 = bitcast <16 x i8> %2 to <4 x i32>844  %18 = insertelement <4 x i32> %17, i32 %16, i64 0845  br label %21846 84719:848  %20 = bitcast <16 x i8> %2 to <4 x i32>849  br label %21850 85121:852  %22 = phi <4 x i32> [ %18, %15 ], [ %20, %19 ]853  %23 = bitcast <4 x i32> %14 to <16 x i8>854  %24 = bitcast <4 x i32> %22 to <16 x i8>855  %25 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %23, <16 x i8> %24)856  %26 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %25)857  store <16 x i8> %26, ptr %3, align 8858  ret void859}860 861define arm_aapcs_vfpcc void @aese_set32_cond_via_val(i1 zeroext %0, i32 %1, <16 x i8> %2, ptr %3) nounwind {862; CHECK-FIX-LABEL: aese_set32_cond_via_val:863; CHECK-FIX:       @ %bb.0:864; CHECK-FIX-NEXT:    vorr q0, q0, q0865; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]866; CHECK-FIX-NEXT:    cmp r0, #0867; CHECK-FIX-NEXT:    beq .LBB25_2868; CHECK-FIX-NEXT:  @ %bb.1:869; CHECK-FIX-NEXT:    vmov.32 d16[0], r1870; CHECK-FIX-NEXT:  .LBB25_2: @ %select.end871; CHECK-FIX-NEXT:    cmp r0, #0872; CHECK-FIX-NEXT:    beq .LBB25_4873; CHECK-FIX-NEXT:  @ %bb.3:874; CHECK-FIX-NEXT:    vmov.32 d0[0], r1875; CHECK-FIX-NEXT:  .LBB25_4: @ %select.end2876; CHECK-FIX-NEXT:    aese.8 q8, q0877; CHECK-FIX-NEXT:    aesmc.8 q8, q8878; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]879; CHECK-FIX-NEXT:    bx lr880  %5 = bitcast ptr %3 to ptr881  %6 = load <4 x i32>, ptr %5, align 8882  %7 = insertelement <4 x i32> %6, i32 %1, i64 0883  %8 = select i1 %0, <4 x i32> %7, <4 x i32> %6884  %9 = bitcast <16 x i8> %2 to <4 x i32>885  %10 = insertelement <4 x i32> %9, i32 %1, i64 0886  %11 = select i1 %0, <4 x i32> %10, <4 x i32> %9887  %12 = bitcast <4 x i32> %8 to <16 x i8>888  %13 = bitcast <4 x i32> %11 to <16 x i8>889  %14 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %12, <16 x i8> %13)890  %15 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %14)891  store <16 x i8> %15, ptr %3, align 8892  ret void893}894 895define arm_aapcs_vfpcc void @aese_set32_loop_via_ptr(i32 %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {896; CHECK-FIX-LABEL: aese_set32_loop_via_ptr:897; CHECK-FIX:       @ %bb.0:898; CHECK-FIX-NEXT:    vorr q0, q0, q0899; CHECK-FIX-NEXT:    ldr r1, [r1]900; CHECK-FIX-NEXT:    cmp r0, #0901; CHECK-FIX-NEXT:    str r1, [r2]902; CHECK-FIX-NEXT:    bxeq lr903; CHECK-FIX-NEXT:  .LBB26_1:904; CHECK-FIX-NEXT:    vmov.32 d0[0], r1905; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]906; CHECK-FIX-NEXT:  .LBB26_2: @ =>This Inner Loop Header: Depth=1907; CHECK-FIX-NEXT:    aese.8 q8, q0908; CHECK-FIX-NEXT:    subs r0, r0, #1909; CHECK-FIX-NEXT:    aesmc.8 q8, q8910; CHECK-FIX-NEXT:    bne .LBB26_2911; CHECK-FIX-NEXT:  @ %bb.3:912; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]913; CHECK-FIX-NEXT:    bx lr914  %5 = load i32, ptr %1, align 4915  %6 = bitcast <16 x i8> %2 to <4 x i32>916  %7 = insertelement <4 x i32> %6, i32 %5, i64 0917  %8 = bitcast <4 x i32> %7 to <16 x i8>918  %9 = bitcast ptr %3 to ptr919  store i32 %5, ptr %9, align 8920  %10 = icmp eq i32 %0, 0921  br i1 %10, label %14, label %11922 92311:924  %12 = load <16 x i8>, ptr %3, align 8925  br label %15926 92713:928  store <16 x i8> %19, ptr %3, align 8929  br label %14930 93114:932  ret void933 93415:935  %16 = phi <16 x i8> [ %12, %11 ], [ %19, %15 ]936  %17 = phi i32 [ 0, %11 ], [ %20, %15 ]937  %18 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %16, <16 x i8> %8)938  %19 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %18)939  %20 = add nuw i32 %17, 1940  %21 = icmp eq i32 %20, %0941  br i1 %21, label %13, label %15942}943 944define arm_aapcs_vfpcc void @aese_set32_loop_via_val(i32 %0, i32 %1, <16 x i8> %2, ptr %3) nounwind {945; CHECK-FIX-LABEL: aese_set32_loop_via_val:946; CHECK-FIX:       @ %bb.0:947; CHECK-FIX-NEXT:    vorr q0, q0, q0948; CHECK-FIX-NEXT:    cmp r0, #0949; CHECK-FIX-NEXT:    bxeq lr950; CHECK-FIX-NEXT:  .LBB27_1:951; CHECK-FIX-NEXT:    vmov.32 d0[0], r1952; CHECK-FIX-NEXT:  .LBB27_2: @ =>This Inner Loop Header: Depth=1953; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]954; CHECK-FIX-NEXT:    subs r0, r0, #1955; CHECK-FIX-NEXT:    vmov.32 d16[0], r1956; CHECK-FIX-NEXT:    aese.8 q8, q0957; CHECK-FIX-NEXT:    aesmc.8 q8, q8958; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]959; CHECK-FIX-NEXT:    bne .LBB27_2960; CHECK-FIX-NEXT:  @ %bb.3:961; CHECK-FIX-NEXT:    bx lr962  %5 = icmp eq i32 %0, 0963  br i1 %5, label %12, label %6964 9656:966  %7 = bitcast <16 x i8> %2 to <4 x i32>967  %8 = insertelement <4 x i32> %7, i32 %1, i64 0968  %9 = bitcast <4 x i32> %8 to <16 x i8>969  %10 = bitcast ptr %3 to ptr970  %11 = bitcast ptr %3 to ptr971  br label %13972 97312:974  ret void975 97613:977  %14 = phi i32 [ 0, %6 ], [ %20, %13 ]978  %15 = load <4 x i32>, ptr %10, align 8979  %16 = insertelement <4 x i32> %15, i32 %1, i64 0980  %17 = bitcast <4 x i32> %16 to <16 x i8>981  store i32 %1, ptr %11, align 8982  %18 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %17, <16 x i8> %9)983  %19 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %18)984  store <16 x i8> %19, ptr %3, align 8985  %20 = add nuw i32 %14, 1986  %21 = icmp eq i32 %20, %0987  br i1 %21, label %12, label %13988}989 990define arm_aapcs_vfpcc void @aese_set64_via_ptr(ptr %0, <16 x i8> %1, ptr %2) nounwind {991; CHECK-FIX-NOSCHED-LABEL: aese_set64_via_ptr:992; CHECK-FIX-NOSCHED:       @ %bb.0:993; CHECK-FIX-NOSCHED-NEXT:    vorr q0, q0, q0994; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r1]995; CHECK-FIX-NOSCHED-NEXT:    vldr d0, [r0]996; CHECK-FIX-NOSCHED-NEXT:    vorr d16, d0, d0997; CHECK-FIX-NOSCHED-NEXT:    aese.8 q8, q0998; CHECK-FIX-NOSCHED-NEXT:    aesmc.8 q8, q8999; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r1]1000; CHECK-FIX-NOSCHED-NEXT:    bx lr1001;1002; CHECK-CORTEX-FIX-LABEL: aese_set64_via_ptr:1003; CHECK-CORTEX-FIX:       @ %bb.0:1004; CHECK-CORTEX-FIX-NEXT:    vorr q0, q0, q01005; CHECK-CORTEX-FIX-NEXT:    vldr d0, [r0]1006; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r1]1007; CHECK-CORTEX-FIX-NEXT:    vorr d16, d0, d01008; CHECK-CORTEX-FIX-NEXT:    aese.8 q8, q01009; CHECK-CORTEX-FIX-NEXT:    aesmc.8 q8, q81010; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r1]1011; CHECK-CORTEX-FIX-NEXT:    bx lr1012  %4 = load i64, ptr %0, align 81013  %5 = bitcast ptr %2 to ptr1014  %6 = load <2 x i64>, ptr %5, align 81015  %7 = insertelement <2 x i64> %6, i64 %4, i64 01016  %8 = bitcast <2 x i64> %7 to <16 x i8>1017  %9 = bitcast <16 x i8> %1 to <2 x i64>1018  %10 = insertelement <2 x i64> %9, i64 %4, i64 01019  %11 = bitcast <2 x i64> %10 to <16 x i8>1020  %12 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %8, <16 x i8> %11)1021  %13 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %12)1022  store <16 x i8> %13, ptr %2, align 81023  ret void1024}1025 1026define arm_aapcs_vfpcc void @aese_set64_via_val(i64 %0, <16 x i8> %1, ptr %2) nounwind {1027; CHECK-FIX-LABEL: aese_set64_via_val:1028; CHECK-FIX:       @ %bb.0:1029; CHECK-FIX-NEXT:    vorr q0, q0, q01030; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]1031; CHECK-FIX-NEXT:    vmov.32 d0[0], r01032; CHECK-FIX-NEXT:    vmov.32 d16[0], r01033; CHECK-FIX-NEXT:    vmov.32 d0[1], r11034; CHECK-FIX-NEXT:    vmov.32 d16[1], r11035; CHECK-FIX-NEXT:    aese.8 q8, q01036; CHECK-FIX-NEXT:    aesmc.8 q8, q81037; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]1038; CHECK-FIX-NEXT:    bx lr1039  %4 = bitcast ptr %2 to ptr1040  %5 = load <2 x i64>, ptr %4, align 81041  %6 = insertelement <2 x i64> %5, i64 %0, i64 01042  %7 = bitcast <2 x i64> %6 to <16 x i8>1043  %8 = bitcast <16 x i8> %1 to <2 x i64>1044  %9 = insertelement <2 x i64> %8, i64 %0, i64 01045  %10 = bitcast <2 x i64> %9 to <16 x i8>1046  %11 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %7, <16 x i8> %10)1047  %12 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %11)1048  store <16 x i8> %12, ptr %2, align 81049  ret void1050}1051 1052define arm_aapcs_vfpcc void @aese_set64_cond_via_ptr(i1 zeroext %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {1053; CHECK-FIX-NOSCHED-LABEL: aese_set64_cond_via_ptr:1054; CHECK-FIX-NOSCHED:       @ %bb.0:1055; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #01056; CHECK-FIX-NOSCHED-NEXT:    beq .LBB30_21057; CHECK-FIX-NOSCHED-NEXT:  @ %bb.1:1058; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r2]1059; CHECK-FIX-NOSCHED-NEXT:    vldr d16, [r1]1060; CHECK-FIX-NOSCHED-NEXT:    b .LBB30_31061; CHECK-FIX-NOSCHED-NEXT:  .LBB30_2:1062; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r2]1063; CHECK-FIX-NOSCHED-NEXT:  .LBB30_3:1064; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #01065; CHECK-FIX-NOSCHED-NEXT:    vldrne d0, [r1]1066; CHECK-FIX-NOSCHED-NEXT:    vorr q0, q0, q01067; CHECK-FIX-NOSCHED-NEXT:    aese.8 q8, q01068; CHECK-FIX-NOSCHED-NEXT:    aesmc.8 q8, q81069; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r2]1070; CHECK-FIX-NOSCHED-NEXT:    bx lr1071;1072; CHECK-CORTEX-FIX-LABEL: aese_set64_cond_via_ptr:1073; CHECK-CORTEX-FIX:       @ %bb.0:1074; CHECK-CORTEX-FIX-NEXT:    cmp r0, #01075; CHECK-CORTEX-FIX-NEXT:    beq .LBB30_21076; CHECK-CORTEX-FIX-NEXT:  @ %bb.1:1077; CHECK-CORTEX-FIX-NEXT:    vldr d18, [r1]1078; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r2]1079; CHECK-CORTEX-FIX-NEXT:    vorr d16, d18, d181080; CHECK-CORTEX-FIX-NEXT:    b .LBB30_31081; CHECK-CORTEX-FIX-NEXT:  .LBB30_2:1082; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r2]1083; CHECK-CORTEX-FIX-NEXT:  .LBB30_3:1084; CHECK-CORTEX-FIX-NEXT:    cmp r0, #01085; CHECK-CORTEX-FIX-NEXT:    vldrne d0, [r1]1086; CHECK-CORTEX-FIX-NEXT:    vorr q0, q0, q01087; CHECK-CORTEX-FIX-NEXT:    aese.8 q8, q01088; CHECK-CORTEX-FIX-NEXT:    aesmc.8 q8, q81089; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r2]1090; CHECK-CORTEX-FIX-NEXT:    bx lr1091  br i1 %0, label %5, label %101092 10935:1094  %6 = load i64, ptr %1, align 81095  %7 = bitcast ptr %3 to ptr1096  %8 = load <2 x i64>, ptr %7, align 81097  %9 = insertelement <2 x i64> %8, i64 %6, i64 01098  br label %131099 110010:1101  %11 = bitcast ptr %3 to ptr1102  %12 = load <2 x i64>, ptr %11, align 81103  br label %131104 110513:1106  %14 = phi <2 x i64> [ %9, %5 ], [ %12, %10 ]1107  br i1 %0, label %15, label %191108 110915:1110  %16 = load i64, ptr %1, align 81111  %17 = bitcast <16 x i8> %2 to <2 x i64>1112  %18 = insertelement <2 x i64> %17, i64 %16, i64 01113  br label %211114 111519:1116  %20 = bitcast <16 x i8> %2 to <2 x i64>1117  br label %211118 111921:1120  %22 = phi <2 x i64> [ %18, %15 ], [ %20, %19 ]1121  %23 = bitcast <2 x i64> %14 to <16 x i8>1122  %24 = bitcast <2 x i64> %22 to <16 x i8>1123  %25 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %23, <16 x i8> %24)1124  %26 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %25)1125  store <16 x i8> %26, ptr %3, align 81126  ret void1127}1128 1129define arm_aapcs_vfpcc void @aese_set64_cond_via_val(i1 zeroext %0, i64 %1, <16 x i8> %2, ptr %3) nounwind {1130; CHECK-FIX-LABEL: aese_set64_cond_via_val:1131; CHECK-FIX:       @ %bb.0:1132; CHECK-FIX-NEXT:    vorr q0, q0, q01133; CHECK-FIX-NEXT:    ldr r1, [sp]1134; CHECK-FIX-NEXT:    cmp r0, #01135; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r1]1136; CHECK-FIX-NEXT:    beq .LBB31_21137; CHECK-FIX-NEXT:  @ %bb.1:1138; CHECK-FIX-NEXT:    vmov.32 d16[0], r21139; CHECK-FIX-NEXT:    vmov.32 d16[1], r31140; CHECK-FIX-NEXT:  .LBB31_2: @ %select.end1141; CHECK-FIX-NEXT:    cmp r0, #01142; CHECK-FIX-NEXT:    beq .LBB31_41143; CHECK-FIX-NEXT:  @ %bb.3:1144; CHECK-FIX-NEXT:    vmov.32 d0[0], r21145; CHECK-FIX-NEXT:    vmov.32 d0[1], r31146; CHECK-FIX-NEXT:  .LBB31_4: @ %select.end21147; CHECK-FIX-NEXT:    aese.8 q8, q01148; CHECK-FIX-NEXT:    aesmc.8 q8, q81149; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r1]1150; CHECK-FIX-NEXT:    bx lr1151  %5 = bitcast ptr %3 to ptr1152  %6 = load <2 x i64>, ptr %5, align 81153  %7 = insertelement <2 x i64> %6, i64 %1, i64 01154  %8 = select i1 %0, <2 x i64> %7, <2 x i64> %61155  %9 = bitcast <16 x i8> %2 to <2 x i64>1156  %10 = insertelement <2 x i64> %9, i64 %1, i64 01157  %11 = select i1 %0, <2 x i64> %10, <2 x i64> %91158  %12 = bitcast <2 x i64> %8 to <16 x i8>1159  %13 = bitcast <2 x i64> %11 to <16 x i8>1160  %14 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %12, <16 x i8> %13)1161  %15 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %14)1162  store <16 x i8> %15, ptr %3, align 81163  ret void1164}1165 1166define arm_aapcs_vfpcc void @aese_set64_loop_via_ptr(i32 %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {1167; CHECK-FIX-NOSCHED-LABEL: aese_set64_loop_via_ptr:1168; CHECK-FIX-NOSCHED:       @ %bb.0:1169; CHECK-FIX-NOSCHED-NEXT:    vorr q0, q0, q01170; CHECK-FIX-NOSCHED-NEXT:    .save {r4, r5, r11, lr}1171; CHECK-FIX-NOSCHED-NEXT:    push {r4, r5, r11, lr}1172; CHECK-FIX-NOSCHED-NEXT:    ldrd r4, r5, [r1]1173; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #01174; CHECK-FIX-NOSCHED-NEXT:    strd r4, r5, [r2]1175; CHECK-FIX-NOSCHED-NEXT:    beq .LBB32_41176; CHECK-FIX-NOSCHED-NEXT:  @ %bb.1:1177; CHECK-FIX-NOSCHED-NEXT:    vmov d0, r4, r51178; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r2]1179; CHECK-FIX-NOSCHED-NEXT:  .LBB32_2: @ =>This Inner Loop Header: Depth=11180; CHECK-FIX-NOSCHED-NEXT:    aese.8 q8, q01181; CHECK-FIX-NOSCHED-NEXT:    subs r0, r0, #11182; CHECK-FIX-NOSCHED-NEXT:    aesmc.8 q8, q81183; CHECK-FIX-NOSCHED-NEXT:    bne .LBB32_21184; CHECK-FIX-NOSCHED-NEXT:  @ %bb.3:1185; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r2]1186; CHECK-FIX-NOSCHED-NEXT:  .LBB32_4:1187; CHECK-FIX-NOSCHED-NEXT:    pop {r4, r5, r11, pc}1188;1189; CHECK-CORTEX-FIX-LABEL: aese_set64_loop_via_ptr:1190; CHECK-CORTEX-FIX:       @ %bb.0:1191; CHECK-CORTEX-FIX-NEXT:    vorr q0, q0, q01192; CHECK-CORTEX-FIX-NEXT:    .save {r4, r5, r11, lr}1193; CHECK-CORTEX-FIX-NEXT:    push {r4, r5, r11, lr}1194; CHECK-CORTEX-FIX-NEXT:    ldrd r4, r5, [r1]1195; CHECK-CORTEX-FIX-NEXT:    cmp r0, #01196; CHECK-CORTEX-FIX-NEXT:    strd r4, r5, [r2]1197; CHECK-CORTEX-FIX-NEXT:    popeq {r4, r5, r11, pc}1198; CHECK-CORTEX-FIX-NEXT:  .LBB32_1:1199; CHECK-CORTEX-FIX-NEXT:    vmov d0, r4, r51200; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r2]1201; CHECK-CORTEX-FIX-NEXT:  .LBB32_2: @ =>This Inner Loop Header: Depth=11202; CHECK-CORTEX-FIX-NEXT:    aese.8 q8, q01203; CHECK-CORTEX-FIX-NEXT:    subs r0, r0, #11204; CHECK-CORTEX-FIX-NEXT:    aesmc.8 q8, q81205; CHECK-CORTEX-FIX-NEXT:    bne .LBB32_21206; CHECK-CORTEX-FIX-NEXT:  @ %bb.3:1207; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r2]1208; CHECK-CORTEX-FIX-NEXT:    pop {r4, r5, r11, pc}1209  %5 = load i64, ptr %1, align 81210  %6 = bitcast <16 x i8> %2 to <2 x i64>1211  %7 = insertelement <2 x i64> %6, i64 %5, i64 01212  %8 = bitcast <2 x i64> %7 to <16 x i8>1213  %9 = bitcast ptr %3 to ptr1214  store i64 %5, ptr %9, align 81215  %10 = icmp eq i32 %0, 01216  br i1 %10, label %14, label %111217 121811:1219  %12 = load <16 x i8>, ptr %3, align 81220  br label %151221 122213:1223  store <16 x i8> %19, ptr %3, align 81224  br label %141225 122614:1227  ret void1228 122915:1230  %16 = phi <16 x i8> [ %12, %11 ], [ %19, %15 ]1231  %17 = phi i32 [ 0, %11 ], [ %20, %15 ]1232  %18 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %16, <16 x i8> %8)1233  %19 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %18)1234  %20 = add nuw i32 %17, 11235  %21 = icmp eq i32 %20, %01236  br i1 %21, label %13, label %151237}1238 1239define arm_aapcs_vfpcc void @aese_set64_loop_via_val(i32 %0, i64 %1, <16 x i8> %2, ptr %3) nounwind {1240; CHECK-FIX-LABEL: aese_set64_loop_via_val:1241; CHECK-FIX:       @ %bb.0:1242; CHECK-FIX-NEXT:    vorr q0, q0, q01243; CHECK-FIX-NEXT:    cmp r0, #01244; CHECK-FIX-NEXT:    bxeq lr1245; CHECK-FIX-NEXT:  .LBB33_1:1246; CHECK-FIX-NEXT:    vmov.32 d0[0], r21247; CHECK-FIX-NEXT:    ldr r1, [sp]1248; CHECK-FIX-NEXT:    vmov.32 d0[1], r31249; CHECK-FIX-NEXT:  .LBB33_2: @ =>This Inner Loop Header: Depth=11250; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r1]1251; CHECK-FIX-NEXT:    subs r0, r0, #11252; CHECK-FIX-NEXT:    vmov.32 d16[0], r21253; CHECK-FIX-NEXT:    vmov.32 d16[1], r31254; CHECK-FIX-NEXT:    aese.8 q8, q01255; CHECK-FIX-NEXT:    aesmc.8 q8, q81256; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r1]1257; CHECK-FIX-NEXT:    bne .LBB33_21258; CHECK-FIX-NEXT:  @ %bb.3:1259; CHECK-FIX-NEXT:    bx lr1260  %5 = icmp eq i32 %0, 01261  br i1 %5, label %12, label %61262 12636:1264  %7 = bitcast <16 x i8> %2 to <2 x i64>1265  %8 = insertelement <2 x i64> %7, i64 %1, i64 01266  %9 = bitcast <2 x i64> %8 to <16 x i8>1267  %10 = bitcast ptr %3 to ptr1268  %11 = bitcast ptr %3 to ptr1269  br label %131270 127112:1272  ret void1273 127413:1275  %14 = phi i32 [ 0, %6 ], [ %20, %13 ]1276  %15 = load <2 x i64>, ptr %10, align 81277  %16 = insertelement <2 x i64> %15, i64 %1, i64 01278  %17 = bitcast <2 x i64> %16 to <16 x i8>1279  store i64 %1, ptr %11, align 81280  %18 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %17, <16 x i8> %9)1281  %19 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %18)1282  store <16 x i8> %19, ptr %3, align 81283  %20 = add nuw i32 %14, 11284  %21 = icmp eq i32 %20, %01285  br i1 %21, label %12, label %131286}1287 1288define arm_aapcs_vfpcc void @aese_setf16_via_ptr(ptr %0, <16 x i8> %1, ptr %2) nounwind {1289; CHECK-FIX-NOSCHED-LABEL: aese_setf16_via_ptr:1290; CHECK-FIX-NOSCHED:       @ %bb.0:1291; CHECK-FIX-NOSCHED-NEXT:    vorr q0, q0, q01292; CHECK-FIX-NOSCHED-NEXT:    ldrh r0, [r0]1293; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r1]1294; CHECK-FIX-NOSCHED-NEXT:    vmov.16 d0[0], r01295; CHECK-FIX-NOSCHED-NEXT:    vmov.16 d16[0], r01296; CHECK-FIX-NOSCHED-NEXT:    aese.8 q8, q01297; CHECK-FIX-NOSCHED-NEXT:    aesmc.8 q8, q81298; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r1]1299; CHECK-FIX-NOSCHED-NEXT:    bx lr1300;1301; CHECK-CORTEX-FIX-LABEL: aese_setf16_via_ptr:1302; CHECK-CORTEX-FIX:       @ %bb.0:1303; CHECK-CORTEX-FIX-NEXT:    vorr q0, q0, q01304; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r1]1305; CHECK-CORTEX-FIX-NEXT:    ldrh r0, [r0]1306; CHECK-CORTEX-FIX-NEXT:    vmov.16 d0[0], r01307; CHECK-CORTEX-FIX-NEXT:    vmov.16 d16[0], r01308; CHECK-CORTEX-FIX-NEXT:    aese.8 q8, q01309; CHECK-CORTEX-FIX-NEXT:    aesmc.8 q8, q81310; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r1]1311; CHECK-CORTEX-FIX-NEXT:    bx lr1312  %4 = bitcast ptr %0 to ptr1313  %5 = load i16, ptr %4, align 21314  %6 = bitcast ptr %2 to ptr1315  %7 = load <8 x i16>, ptr %6, align 81316  %8 = insertelement <8 x i16> %7, i16 %5, i64 01317  %9 = bitcast <8 x i16> %8 to <16 x i8>1318  %10 = bitcast <16 x i8> %1 to <8 x i16>1319  %11 = insertelement <8 x i16> %10, i16 %5, i64 01320  %12 = bitcast <8 x i16> %11 to <16 x i8>1321  %13 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %9, <16 x i8> %12)1322  %14 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %13)1323  store <16 x i8> %14, ptr %2, align 81324  ret void1325}1326 1327define arm_aapcs_vfpcc void @aese_setf16_via_val(half %0, <16 x i8> %1, ptr %2) nounwind {1328; CHECK-FIX-LABEL: aese_setf16_via_val:1329; CHECK-FIX:       @ %bb.0:1330; CHECK-FIX-NEXT:    vorr q1, q1, q11331; CHECK-FIX-NEXT:    vmov r1, s01332; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r0]1333; CHECK-FIX-NEXT:    vmov.16 d2[0], r11334; CHECK-FIX-NEXT:    vmov.16 d16[0], r11335; CHECK-FIX-NEXT:    aese.8 q8, q11336; CHECK-FIX-NEXT:    aesmc.8 q8, q81337; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r0]1338; CHECK-FIX-NEXT:    bx lr1339  %4 = bitcast ptr %2 to ptr1340  %5 = load <8 x i16>, ptr %4, align 81341  %6 = bitcast half %0 to i161342  %7 = insertelement <8 x i16> %5, i16 %6, i64 01343  %8 = bitcast <8 x i16> %7 to <16 x i8>1344  %9 = bitcast <16 x i8> %1 to <8 x i16>1345  %10 = insertelement <8 x i16> %9, i16 %6, i64 01346  %11 = bitcast <8 x i16> %10 to <16 x i8>1347  %12 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %8, <16 x i8> %11)1348  %13 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %12)1349  store <16 x i8> %13, ptr %2, align 81350  ret void1351}1352 1353define arm_aapcs_vfpcc void @aese_setf16_cond_via_ptr(i1 zeroext %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {1354; CHECK-FIX-NOSCHED-LABEL: aese_setf16_cond_via_ptr:1355; CHECK-FIX-NOSCHED:       @ %bb.0:1356; CHECK-FIX-NOSCHED-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}1357; CHECK-FIX-NOSCHED-NEXT:    push {r4, r5, r6, r7, r8, r9, r10, r11, lr}1358; CHECK-FIX-NOSCHED-NEXT:    .pad #121359; CHECK-FIX-NOSCHED-NEXT:    sub sp, sp, #121360; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #01361; CHECK-FIX-NOSCHED-NEXT:    beq .LBB36_31362; CHECK-FIX-NOSCHED-NEXT:  @ %bb.1:1363; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r2]1364; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r3, d17[3]1365; CHECK-FIX-NOSCHED-NEXT:    ldrh r7, [r1]1366; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r9, d17[0]1367; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r10, d16[3]1368; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r11, d16[2]1369; CHECK-FIX-NOSCHED-NEXT:    str r3, [sp, #8] @ 4-byte Spill1370; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r3, d17[2]1371; CHECK-FIX-NOSCHED-NEXT:    str r3, [sp, #4] @ 4-byte Spill1372; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r3, d17[1]1373; CHECK-FIX-NOSCHED-NEXT:    str r3, [sp] @ 4-byte Spill1374; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r3, d16[1]1375; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #01376; CHECK-FIX-NOSCHED-NEXT:    bne .LBB36_41377; CHECK-FIX-NOSCHED-NEXT:  .LBB36_2:1378; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r0, d1[3]1379; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r4, d1[2]1380; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r5, d1[1]1381; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r6, d1[0]1382; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r12, d0[3]1383; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 lr, d0[2]1384; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r8, d0[1]1385; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r1, d0[0]1386; CHECK-FIX-NOSCHED-NEXT:    b .LBB36_51387; CHECK-FIX-NOSCHED-NEXT:  .LBB36_3:1388; CHECK-FIX-NOSCHED-NEXT:    add r3, r2, #81389; CHECK-FIX-NOSCHED-NEXT:    vld1.32 {d16[0]}, [r2:32]1390; CHECK-FIX-NOSCHED-NEXT:    vld1.32 {d17[0]}, [r3:32]1391; CHECK-FIX-NOSCHED-NEXT:    add r3, r2, #41392; CHECK-FIX-NOSCHED-NEXT:    vld1.32 {d16[1]}, [r3:32]1393; CHECK-FIX-NOSCHED-NEXT:    add r3, r2, #121394; CHECK-FIX-NOSCHED-NEXT:    vld1.32 {d17[1]}, [r3:32]1395; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r3, d17[3]1396; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r9, d17[0]1397; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r10, d16[3]1398; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r11, d16[2]1399; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r7, d16[0]1400; CHECK-FIX-NOSCHED-NEXT:    str r3, [sp, #8] @ 4-byte Spill1401; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r3, d17[2]1402; CHECK-FIX-NOSCHED-NEXT:    str r3, [sp, #4] @ 4-byte Spill1403; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r3, d17[1]1404; CHECK-FIX-NOSCHED-NEXT:    str r3, [sp] @ 4-byte Spill1405; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r3, d16[1]1406; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #01407; CHECK-FIX-NOSCHED-NEXT:    beq .LBB36_21408; CHECK-FIX-NOSCHED-NEXT:  .LBB36_4:1409; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r0, d1[3]1410; CHECK-FIX-NOSCHED-NEXT:    ldrh r1, [r1]1411; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r4, d1[2]1412; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r5, d1[1]1413; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r6, d1[0]1414; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r12, d0[3]1415; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 lr, d0[2]1416; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r8, d0[1]1417; CHECK-FIX-NOSCHED-NEXT:  .LBB36_5:1418; CHECK-FIX-NOSCHED-NEXT:    pkhbt r1, r1, r8, lsl #161419; CHECK-FIX-NOSCHED-NEXT:    pkhbt r3, r7, r3, lsl #161420; CHECK-FIX-NOSCHED-NEXT:    pkhbt r0, r4, r0, lsl #161421; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d18[0], r11422; CHECK-FIX-NOSCHED-NEXT:    pkhbt r1, lr, r12, lsl #161423; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d16[0], r31424; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d18[1], r11425; CHECK-FIX-NOSCHED-NEXT:    pkhbt r1, r11, r10, lsl #161426; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d16[1], r11427; CHECK-FIX-NOSCHED-NEXT:    pkhbt r1, r6, r5, lsl #161428; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d19[0], r11429; CHECK-FIX-NOSCHED-NEXT:    ldr r1, [sp] @ 4-byte Reload1430; CHECK-FIX-NOSCHED-NEXT:    pkhbt r1, r9, r1, lsl #161431; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d19[1], r01432; CHECK-FIX-NOSCHED-NEXT:    ldr r0, [sp, #8] @ 4-byte Reload1433; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d17[0], r11434; CHECK-FIX-NOSCHED-NEXT:    ldr r1, [sp, #4] @ 4-byte Reload1435; CHECK-FIX-NOSCHED-NEXT:    pkhbt r0, r1, r0, lsl #161436; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d17[1], r01437; CHECK-FIX-NOSCHED-NEXT:    aese.8 q8, q91438; CHECK-FIX-NOSCHED-NEXT:    aesmc.8 q8, q81439; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r2]1440; CHECK-FIX-NOSCHED-NEXT:    add sp, sp, #121441; CHECK-FIX-NOSCHED-NEXT:    pop {r4, r5, r6, r7, r8, r9, r10, r11, pc}1442;1443; CHECK-CORTEX-FIX-LABEL: aese_setf16_cond_via_ptr:1444; CHECK-CORTEX-FIX:       @ %bb.0:1445; CHECK-CORTEX-FIX-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}1446; CHECK-CORTEX-FIX-NEXT:    push {r4, r5, r6, r7, r8, r9, r10, r11, lr}1447; CHECK-CORTEX-FIX-NEXT:    .pad #241448; CHECK-CORTEX-FIX-NEXT:    sub sp, sp, #241449; CHECK-CORTEX-FIX-NEXT:    cmp r0, #01450; CHECK-CORTEX-FIX-NEXT:    beq .LBB36_31451; CHECK-CORTEX-FIX-NEXT:  @ %bb.1:1452; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r2]1453; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d16[1]1454; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r6, d17[0]1455; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r7, d17[2]1456; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r4, d17[3]1457; CHECK-CORTEX-FIX-NEXT:    str r3, [sp, #20] @ 4-byte Spill1458; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d16[2]1459; CHECK-CORTEX-FIX-NEXT:    str r3, [sp, #8] @ 4-byte Spill1460; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d16[3]1461; CHECK-CORTEX-FIX-NEXT:    str r3, [sp, #4] @ 4-byte Spill1462; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d17[1]1463; CHECK-CORTEX-FIX-NEXT:    str r3, [sp, #12] @ 4-byte Spill1464; CHECK-CORTEX-FIX-NEXT:    ldrh r3, [r1]1465; CHECK-CORTEX-FIX-NEXT:    str r3, [sp, #16] @ 4-byte Spill1466; CHECK-CORTEX-FIX-NEXT:    mov r3, r61467; CHECK-CORTEX-FIX-NEXT:    cmp r0, #01468; CHECK-CORTEX-FIX-NEXT:    bne .LBB36_41469; CHECK-CORTEX-FIX-NEXT:  .LBB36_2:1470; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r0, d0[0]1471; CHECK-CORTEX-FIX-NEXT:    b .LBB36_51472; CHECK-CORTEX-FIX-NEXT:  .LBB36_3:1473; CHECK-CORTEX-FIX-NEXT:    vld1.32 {d16[0]}, [r2:32]1474; CHECK-CORTEX-FIX-NEXT:    add r3, r2, #81475; CHECK-CORTEX-FIX-NEXT:    add r7, r2, #41476; CHECK-CORTEX-FIX-NEXT:    vld1.32 {d17[0]}, [r3:32]1477; CHECK-CORTEX-FIX-NEXT:    add r3, r2, #121478; CHECK-CORTEX-FIX-NEXT:    vld1.32 {d16[1]}, [r7:32]1479; CHECK-CORTEX-FIX-NEXT:    vld1.32 {d17[1]}, [r3:32]1480; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d16[0]1481; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r7, d17[1]1482; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r4, d17[3]1483; CHECK-CORTEX-FIX-NEXT:    str r3, [sp, #16] @ 4-byte Spill1484; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d16[1]1485; CHECK-CORTEX-FIX-NEXT:    str r7, [sp, #12] @ 4-byte Spill1486; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r7, d17[2]1487; CHECK-CORTEX-FIX-NEXT:    str r3, [sp, #20] @ 4-byte Spill1488; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d16[2]1489; CHECK-CORTEX-FIX-NEXT:    str r3, [sp, #8] @ 4-byte Spill1490; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d16[3]1491; CHECK-CORTEX-FIX-NEXT:    str r3, [sp, #4] @ 4-byte Spill1492; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d17[0]1493; CHECK-CORTEX-FIX-NEXT:    cmp r0, #01494; CHECK-CORTEX-FIX-NEXT:    beq .LBB36_21495; CHECK-CORTEX-FIX-NEXT:  .LBB36_4:1496; CHECK-CORTEX-FIX-NEXT:    ldrh r0, [r1]1497; CHECK-CORTEX-FIX-NEXT:  .LBB36_5:1498; CHECK-CORTEX-FIX-NEXT:    str r0, [sp] @ 4-byte Spill1499; CHECK-CORTEX-FIX-NEXT:    ldr r0, [sp, #8] @ 4-byte Reload1500; CHECK-CORTEX-FIX-NEXT:    ldr r1, [sp, #4] @ 4-byte Reload1501; CHECK-CORTEX-FIX-NEXT:    pkhbt r9, r7, r4, lsl #161502; CHECK-CORTEX-FIX-NEXT:    ldr r4, [sp, #20] @ 4-byte Reload1503; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r10, d0[1]1504; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r6, d0[2]1505; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r12, d0[3]1506; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r11, d1[0]1507; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r5, d1[1]1508; CHECK-CORTEX-FIX-NEXT:    vmov.u16 lr, d1[2]1509; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r8, d1[3]1510; CHECK-CORTEX-FIX-NEXT:    pkhbt r7, r0, r1, lsl #161511; CHECK-CORTEX-FIX-NEXT:    ldr r1, [sp, #12] @ 4-byte Reload1512; CHECK-CORTEX-FIX-NEXT:    pkhbt r0, lr, r8, lsl #161513; CHECK-CORTEX-FIX-NEXT:    pkhbt r6, r6, r12, lsl #161514; CHECK-CORTEX-FIX-NEXT:    pkhbt r5, r11, r5, lsl #161515; CHECK-CORTEX-FIX-NEXT:    pkhbt r1, r3, r1, lsl #161516; CHECK-CORTEX-FIX-NEXT:    ldr r3, [sp, #16] @ 4-byte Reload1517; CHECK-CORTEX-FIX-NEXT:    pkhbt r4, r3, r4, lsl #161518; CHECK-CORTEX-FIX-NEXT:    ldr r3, [sp] @ 4-byte Reload1519; CHECK-CORTEX-FIX-NEXT:    vmov.32 d18[0], r41520; CHECK-CORTEX-FIX-NEXT:    vmov.32 d19[0], r11521; CHECK-CORTEX-FIX-NEXT:    vmov.32 d18[1], r71522; CHECK-CORTEX-FIX-NEXT:    vmov.32 d19[1], r91523; CHECK-CORTEX-FIX-NEXT:    pkhbt r3, r3, r10, lsl #161524; CHECK-CORTEX-FIX-NEXT:    vmov.32 d16[0], r31525; CHECK-CORTEX-FIX-NEXT:    vmov.32 d17[0], r51526; CHECK-CORTEX-FIX-NEXT:    vmov.32 d16[1], r61527; CHECK-CORTEX-FIX-NEXT:    vmov.32 d17[1], r01528; CHECK-CORTEX-FIX-NEXT:    aese.8 q9, q81529; CHECK-CORTEX-FIX-NEXT:    aesmc.8 q8, q91530; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r2]1531; CHECK-CORTEX-FIX-NEXT:    add sp, sp, #241532; CHECK-CORTEX-FIX-NEXT:    pop {r4, r5, r6, r7, r8, r9, r10, r11, pc}1533  br i1 %0, label %5, label %121534 15355:1536  %6 = bitcast ptr %1 to ptr1537  %7 = load i16, ptr %6, align 21538  %8 = bitcast ptr %3 to ptr1539  %9 = load <8 x i16>, ptr %8, align 81540  %10 = insertelement <8 x i16> %9, i16 %7, i64 01541  %11 = bitcast <8 x i16> %10 to <8 x half>1542  br label %151543 154412:1545  %13 = bitcast ptr %3 to ptr1546  %14 = load <8 x half>, ptr %13, align 81547  br label %151548 154915:1550  %16 = phi <8 x half> [ %11, %5 ], [ %14, %12 ]1551  br i1 %0, label %17, label %231552 155317:1554  %18 = bitcast ptr %1 to ptr1555  %19 = load i16, ptr %18, align 21556  %20 = bitcast <16 x i8> %2 to <8 x i16>1557  %21 = insertelement <8 x i16> %20, i16 %19, i64 01558  %22 = bitcast <8 x i16> %21 to <8 x half>1559  br label %251560 156123:1562  %24 = bitcast <16 x i8> %2 to <8 x half>1563  br label %251564 156525:1566  %26 = phi <8 x half> [ %22, %17 ], [ %24, %23 ]1567  %27 = bitcast <8 x half> %16 to <16 x i8>1568  %28 = bitcast <8 x half> %26 to <16 x i8>1569  %29 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %27, <16 x i8> %28)1570  %30 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %29)1571  store <16 x i8> %30, ptr %3, align 81572  ret void1573}1574 1575define arm_aapcs_vfpcc void @aese_setf16_cond_via_val(i1 zeroext %0, half %1, <16 x i8> %2, ptr %3) nounwind {1576; CHECK-FIX-NOSCHED-LABEL: aese_setf16_cond_via_val:1577; CHECK-FIX-NOSCHED:       @ %bb.0:1578; CHECK-FIX-NOSCHED-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}1579; CHECK-FIX-NOSCHED-NEXT:    push {r4, r5, r6, r7, r8, r9, r10, r11, lr}1580; CHECK-FIX-NOSCHED-NEXT:    .pad #121581; CHECK-FIX-NOSCHED-NEXT:    sub sp, sp, #121582; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #01583; CHECK-FIX-NOSCHED-NEXT:    beq .LBB37_21584; CHECK-FIX-NOSCHED-NEXT:  @ %bb.1:1585; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r1]1586; CHECK-FIX-NOSCHED-NEXT:    vmov.f32 s2, s01587; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r2, d17[1]1588; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r7, d17[3]1589; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 lr, d17[2]1590; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r11, d16[2]1591; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r8, d16[1]1592; CHECK-FIX-NOSCHED-NEXT:    str r2, [sp, #8] @ 4-byte Spill1593; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r2, d17[0]1594; CHECK-FIX-NOSCHED-NEXT:    str r2, [sp, #4] @ 4-byte Spill1595; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r2, d16[3]1596; CHECK-FIX-NOSCHED-NEXT:    str r2, [sp] @ 4-byte Spill1597; CHECK-FIX-NOSCHED-NEXT:    b .LBB37_31598; CHECK-FIX-NOSCHED-NEXT:  .LBB37_2:1599; CHECK-FIX-NOSCHED-NEXT:    add r2, r1, #81600; CHECK-FIX-NOSCHED-NEXT:    vld1.32 {d16[0]}, [r1:32]1601; CHECK-FIX-NOSCHED-NEXT:    vld1.32 {d17[0]}, [r2:32]1602; CHECK-FIX-NOSCHED-NEXT:    add r2, r1, #41603; CHECK-FIX-NOSCHED-NEXT:    vld1.32 {d16[1]}, [r2:32]1604; CHECK-FIX-NOSCHED-NEXT:    add r2, r1, #121605; CHECK-FIX-NOSCHED-NEXT:    vld1.32 {d17[1]}, [r2:32]1606; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r2, d17[1]1607; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r7, d17[3]1608; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 lr, d17[2]1609; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r11, d16[2]1610; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r8, d16[1]1611; CHECK-FIX-NOSCHED-NEXT:    str r2, [sp, #8] @ 4-byte Spill1612; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r2, d17[0]1613; CHECK-FIX-NOSCHED-NEXT:    str r2, [sp, #4] @ 4-byte Spill1614; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r2, d16[3]1615; CHECK-FIX-NOSCHED-NEXT:    str r2, [sp] @ 4-byte Spill1616; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r2, d16[0]1617; CHECK-FIX-NOSCHED-NEXT:    vmov s2, r21618; CHECK-FIX-NOSCHED-NEXT:  .LBB37_3:1619; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r9, d3[3]1620; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #01621; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r10, d3[2]1622; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r2, d3[1]1623; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r3, d3[0]1624; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r4, d2[3]1625; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r5, d2[2]1626; CHECK-FIX-NOSCHED-NEXT:    beq .LBB37_51627; CHECK-FIX-NOSCHED-NEXT:  @ %bb.4:1628; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r12, d2[1]1629; CHECK-FIX-NOSCHED-NEXT:    b .LBB37_61630; CHECK-FIX-NOSCHED-NEXT:  .LBB37_5:1631; CHECK-FIX-NOSCHED-NEXT:    mov r0, lr1632; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 lr, d2[0]1633; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r12, d2[1]1634; CHECK-FIX-NOSCHED-NEXT:    vmov s0, lr1635; CHECK-FIX-NOSCHED-NEXT:    mov lr, r01636; CHECK-FIX-NOSCHED-NEXT:  .LBB37_6:1637; CHECK-FIX-NOSCHED-NEXT:    vmov r0, s01638; CHECK-FIX-NOSCHED-NEXT:    vmov r6, s21639; CHECK-FIX-NOSCHED-NEXT:    pkhbt r0, r0, r12, lsl #161640; CHECK-FIX-NOSCHED-NEXT:    pkhbt r6, r6, r8, lsl #161641; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d18[0], r01642; CHECK-FIX-NOSCHED-NEXT:    pkhbt r0, r5, r4, lsl #161643; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d16[0], r61644; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d18[1], r01645; CHECK-FIX-NOSCHED-NEXT:    ldr r0, [sp] @ 4-byte Reload1646; CHECK-FIX-NOSCHED-NEXT:    pkhbt r0, r11, r0, lsl #161647; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d16[1], r01648; CHECK-FIX-NOSCHED-NEXT:    pkhbt r0, r3, r2, lsl #161649; CHECK-FIX-NOSCHED-NEXT:    ldr r2, [sp, #4] @ 4-byte Reload1650; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d19[0], r01651; CHECK-FIX-NOSCHED-NEXT:    ldr r0, [sp, #8] @ 4-byte Reload1652; CHECK-FIX-NOSCHED-NEXT:    pkhbt r0, r2, r0, lsl #161653; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d17[0], r01654; CHECK-FIX-NOSCHED-NEXT:    pkhbt r0, r10, r9, lsl #161655; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d19[1], r01656; CHECK-FIX-NOSCHED-NEXT:    pkhbt r0, lr, r7, lsl #161657; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d17[1], r01658; CHECK-FIX-NOSCHED-NEXT:    aese.8 q8, q91659; CHECK-FIX-NOSCHED-NEXT:    aesmc.8 q8, q81660; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r1]1661; CHECK-FIX-NOSCHED-NEXT:    add sp, sp, #121662; CHECK-FIX-NOSCHED-NEXT:    pop {r4, r5, r6, r7, r8, r9, r10, r11, pc}1663;1664; CHECK-CORTEX-FIX-LABEL: aese_setf16_cond_via_val:1665; CHECK-CORTEX-FIX:       @ %bb.0:1666; CHECK-CORTEX-FIX-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}1667; CHECK-CORTEX-FIX-NEXT:    push {r4, r5, r6, r7, r8, r9, r10, r11, lr}1668; CHECK-CORTEX-FIX-NEXT:    .pad #121669; CHECK-CORTEX-FIX-NEXT:    sub sp, sp, #121670; CHECK-CORTEX-FIX-NEXT:    cmp r0, #01671; CHECK-CORTEX-FIX-NEXT:    beq .LBB37_31672; CHECK-CORTEX-FIX-NEXT:  @ %bb.1:1673; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r1]1674; CHECK-CORTEX-FIX-NEXT:    vmov.f32 s2, s01675; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r2, d16[1]1676; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r7, d16[2]1677; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r10, d16[3]1678; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r11, d17[2]1679; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r6, d17[3]1680; CHECK-CORTEX-FIX-NEXT:    str r2, [sp, #8] @ 4-byte Spill1681; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r2, d17[0]1682; CHECK-CORTEX-FIX-NEXT:    str r2, [sp, #4] @ 4-byte Spill1683; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r2, d17[1]1684; CHECK-CORTEX-FIX-NEXT:    str r2, [sp] @ 4-byte Spill1685; CHECK-CORTEX-FIX-NEXT:    cmp r0, #01686; CHECK-CORTEX-FIX-NEXT:    bne .LBB37_41687; CHECK-CORTEX-FIX-NEXT:  .LBB37_2:1688; CHECK-CORTEX-FIX-NEXT:    vmov.u16 lr, d2[0]1689; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r8, d2[1]1690; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d2[2]1691; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r4, d2[3]1692; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r9, d3[0]1693; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r2, d3[1]1694; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r5, d3[2]1695; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r12, d3[3]1696; CHECK-CORTEX-FIX-NEXT:    vmov s0, lr1697; CHECK-CORTEX-FIX-NEXT:    b .LBB37_51698; CHECK-CORTEX-FIX-NEXT:  .LBB37_3:1699; CHECK-CORTEX-FIX-NEXT:    vld1.32 {d16[0]}, [r1:32]1700; CHECK-CORTEX-FIX-NEXT:    add r2, r1, #81701; CHECK-CORTEX-FIX-NEXT:    add r3, r1, #41702; CHECK-CORTEX-FIX-NEXT:    vld1.32 {d17[0]}, [r2:32]1703; CHECK-CORTEX-FIX-NEXT:    add r2, r1, #121704; CHECK-CORTEX-FIX-NEXT:    vld1.32 {d16[1]}, [r3:32]1705; CHECK-CORTEX-FIX-NEXT:    vld1.32 {d17[1]}, [r2:32]1706; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d16[1]1707; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r2, d16[0]1708; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r7, d16[2]1709; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r10, d16[3]1710; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r11, d17[2]1711; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r6, d17[3]1712; CHECK-CORTEX-FIX-NEXT:    str r3, [sp, #8] @ 4-byte Spill1713; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d17[0]1714; CHECK-CORTEX-FIX-NEXT:    vmov s2, r21715; CHECK-CORTEX-FIX-NEXT:    str r3, [sp, #4] @ 4-byte Spill1716; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d17[1]1717; CHECK-CORTEX-FIX-NEXT:    str r3, [sp] @ 4-byte Spill1718; CHECK-CORTEX-FIX-NEXT:    cmp r0, #01719; CHECK-CORTEX-FIX-NEXT:    beq .LBB37_21720; CHECK-CORTEX-FIX-NEXT:  .LBB37_4:1721; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r8, d2[1]1722; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d2[2]1723; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r4, d2[3]1724; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r9, d3[0]1725; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r2, d3[1]1726; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r5, d3[2]1727; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r12, d3[3]1728; CHECK-CORTEX-FIX-NEXT:  .LBB37_5:1729; CHECK-CORTEX-FIX-NEXT:    pkhbt lr, r11, r6, lsl #161730; CHECK-CORTEX-FIX-NEXT:    pkhbt r0, r7, r10, lsl #161731; CHECK-CORTEX-FIX-NEXT:    ldm sp, {r6, r7} @ 8-byte Folded Reload1732; CHECK-CORTEX-FIX-NEXT:    pkhbt r3, r3, r4, lsl #161733; CHECK-CORTEX-FIX-NEXT:    pkhbt r5, r5, r12, lsl #161734; CHECK-CORTEX-FIX-NEXT:    pkhbt r2, r9, r2, lsl #161735; CHECK-CORTEX-FIX-NEXT:    pkhbt r4, r7, r6, lsl #161736; CHECK-CORTEX-FIX-NEXT:    vmov r7, s21737; CHECK-CORTEX-FIX-NEXT:    ldr r6, [sp, #8] @ 4-byte Reload1738; CHECK-CORTEX-FIX-NEXT:    pkhbt r7, r7, r6, lsl #161739; CHECK-CORTEX-FIX-NEXT:    vmov r6, s01740; CHECK-CORTEX-FIX-NEXT:    vmov.32 d18[0], r71741; CHECK-CORTEX-FIX-NEXT:    vmov.32 d19[0], r41742; CHECK-CORTEX-FIX-NEXT:    vmov.32 d18[1], r01743; CHECK-CORTEX-FIX-NEXT:    vmov.32 d19[1], lr1744; CHECK-CORTEX-FIX-NEXT:    pkhbt r6, r6, r8, lsl #161745; CHECK-CORTEX-FIX-NEXT:    vmov.32 d16[0], r61746; CHECK-CORTEX-FIX-NEXT:    vmov.32 d17[0], r21747; CHECK-CORTEX-FIX-NEXT:    vmov.32 d16[1], r31748; CHECK-CORTEX-FIX-NEXT:    vmov.32 d17[1], r51749; CHECK-CORTEX-FIX-NEXT:    aese.8 q9, q81750; CHECK-CORTEX-FIX-NEXT:    aesmc.8 q8, q91751; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r1]1752; CHECK-CORTEX-FIX-NEXT:    add sp, sp, #121753; CHECK-CORTEX-FIX-NEXT:    pop {r4, r5, r6, r7, r8, r9, r10, r11, pc}1754  br i1 %0, label %5, label %111755 17565:1757  %6 = bitcast ptr %3 to ptr1758  %7 = load <8 x i16>, ptr %6, align 81759  %8 = bitcast half %1 to i161760  %9 = insertelement <8 x i16> %7, i16 %8, i64 01761  %10 = bitcast <8 x i16> %9 to <8 x half>1762  br label %141763 176411:1765  %12 = bitcast ptr %3 to ptr1766  %13 = load <8 x half>, ptr %12, align 81767  br label %141768 176914:1770  %15 = phi <8 x half> [ %10, %5 ], [ %13, %11 ]1771  br i1 %0, label %16, label %211772 177316:1774  %17 = bitcast <16 x i8> %2 to <8 x i16>1775  %18 = bitcast half %1 to i161776  %19 = insertelement <8 x i16> %17, i16 %18, i64 01777  %20 = bitcast <8 x i16> %19 to <8 x half>1778  br label %231779 178021:1781  %22 = bitcast <16 x i8> %2 to <8 x half>1782  br label %231783 178423:1785  %24 = phi <8 x half> [ %20, %16 ], [ %22, %21 ]1786  %25 = bitcast <8 x half> %15 to <16 x i8>1787  %26 = bitcast <8 x half> %24 to <16 x i8>1788  %27 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %25, <16 x i8> %26)1789  %28 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %27)1790  store <16 x i8> %28, ptr %3, align 81791  ret void1792}1793 1794define arm_aapcs_vfpcc void @aese_setf16_loop_via_ptr(i32 %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {1795; CHECK-FIX-LABEL: aese_setf16_loop_via_ptr:1796; CHECK-FIX:       @ %bb.0:1797; CHECK-FIX-NEXT:    vorr q0, q0, q01798; CHECK-FIX-NEXT:    ldrh r1, [r1]1799; CHECK-FIX-NEXT:    cmp r0, #01800; CHECK-FIX-NEXT:    strh r1, [r2]1801; CHECK-FIX-NEXT:    bxeq lr1802; CHECK-FIX-NEXT:  .LBB38_1:1803; CHECK-FIX-NEXT:    vmov.16 d0[0], r11804; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]1805; CHECK-FIX-NEXT:  .LBB38_2: @ =>This Inner Loop Header: Depth=11806; CHECK-FIX-NEXT:    aese.8 q8, q01807; CHECK-FIX-NEXT:    subs r0, r0, #11808; CHECK-FIX-NEXT:    aesmc.8 q8, q81809; CHECK-FIX-NEXT:    bne .LBB38_21810; CHECK-FIX-NEXT:  @ %bb.3:1811; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]1812; CHECK-FIX-NEXT:    bx lr1813  %5 = bitcast ptr %1 to ptr1814  %6 = load i16, ptr %5, align 21815  %7 = bitcast <16 x i8> %2 to <8 x i16>1816  %8 = insertelement <8 x i16> %7, i16 %6, i64 01817  %9 = bitcast <8 x i16> %8 to <16 x i8>1818  %10 = bitcast ptr %3 to ptr1819  store i16 %6, ptr %10, align 81820  %11 = icmp eq i32 %0, 01821  br i1 %11, label %15, label %121822 182312:1824  %13 = load <16 x i8>, ptr %3, align 81825  br label %161826 182714:1828  store <16 x i8> %20, ptr %3, align 81829  br label %151830 183115:1832  ret void1833 183416:1835  %17 = phi <16 x i8> [ %13, %12 ], [ %20, %16 ]1836  %18 = phi i32 [ 0, %12 ], [ %21, %16 ]1837  %19 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %17, <16 x i8> %9)1838  %20 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %19)1839  %21 = add nuw i32 %18, 11840  %22 = icmp eq i32 %21, %01841  br i1 %22, label %14, label %161842}1843 1844define arm_aapcs_vfpcc void @aese_setf16_loop_via_val(i32 %0, half %1, <16 x i8> %2, ptr %3) nounwind {1845; CHECK-FIX-LABEL: aese_setf16_loop_via_val:1846; CHECK-FIX:       @ %bb.0:1847; CHECK-FIX-NEXT:    vorr q1, q1, q11848; CHECK-FIX-NEXT:    cmp r0, #01849; CHECK-FIX-NEXT:    bxeq lr1850; CHECK-FIX-NEXT:  .LBB39_1:1851; CHECK-FIX-NEXT:    vmov r2, s01852; CHECK-FIX-NEXT:    vmov.16 d2[0], r21853; CHECK-FIX-NEXT:  .LBB39_2: @ =>This Inner Loop Header: Depth=11854; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r1]1855; CHECK-FIX-NEXT:    subs r0, r0, #11856; CHECK-FIX-NEXT:    vmov.16 d16[0], r21857; CHECK-FIX-NEXT:    aese.8 q8, q11858; CHECK-FIX-NEXT:    aesmc.8 q8, q81859; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r1]1860; CHECK-FIX-NEXT:    bne .LBB39_21861; CHECK-FIX-NEXT:  @ %bb.3:1862; CHECK-FIX-NEXT:    bx lr1863  %5 = icmp eq i32 %0, 01864  br i1 %5, label %13, label %61865 18666:1867  %7 = bitcast <16 x i8> %2 to <8 x i16>1868  %8 = bitcast half %1 to i161869  %9 = insertelement <8 x i16> %7, i16 %8, i64 01870  %10 = bitcast <8 x i16> %9 to <16 x i8>1871  %11 = bitcast ptr %3 to ptr1872  %12 = bitcast ptr %3 to ptr1873  br label %141874 187513:1876  ret void1877 187814:1879  %15 = phi i32 [ 0, %6 ], [ %21, %14 ]1880  %16 = load <8 x i16>, ptr %11, align 81881  %17 = insertelement <8 x i16> %16, i16 %8, i64 01882  %18 = bitcast <8 x i16> %17 to <16 x i8>1883  store half %1, ptr %12, align 81884  %19 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %18, <16 x i8> %10)1885  %20 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %19)1886  store <16 x i8> %20, ptr %3, align 81887  %21 = add nuw i32 %15, 11888  %22 = icmp eq i32 %21, %01889  br i1 %22, label %13, label %141890}1891 1892define arm_aapcs_vfpcc void @aese_setf32_via_ptr(ptr %0, <16 x i8> %1, ptr %2) nounwind {1893; CHECK-FIX-LABEL: aese_setf32_via_ptr:1894; CHECK-FIX:       @ %bb.0:1895; CHECK-FIX-NEXT:    vldr s0, [r0]1896; CHECK-FIX-NEXT:    vld1.64 {d2, d3}, [r1]1897; CHECK-FIX-NEXT:    vmov.f32 s4, s01898; CHECK-FIX-NEXT:    vorr q1, q1, q11899; CHECK-FIX-NEXT:    vorr q0, q0, q01900; CHECK-FIX-NEXT:    aese.8 q1, q01901; CHECK-FIX-NEXT:    aesmc.8 q8, q11902; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r1]1903; CHECK-FIX-NEXT:    bx lr1904  %4 = load float, ptr %0, align 41905  %5 = bitcast ptr %2 to ptr1906  %6 = load <4 x float>, ptr %5, align 81907  %7 = insertelement <4 x float> %6, float %4, i64 01908  %8 = bitcast <4 x float> %7 to <16 x i8>1909  %9 = bitcast <16 x i8> %1 to <4 x float>1910  %10 = insertelement <4 x float> %9, float %4, i64 01911  %11 = bitcast <4 x float> %10 to <16 x i8>1912  %12 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %8, <16 x i8> %11)1913  %13 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %12)1914  store <16 x i8> %13, ptr %2, align 81915  ret void1916}1917 1918define arm_aapcs_vfpcc void @aese_setf32_via_val(float %0, <16 x i8> %1, ptr %2) nounwind {1919; CHECK-FIX-LABEL: aese_setf32_via_val:1920; CHECK-FIX:       @ %bb.0:1921; CHECK-FIX-NEXT:    vmov.f32 s4, s01922; CHECK-FIX-NEXT:    vld1.64 {d0, d1}, [r0]1923; CHECK-FIX-NEXT:    vmov.f32 s0, s41924; CHECK-FIX-NEXT:    vorr q0, q0, q01925; CHECK-FIX-NEXT:    vorr q1, q1, q11926; CHECK-FIX-NEXT:    aese.8 q0, q11927; CHECK-FIX-NEXT:    aesmc.8 q8, q01928; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r0]1929; CHECK-FIX-NEXT:    bx lr1930  %4 = bitcast ptr %2 to ptr1931  %5 = load <4 x float>, ptr %4, align 81932  %6 = insertelement <4 x float> %5, float %0, i64 01933  %7 = bitcast <4 x float> %6 to <16 x i8>1934  %8 = bitcast <16 x i8> %1 to <4 x float>1935  %9 = insertelement <4 x float> %8, float %0, i64 01936  %10 = bitcast <4 x float> %9 to <16 x i8>1937  %11 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %7, <16 x i8> %10)1938  %12 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %11)1939  store <16 x i8> %12, ptr %2, align 81940  ret void1941}1942 1943define arm_aapcs_vfpcc void @aese_setf32_cond_via_ptr(i1 zeroext %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {1944; CHECK-FIX-LABEL: aese_setf32_cond_via_ptr:1945; CHECK-FIX:       @ %bb.0:1946; CHECK-FIX-NEXT:    vorr q0, q0, q01947; CHECK-FIX-NEXT:    cmp r0, #01948; CHECK-FIX-NEXT:    beq .LBB42_21949; CHECK-FIX-NEXT:  @ %bb.1:1950; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]1951; CHECK-FIX-NEXT:    vld1.32 {d16[0]}, [r1:32]1952; CHECK-FIX-NEXT:    cmp r0, #01953; CHECK-FIX-NEXT:    bne .LBB42_31954; CHECK-FIX-NEXT:    b .LBB42_41955; CHECK-FIX-NEXT:  .LBB42_2:1956; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]1957; CHECK-FIX-NEXT:    cmp r0, #01958; CHECK-FIX-NEXT:    beq .LBB42_41959; CHECK-FIX-NEXT:  .LBB42_3:1960; CHECK-FIX-NEXT:    vld1.32 {d0[0]}, [r1:32]1961; CHECK-FIX-NEXT:  .LBB42_4:1962; CHECK-FIX-NEXT:    aese.8 q8, q01963; CHECK-FIX-NEXT:    aesmc.8 q8, q81964; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]1965; CHECK-FIX-NEXT:    bx lr1966  br i1 %0, label %5, label %101967 19685:1969  %6 = load float, ptr %1, align 41970  %7 = bitcast ptr %3 to ptr1971  %8 = load <4 x float>, ptr %7, align 81972  %9 = insertelement <4 x float> %8, float %6, i64 01973  br label %131974 197510:1976  %11 = bitcast ptr %3 to ptr1977  %12 = load <4 x float>, ptr %11, align 81978  br label %131979 198013:1981  %14 = phi <4 x float> [ %9, %5 ], [ %12, %10 ]1982  br i1 %0, label %15, label %191983 198415:1985  %16 = load float, ptr %1, align 41986  %17 = bitcast <16 x i8> %2 to <4 x float>1987  %18 = insertelement <4 x float> %17, float %16, i64 01988  br label %211989 199019:1991  %20 = bitcast <16 x i8> %2 to <4 x float>1992  br label %211993 199421:1995  %22 = phi <4 x float> [ %18, %15 ], [ %20, %19 ]1996  %23 = bitcast <4 x float> %14 to <16 x i8>1997  %24 = bitcast <4 x float> %22 to <16 x i8>1998  %25 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %23, <16 x i8> %24)1999  %26 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %25)2000  store <16 x i8> %26, ptr %3, align 82001  ret void2002}2003 2004define arm_aapcs_vfpcc void @aese_setf32_cond_via_val(i1 zeroext %0, float %1, <16 x i8> %2, ptr %3) nounwind {2005; CHECK-FIX-NOSCHED-LABEL: aese_setf32_cond_via_val:2006; CHECK-FIX-NOSCHED:       @ %bb.0:2007; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d4, d5}, [r1]2008; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #02009; CHECK-FIX-NOSCHED-NEXT:    vmovne.f32 s8, s02010; CHECK-FIX-NOSCHED-NEXT:    vorr q2, q2, q22011; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #02012; CHECK-FIX-NOSCHED-NEXT:    vmovne.f32 s4, s02013; CHECK-FIX-NOSCHED-NEXT:    vorr q1, q1, q12014; CHECK-FIX-NOSCHED-NEXT:    aese.8 q2, q12015; CHECK-FIX-NOSCHED-NEXT:    aesmc.8 q8, q22016; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r1]2017; CHECK-FIX-NOSCHED-NEXT:    bx lr2018;2019; CHECK-CORTEX-FIX-LABEL: aese_setf32_cond_via_val:2020; CHECK-CORTEX-FIX:       @ %bb.0:2021; CHECK-CORTEX-FIX-NEXT:    cmp r0, #02022; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d4, d5}, [r1]2023; CHECK-CORTEX-FIX-NEXT:    vmovne.f32 s8, s02024; CHECK-CORTEX-FIX-NEXT:    vorr q2, q2, q22025; CHECK-CORTEX-FIX-NEXT:    cmp r0, #02026; CHECK-CORTEX-FIX-NEXT:    vmovne.f32 s4, s02027; CHECK-CORTEX-FIX-NEXT:    vorr q1, q1, q12028; CHECK-CORTEX-FIX-NEXT:    aese.8 q2, q12029; CHECK-CORTEX-FIX-NEXT:    aesmc.8 q8, q22030; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r1]2031; CHECK-CORTEX-FIX-NEXT:    bx lr2032  %5 = bitcast ptr %3 to ptr2033  %6 = load <4 x float>, ptr %5, align 82034  %7 = insertelement <4 x float> %6, float %1, i64 02035  %8 = select i1 %0, <4 x float> %7, <4 x float> %62036  %9 = bitcast <16 x i8> %2 to <4 x float>2037  %10 = insertelement <4 x float> %9, float %1, i64 02038  %11 = select i1 %0, <4 x float> %10, <4 x float> %92039  %12 = bitcast <4 x float> %8 to <16 x i8>2040  %13 = bitcast <4 x float> %11 to <16 x i8>2041  %14 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %12, <16 x i8> %13)2042  %15 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %14)2043  store <16 x i8> %15, ptr %3, align 82044  ret void2045}2046 2047define arm_aapcs_vfpcc void @aese_setf32_loop_via_ptr(i32 %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {2048; CHECK-FIX-NOSCHED-LABEL: aese_setf32_loop_via_ptr:2049; CHECK-FIX-NOSCHED:       @ %bb.0:2050; CHECK-FIX-NOSCHED-NEXT:    vldr s4, [r1]2051; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #02052; CHECK-FIX-NOSCHED-NEXT:    vstr s4, [r2]2053; CHECK-FIX-NOSCHED-NEXT:    bxeq lr2054; CHECK-FIX-NOSCHED-NEXT:  .LBB44_1:2055; CHECK-FIX-NOSCHED-NEXT:    vmov.f32 s0, s42056; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r2]2057; CHECK-FIX-NOSCHED-NEXT:  .LBB44_2: @ =>This Inner Loop Header: Depth=12058; CHECK-FIX-NOSCHED-NEXT:    vorr q0, q0, q02059; CHECK-FIX-NOSCHED-NEXT:    aese.8 q8, q02060; CHECK-FIX-NOSCHED-NEXT:    subs r0, r0, #12061; CHECK-FIX-NOSCHED-NEXT:    aesmc.8 q8, q82062; CHECK-FIX-NOSCHED-NEXT:    bne .LBB44_22063; CHECK-FIX-NOSCHED-NEXT:  @ %bb.3:2064; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r2]2065; CHECK-FIX-NOSCHED-NEXT:    bx lr2066;2067; CHECK-CORTEX-FIX-LABEL: aese_setf32_loop_via_ptr:2068; CHECK-CORTEX-FIX:       @ %bb.0:2069; CHECK-CORTEX-FIX-NEXT:    vldr s4, [r1]2070; CHECK-CORTEX-FIX-NEXT:    cmp r0, #02071; CHECK-CORTEX-FIX-NEXT:    vstr s4, [r2]2072; CHECK-CORTEX-FIX-NEXT:    bxeq lr2073; CHECK-CORTEX-FIX-NEXT:  .LBB44_1:2074; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r2]2075; CHECK-CORTEX-FIX-NEXT:    vmov.f32 s0, s42076; CHECK-CORTEX-FIX-NEXT:  .LBB44_2: @ =>This Inner Loop Header: Depth=12077; CHECK-CORTEX-FIX-NEXT:    vorr q0, q0, q02078; CHECK-CORTEX-FIX-NEXT:    aese.8 q8, q02079; CHECK-CORTEX-FIX-NEXT:    subs r0, r0, #12080; CHECK-CORTEX-FIX-NEXT:    aesmc.8 q8, q82081; CHECK-CORTEX-FIX-NEXT:    bne .LBB44_22082; CHECK-CORTEX-FIX-NEXT:  @ %bb.3:2083; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r2]2084; CHECK-CORTEX-FIX-NEXT:    bx lr2085  %5 = load float, ptr %1, align 42086  %6 = bitcast <16 x i8> %2 to <4 x float>2087  %7 = insertelement <4 x float> %6, float %5, i64 02088  %8 = bitcast <4 x float> %7 to <16 x i8>2089  %9 = bitcast ptr %3 to ptr2090  store float %5, ptr %9, align 82091  %10 = icmp eq i32 %0, 02092  br i1 %10, label %14, label %112093 209411:2095  %12 = load <16 x i8>, ptr %3, align 82096  br label %152097 209813:2099  store <16 x i8> %19, ptr %3, align 82100  br label %142101 210214:2103  ret void2104 210515:2106  %16 = phi <16 x i8> [ %12, %11 ], [ %19, %15 ]2107  %17 = phi i32 [ 0, %11 ], [ %20, %15 ]2108  %18 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %16, <16 x i8> %8)2109  %19 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %18)2110  %20 = add nuw i32 %17, 12111  %21 = icmp eq i32 %20, %02112  br i1 %21, label %13, label %152113}2114 2115define arm_aapcs_vfpcc void @aese_setf32_loop_via_val(i32 %0, float %1, <16 x i8> %2, ptr %3) nounwind {2116; CHECK-FIX-NOSCHED-LABEL: aese_setf32_loop_via_val:2117; CHECK-FIX-NOSCHED:       @ %bb.0:2118; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #02119; CHECK-FIX-NOSCHED-NEXT:    bxeq lr2120; CHECK-FIX-NOSCHED-NEXT:  .LBB45_1:2121; CHECK-FIX-NOSCHED-NEXT:    vmov.f32 s4, s02122; CHECK-FIX-NOSCHED-NEXT:  .LBB45_2: @ =>This Inner Loop Header: Depth=12123; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d4, d5}, [r1]2124; CHECK-FIX-NOSCHED-NEXT:    subs r0, r0, #12125; CHECK-FIX-NOSCHED-NEXT:    vmov.f32 s8, s02126; CHECK-FIX-NOSCHED-NEXT:    vorr q2, q2, q22127; CHECK-FIX-NOSCHED-NEXT:    vorr q1, q1, q12128; CHECK-FIX-NOSCHED-NEXT:    aese.8 q2, q12129; CHECK-FIX-NOSCHED-NEXT:    aesmc.8 q8, q22130; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r1]2131; CHECK-FIX-NOSCHED-NEXT:    bne .LBB45_22132; CHECK-FIX-NOSCHED-NEXT:  @ %bb.3:2133; CHECK-FIX-NOSCHED-NEXT:    bx lr2134;2135; CHECK-CORTEX-FIX-LABEL: aese_setf32_loop_via_val:2136; CHECK-CORTEX-FIX:       @ %bb.0:2137; CHECK-CORTEX-FIX-NEXT:    cmp r0, #02138; CHECK-CORTEX-FIX-NEXT:    bxeq lr2139; CHECK-CORTEX-FIX-NEXT:  .LBB45_1:2140; CHECK-CORTEX-FIX-NEXT:    vmov.f32 s4, s02141; CHECK-CORTEX-FIX-NEXT:  .LBB45_2: @ =>This Inner Loop Header: Depth=12142; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d4, d5}, [r1]2143; CHECK-CORTEX-FIX-NEXT:    vmov.f32 s8, s02144; CHECK-CORTEX-FIX-NEXT:    vorr q2, q2, q22145; CHECK-CORTEX-FIX-NEXT:    subs r0, r0, #12146; CHECK-CORTEX-FIX-NEXT:    vorr q1, q1, q12147; CHECK-CORTEX-FIX-NEXT:    aese.8 q2, q12148; CHECK-CORTEX-FIX-NEXT:    aesmc.8 q8, q22149; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r1]2150; CHECK-CORTEX-FIX-NEXT:    bne .LBB45_22151; CHECK-CORTEX-FIX-NEXT:  @ %bb.3:2152; CHECK-CORTEX-FIX-NEXT:    bx lr2153  %5 = icmp eq i32 %0, 02154  br i1 %5, label %12, label %62155 21566:2157  %7 = bitcast <16 x i8> %2 to <4 x float>2158  %8 = insertelement <4 x float> %7, float %1, i64 02159  %9 = bitcast <4 x float> %8 to <16 x i8>2160  %10 = bitcast ptr %3 to ptr2161  %11 = bitcast ptr %3 to ptr2162  br label %132163 216412:2165  ret void2166 216713:2168  %14 = phi i32 [ 0, %6 ], [ %20, %13 ]2169  %15 = load <4 x float>, ptr %10, align 82170  %16 = insertelement <4 x float> %15, float %1, i64 02171  %17 = bitcast <4 x float> %16 to <16 x i8>2172  store float %1, ptr %11, align 82173  %18 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %17, <16 x i8> %9)2174  %19 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %18)2175  store <16 x i8> %19, ptr %3, align 82176  %20 = add nuw i32 %14, 12177  %21 = icmp eq i32 %20, %02178  br i1 %21, label %12, label %132179}2180 2181define arm_aapcs_vfpcc void @aesd_zero(ptr %0) nounwind {2182; CHECK-FIX-LABEL: aesd_zero:2183; CHECK-FIX:       @ %bb.0:2184; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r0]2185; CHECK-FIX-NEXT:    vmov.i32 q9, #0x02186; CHECK-FIX-NEXT:    aesd.8 q9, q82187; CHECK-FIX-NEXT:    aesimc.8 q8, q92188; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r0]2189; CHECK-FIX-NEXT:    bx lr2190  %2 = load <16 x i8>, ptr %0, align 82191  %3 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> zeroinitializer, <16 x i8> %2)2192  %4 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %3)2193  store <16 x i8> %4, ptr %0, align 82194  ret void2195}2196 2197define arm_aapcs_vfpcc void @aesd_via_call1(ptr %0) nounwind {2198; CHECK-FIX-LABEL: aesd_via_call1:2199; CHECK-FIX:       @ %bb.0:2200; CHECK-FIX-NEXT:    .save {r4, lr}2201; CHECK-FIX-NEXT:    push {r4, lr}2202; CHECK-FIX-NEXT:    mov r4, r02203; CHECK-FIX-NEXT:    bl get_input2204; CHECK-FIX-NEXT:    vorr q0, q0, q02205; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r4]2206; CHECK-FIX-NEXT:    aesd.8 q8, q02207; CHECK-FIX-NEXT:    aesimc.8 q8, q82208; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r4]2209; CHECK-FIX-NEXT:    pop {r4, pc}2210  %2 = call arm_aapcs_vfpcc <16 x i8> @get_input()2211  %3 = load <16 x i8>, ptr %0, align 82212  %4 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %2, <16 x i8> %3)2213  %5 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %4)2214  store <16 x i8> %5, ptr %0, align 82215  ret void2216}2217 2218define arm_aapcs_vfpcc void @aesd_via_call2(half %0, ptr %1) nounwind {2219; CHECK-FIX-LABEL: aesd_via_call2:2220; CHECK-FIX:       @ %bb.0:2221; CHECK-FIX-NEXT:    .save {r4, lr}2222; CHECK-FIX-NEXT:    push {r4, lr}2223; CHECK-FIX-NEXT:    mov r4, r02224; CHECK-FIX-NEXT:    bl get_inputf162225; CHECK-FIX-NEXT:    vorr q0, q0, q02226; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r4]2227; CHECK-FIX-NEXT:    aesd.8 q8, q02228; CHECK-FIX-NEXT:    aesimc.8 q8, q82229; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r4]2230; CHECK-FIX-NEXT:    pop {r4, pc}2231  %3 = call arm_aapcs_vfpcc <16 x i8> @get_inputf16(half %0)2232  %4 = load <16 x i8>, ptr %1, align 82233  %5 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %3, <16 x i8> %4)2234  %6 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %5)2235  store <16 x i8> %6, ptr %1, align 82236  ret void2237}2238 2239define arm_aapcs_vfpcc void @aesd_via_call3(float %0, ptr %1) nounwind {2240; CHECK-FIX-LABEL: aesd_via_call3:2241; CHECK-FIX:       @ %bb.0:2242; CHECK-FIX-NEXT:    .save {r4, lr}2243; CHECK-FIX-NEXT:    push {r4, lr}2244; CHECK-FIX-NEXT:    mov r4, r02245; CHECK-FIX-NEXT:    bl get_inputf322246; CHECK-FIX-NEXT:    vorr q0, q0, q02247; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r4]2248; CHECK-FIX-NEXT:    aesd.8 q8, q02249; CHECK-FIX-NEXT:    aesimc.8 q8, q82250; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r4]2251; CHECK-FIX-NEXT:    pop {r4, pc}2252  %3 = call arm_aapcs_vfpcc <16 x i8> @get_inputf32(float %0)2253  %4 = load <16 x i8>, ptr %1, align 82254  %5 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %3, <16 x i8> %4)2255  %6 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %5)2256  store <16 x i8> %6, ptr %1, align 82257  ret void2258}2259 2260define arm_aapcs_vfpcc void @aesd_once_via_ptr(ptr %0, ptr %1) nounwind {2261; CHECK-FIX-LABEL: aesd_once_via_ptr:2262; CHECK-FIX:       @ %bb.0:2263; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r0]2264; CHECK-FIX-NEXT:    vld1.64 {d18, d19}, [r1]2265; CHECK-FIX-NEXT:    aesd.8 q9, q82266; CHECK-FIX-NEXT:    aesimc.8 q8, q92267; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r1]2268; CHECK-FIX-NEXT:    bx lr2269  %3 = load <16 x i8>, ptr %1, align 82270  %4 = load <16 x i8>, ptr %0, align 82271  %5 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %3, <16 x i8> %4)2272  %6 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %5)2273  store <16 x i8> %6, ptr %1, align 82274  ret void2275}2276 2277define arm_aapcs_vfpcc <16 x i8> @aesd_once_via_val(<16 x i8> %0, <16 x i8> %1) nounwind {2278; CHECK-FIX-LABEL: aesd_once_via_val:2279; CHECK-FIX:       @ %bb.0:2280; CHECK-FIX-NEXT:    vorr q0, q0, q02281; CHECK-FIX-NEXT:    vorr q1, q1, q12282; CHECK-FIX-NEXT:    aesd.8 q0, q12283; CHECK-FIX-NEXT:    aesimc.8 q0, q02284; CHECK-FIX-NEXT:    bx lr2285  %3 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %1, <16 x i8> %0)2286  %4 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %3)2287  ret <16 x i8> %42288}2289 2290define arm_aapcs_vfpcc void @aesd_twice_via_ptr(ptr %0, ptr %1) nounwind {2291; CHECK-FIX-LABEL: aesd_twice_via_ptr:2292; CHECK-FIX:       @ %bb.0:2293; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r0]2294; CHECK-FIX-NEXT:    vld1.64 {d18, d19}, [r1]2295; CHECK-FIX-NEXT:    aesd.8 q9, q82296; CHECK-FIX-NEXT:    aesimc.8 q8, q92297; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r1]2298; CHECK-FIX-NEXT:    vld1.64 {d18, d19}, [r0]2299; CHECK-FIX-NEXT:    aesd.8 q9, q82300; CHECK-FIX-NEXT:    aesimc.8 q8, q92301; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r1]2302; CHECK-FIX-NEXT:    bx lr2303  %3 = load <16 x i8>, ptr %1, align 82304  %4 = load <16 x i8>, ptr %0, align 82305  %5 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %3, <16 x i8> %4)2306  %6 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %5)2307  store <16 x i8> %6, ptr %1, align 82308  %7 = load <16 x i8>, ptr %0, align 82309  %8 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %6, <16 x i8> %7)2310  %9 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %8)2311  store <16 x i8> %9, ptr %1, align 82312  ret void2313}2314 2315define arm_aapcs_vfpcc <16 x i8> @aesd_twice_via_val(<16 x i8> %0, <16 x i8> %1) nounwind {2316; CHECK-FIX-LABEL: aesd_twice_via_val:2317; CHECK-FIX:       @ %bb.0:2318; CHECK-FIX-NEXT:    vorr q1, q1, q12319; CHECK-FIX-NEXT:    vorr q0, q0, q02320; CHECK-FIX-NEXT:    vorr q0, q0, q02321; CHECK-FIX-NEXT:    aesd.8 q1, q02322; CHECK-FIX-NEXT:    aesimc.8 q8, q12323; CHECK-FIX-NEXT:    aesd.8 q8, q02324; CHECK-FIX-NEXT:    aesimc.8 q0, q82325; CHECK-FIX-NEXT:    bx lr2326  %3 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %1, <16 x i8> %0)2327  %4 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %3)2328  %5 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %4, <16 x i8> %0)2329  %6 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %5)2330  ret <16 x i8> %62331}2332 2333define arm_aapcs_vfpcc void @aesd_loop_via_ptr(i32 %0, ptr %1, ptr %2) nounwind {2334; CHECK-FIX-NOSCHED-LABEL: aesd_loop_via_ptr:2335; CHECK-FIX-NOSCHED:       @ %bb.0:2336; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #02337; CHECK-FIX-NOSCHED-NEXT:    bxeq lr2338; CHECK-FIX-NOSCHED-NEXT:  .LBB54_1: @ =>This Inner Loop Header: Depth=12339; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r1]2340; CHECK-FIX-NOSCHED-NEXT:    subs r0, r0, #12341; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d18, d19}, [r2]2342; CHECK-FIX-NOSCHED-NEXT:    aesd.8 q9, q82343; CHECK-FIX-NOSCHED-NEXT:    aesimc.8 q8, q92344; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r2]2345; CHECK-FIX-NOSCHED-NEXT:    bne .LBB54_12346; CHECK-FIX-NOSCHED-NEXT:  @ %bb.2:2347; CHECK-FIX-NOSCHED-NEXT:    bx lr2348;2349; CHECK-CORTEX-FIX-LABEL: aesd_loop_via_ptr:2350; CHECK-CORTEX-FIX:       @ %bb.0:2351; CHECK-CORTEX-FIX-NEXT:    cmp r0, #02352; CHECK-CORTEX-FIX-NEXT:    bxeq lr2353; CHECK-CORTEX-FIX-NEXT:  .LBB54_1: @ =>This Inner Loop Header: Depth=12354; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r1]2355; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d18, d19}, [r2]2356; CHECK-CORTEX-FIX-NEXT:    subs r0, r0, #12357; CHECK-CORTEX-FIX-NEXT:    aesd.8 q9, q82358; CHECK-CORTEX-FIX-NEXT:    aesimc.8 q8, q92359; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r2]2360; CHECK-CORTEX-FIX-NEXT:    bne .LBB54_12361; CHECK-CORTEX-FIX-NEXT:  @ %bb.2:2362; CHECK-CORTEX-FIX-NEXT:    bx lr2363  %4 = icmp eq i32 %0, 02364  br i1 %4, label %5, label %62365 23665:2367  ret void2368 23696:2370  %7 = phi i32 [ %12, %6 ], [ 0, %3 ]2371  %8 = load <16 x i8>, ptr %2, align 82372  %9 = load <16 x i8>, ptr %1, align 82373  %10 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %8, <16 x i8> %9)2374  %11 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %10)2375  store <16 x i8> %11, ptr %2, align 82376  %12 = add nuw i32 %7, 12377  %13 = icmp eq i32 %12, %02378  br i1 %13, label %5, label %62379}2380 2381define arm_aapcs_vfpcc <16 x i8> @aesd_loop_via_val(i32 %0, <16 x i8> %1, <16 x i8> %2) nounwind {2382; CHECK-FIX-LABEL: aesd_loop_via_val:2383; CHECK-FIX:       @ %bb.0:2384; CHECK-FIX-NEXT:    vorr q1, q1, q12385; CHECK-FIX-NEXT:    vorr q0, q0, q02386; CHECK-FIX-NEXT:    cmp r0, #02387; CHECK-FIX-NEXT:    beq .LBB55_22388; CHECK-FIX-NEXT:  .LBB55_1: @ =>This Inner Loop Header: Depth=12389; CHECK-FIX-NEXT:    aesd.8 q1, q02390; CHECK-FIX-NEXT:    subs r0, r0, #12391; CHECK-FIX-NEXT:    aesimc.8 q1, q12392; CHECK-FIX-NEXT:    bne .LBB55_12393; CHECK-FIX-NEXT:  .LBB55_2:2394; CHECK-FIX-NEXT:    vorr q0, q1, q12395; CHECK-FIX-NEXT:    bx lr2396  %4 = icmp eq i32 %0, 02397  br i1 %4, label %5, label %72398 23995:2400  %6 = phi <16 x i8> [ %2, %3 ], [ %11, %7 ]2401  ret <16 x i8> %62402 24037:2404  %8 = phi i32 [ %12, %7 ], [ 0, %3 ]2405  %9 = phi <16 x i8> [ %11, %7 ], [ %2, %3 ]2406  %10 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %9, <16 x i8> %1)2407  %11 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %10)2408  %12 = add nuw i32 %8, 12409  %13 = icmp eq i32 %12, %02410  br i1 %13, label %5, label %72411}2412 2413define arm_aapcs_vfpcc void @aesd_set8_via_ptr(ptr %0, <16 x i8> %1, ptr %2) nounwind {2414; CHECK-FIX-NOSCHED-LABEL: aesd_set8_via_ptr:2415; CHECK-FIX-NOSCHED:       @ %bb.0:2416; CHECK-FIX-NOSCHED-NEXT:    vorr q0, q0, q02417; CHECK-FIX-NOSCHED-NEXT:    ldrb r0, [r0]2418; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r1]2419; CHECK-FIX-NOSCHED-NEXT:    vmov.8 d0[0], r02420; CHECK-FIX-NOSCHED-NEXT:    vmov.8 d16[0], r02421; CHECK-FIX-NOSCHED-NEXT:    aesd.8 q8, q02422; CHECK-FIX-NOSCHED-NEXT:    aesimc.8 q8, q82423; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r1]2424; CHECK-FIX-NOSCHED-NEXT:    bx lr2425;2426; CHECK-CORTEX-FIX-LABEL: aesd_set8_via_ptr:2427; CHECK-CORTEX-FIX:       @ %bb.0:2428; CHECK-CORTEX-FIX-NEXT:    vorr q0, q0, q02429; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r1]2430; CHECK-CORTEX-FIX-NEXT:    ldrb r0, [r0]2431; CHECK-CORTEX-FIX-NEXT:    vmov.8 d0[0], r02432; CHECK-CORTEX-FIX-NEXT:    vmov.8 d16[0], r02433; CHECK-CORTEX-FIX-NEXT:    aesd.8 q8, q02434; CHECK-CORTEX-FIX-NEXT:    aesimc.8 q8, q82435; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r1]2436; CHECK-CORTEX-FIX-NEXT:    bx lr2437  %4 = load i8, ptr %0, align 12438  %5 = load <16 x i8>, ptr %2, align 82439  %6 = insertelement <16 x i8> %5, i8 %4, i64 02440  %7 = insertelement <16 x i8> %1, i8 %4, i64 02441  %8 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %6, <16 x i8> %7)2442  %9 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %8)2443  store <16 x i8> %9, ptr %2, align 82444  ret void2445}2446 2447define arm_aapcs_vfpcc void @aesd_set8_via_val(i8 zeroext %0, <16 x i8> %1, ptr %2) nounwind {2448; CHECK-FIX-LABEL: aesd_set8_via_val:2449; CHECK-FIX:       @ %bb.0:2450; CHECK-FIX-NEXT:    vorr q0, q0, q02451; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r1]2452; CHECK-FIX-NEXT:    vmov.8 d0[0], r02453; CHECK-FIX-NEXT:    vmov.8 d16[0], r02454; CHECK-FIX-NEXT:    aesd.8 q8, q02455; CHECK-FIX-NEXT:    aesimc.8 q8, q82456; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r1]2457; CHECK-FIX-NEXT:    bx lr2458  %4 = load <16 x i8>, ptr %2, align 82459  %5 = insertelement <16 x i8> %4, i8 %0, i64 02460  %6 = insertelement <16 x i8> %1, i8 %0, i64 02461  %7 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %5, <16 x i8> %6)2462  %8 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %7)2463  store <16 x i8> %8, ptr %2, align 82464  ret void2465}2466 2467define arm_aapcs_vfpcc void @aesd_set8_cond_via_ptr(i1 zeroext %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {2468; CHECK-FIX-LABEL: aesd_set8_cond_via_ptr:2469; CHECK-FIX:       @ %bb.0:2470; CHECK-FIX-NEXT:    vorr q0, q0, q02471; CHECK-FIX-NEXT:    cmp r0, #02472; CHECK-FIX-NEXT:    beq .LBB58_22473; CHECK-FIX-NEXT:  @ %bb.1:2474; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]2475; CHECK-FIX-NEXT:    vld1.8 {d16[0]}, [r1]2476; CHECK-FIX-NEXT:    cmp r0, #02477; CHECK-FIX-NEXT:    bne .LBB58_32478; CHECK-FIX-NEXT:    b .LBB58_42479; CHECK-FIX-NEXT:  .LBB58_2:2480; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]2481; CHECK-FIX-NEXT:    cmp r0, #02482; CHECK-FIX-NEXT:    beq .LBB58_42483; CHECK-FIX-NEXT:  .LBB58_3:2484; CHECK-FIX-NEXT:    vld1.8 {d0[0]}, [r1]2485; CHECK-FIX-NEXT:  .LBB58_4:2486; CHECK-FIX-NEXT:    aesd.8 q8, q02487; CHECK-FIX-NEXT:    aesimc.8 q8, q82488; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]2489; CHECK-FIX-NEXT:    bx lr2490  br i1 %0, label %5, label %92491 24925:2493  %6 = load i8, ptr %1, align 12494  %7 = load <16 x i8>, ptr %3, align 82495  %8 = insertelement <16 x i8> %7, i8 %6, i64 02496  br label %112497 24989:2499  %10 = load <16 x i8>, ptr %3, align 82500  br label %112501 250211:2503  %12 = phi <16 x i8> [ %8, %5 ], [ %10, %9 ]2504  br i1 %0, label %13, label %162505 250613:2507  %14 = load i8, ptr %1, align 12508  %15 = insertelement <16 x i8> %2, i8 %14, i64 02509  br label %162510 251116:2512  %17 = phi <16 x i8> [ %15, %13 ], [ %2, %11 ]2513  %18 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %12, <16 x i8> %17)2514  %19 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %18)2515  store <16 x i8> %19, ptr %3, align 82516  ret void2517}2518 2519define arm_aapcs_vfpcc void @aesd_set8_cond_via_val(i1 zeroext %0, i8 zeroext %1, <16 x i8> %2, ptr %3) nounwind {2520; CHECK-FIX-LABEL: aesd_set8_cond_via_val:2521; CHECK-FIX:       @ %bb.0:2522; CHECK-FIX-NEXT:    vorr q0, q0, q02523; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]2524; CHECK-FIX-NEXT:    cmp r0, #02525; CHECK-FIX-NEXT:    beq .LBB59_22526; CHECK-FIX-NEXT:  @ %bb.1:2527; CHECK-FIX-NEXT:    vmov.8 d16[0], r12528; CHECK-FIX-NEXT:  .LBB59_2: @ %select.end2529; CHECK-FIX-NEXT:    cmp r0, #02530; CHECK-FIX-NEXT:    beq .LBB59_42531; CHECK-FIX-NEXT:  @ %bb.3:2532; CHECK-FIX-NEXT:    vmov.8 d0[0], r12533; CHECK-FIX-NEXT:  .LBB59_4: @ %select.end22534; CHECK-FIX-NEXT:    aesd.8 q8, q02535; CHECK-FIX-NEXT:    aesimc.8 q8, q82536; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]2537; CHECK-FIX-NEXT:    bx lr2538  %5 = load <16 x i8>, ptr %3, align 82539  %6 = insertelement <16 x i8> %5, i8 %1, i64 02540  %7 = select i1 %0, <16 x i8> %6, <16 x i8> %52541  %8 = insertelement <16 x i8> %2, i8 %1, i64 02542  %9 = select i1 %0, <16 x i8> %8, <16 x i8> %22543  %10 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %7, <16 x i8> %9)2544  %11 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %10)2545  store <16 x i8> %11, ptr %3, align 82546  ret void2547}2548 2549define arm_aapcs_vfpcc void @aesd_set8_loop_via_ptr(i32 %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {2550; CHECK-FIX-LABEL: aesd_set8_loop_via_ptr:2551; CHECK-FIX:       @ %bb.0:2552; CHECK-FIX-NEXT:    vorr q0, q0, q02553; CHECK-FIX-NEXT:    ldrb r1, [r1]2554; CHECK-FIX-NEXT:    cmp r0, #02555; CHECK-FIX-NEXT:    strb r1, [r2]2556; CHECK-FIX-NEXT:    bxeq lr2557; CHECK-FIX-NEXT:  .LBB60_1:2558; CHECK-FIX-NEXT:    vmov.8 d0[0], r12559; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]2560; CHECK-FIX-NEXT:  .LBB60_2: @ =>This Inner Loop Header: Depth=12561; CHECK-FIX-NEXT:    aesd.8 q8, q02562; CHECK-FIX-NEXT:    subs r0, r0, #12563; CHECK-FIX-NEXT:    aesimc.8 q8, q82564; CHECK-FIX-NEXT:    bne .LBB60_22565; CHECK-FIX-NEXT:  @ %bb.3:2566; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]2567; CHECK-FIX-NEXT:    bx lr2568  %5 = load i8, ptr %1, align 12569  %6 = insertelement <16 x i8> %2, i8 %5, i64 02570  %7 = getelementptr inbounds <16 x i8>, ptr %3, i32 0, i32 02571  store i8 %5, ptr %7, align 82572  %8 = icmp eq i32 %0, 02573  br i1 %8, label %12, label %92574 25759:2576  %10 = load <16 x i8>, ptr %3, align 82577  br label %132578 257911:2580  store <16 x i8> %17, ptr %3, align 82581  br label %122582 258312:2584  ret void2585 258613:2587  %14 = phi <16 x i8> [ %10, %9 ], [ %17, %13 ]2588  %15 = phi i32 [ 0, %9 ], [ %18, %13 ]2589  %16 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %14, <16 x i8> %6)2590  %17 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %16)2591  %18 = add nuw i32 %15, 12592  %19 = icmp eq i32 %18, %02593  br i1 %19, label %11, label %132594}2595 2596define arm_aapcs_vfpcc void @aesd_set8_loop_via_val(i32 %0, i8 zeroext %1, <16 x i8> %2, ptr %3) nounwind {2597; CHECK-FIX-LABEL: aesd_set8_loop_via_val:2598; CHECK-FIX:       @ %bb.0:2599; CHECK-FIX-NEXT:    vorr q0, q0, q02600; CHECK-FIX-NEXT:    cmp r0, #02601; CHECK-FIX-NEXT:    bxeq lr2602; CHECK-FIX-NEXT:  .LBB61_1:2603; CHECK-FIX-NEXT:    vmov.8 d0[0], r12604; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]2605; CHECK-FIX-NEXT:  .LBB61_2: @ =>This Inner Loop Header: Depth=12606; CHECK-FIX-NEXT:    vmov.8 d16[0], r12607; CHECK-FIX-NEXT:    subs r0, r0, #12608; CHECK-FIX-NEXT:    aesd.8 q8, q02609; CHECK-FIX-NEXT:    aesimc.8 q8, q82610; CHECK-FIX-NEXT:    bne .LBB61_22611; CHECK-FIX-NEXT:  @ %bb.3:2612; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]2613; CHECK-FIX-NEXT:    bx lr2614  %5 = icmp eq i32 %0, 02615  br i1 %5, label %10, label %62616 26176:2618  %7 = insertelement <16 x i8> %2, i8 %1, i64 02619  %8 = load <16 x i8>, ptr %3, align 82620  br label %112621 26229:2623  store <16 x i8> %16, ptr %3, align 82624  br label %102625 262610:2627  ret void2628 262911:2630  %12 = phi <16 x i8> [ %8, %6 ], [ %16, %11 ]2631  %13 = phi i32 [ 0, %6 ], [ %17, %11 ]2632  %14 = insertelement <16 x i8> %12, i8 %1, i64 02633  %15 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %14, <16 x i8> %7)2634  %16 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %15)2635  %17 = add nuw i32 %13, 12636  %18 = icmp eq i32 %17, %02637  br i1 %18, label %9, label %112638}2639 2640define arm_aapcs_vfpcc void @aesd_set16_via_ptr(ptr %0, <16 x i8> %1, ptr %2) nounwind {2641; CHECK-FIX-NOSCHED-LABEL: aesd_set16_via_ptr:2642; CHECK-FIX-NOSCHED:       @ %bb.0:2643; CHECK-FIX-NOSCHED-NEXT:    vorr q0, q0, q02644; CHECK-FIX-NOSCHED-NEXT:    ldrh r0, [r0]2645; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r1]2646; CHECK-FIX-NOSCHED-NEXT:    vmov.16 d0[0], r02647; CHECK-FIX-NOSCHED-NEXT:    vmov.16 d16[0], r02648; CHECK-FIX-NOSCHED-NEXT:    aesd.8 q8, q02649; CHECK-FIX-NOSCHED-NEXT:    aesimc.8 q8, q82650; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r1]2651; CHECK-FIX-NOSCHED-NEXT:    bx lr2652;2653; CHECK-CORTEX-FIX-LABEL: aesd_set16_via_ptr:2654; CHECK-CORTEX-FIX:       @ %bb.0:2655; CHECK-CORTEX-FIX-NEXT:    vorr q0, q0, q02656; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r1]2657; CHECK-CORTEX-FIX-NEXT:    ldrh r0, [r0]2658; CHECK-CORTEX-FIX-NEXT:    vmov.16 d0[0], r02659; CHECK-CORTEX-FIX-NEXT:    vmov.16 d16[0], r02660; CHECK-CORTEX-FIX-NEXT:    aesd.8 q8, q02661; CHECK-CORTEX-FIX-NEXT:    aesimc.8 q8, q82662; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r1]2663; CHECK-CORTEX-FIX-NEXT:    bx lr2664  %4 = load i16, ptr %0, align 22665  %5 = bitcast ptr %2 to ptr2666  %6 = load <8 x i16>, ptr %5, align 82667  %7 = insertelement <8 x i16> %6, i16 %4, i64 02668  %8 = bitcast <8 x i16> %7 to <16 x i8>2669  %9 = bitcast <16 x i8> %1 to <8 x i16>2670  %10 = insertelement <8 x i16> %9, i16 %4, i64 02671  %11 = bitcast <8 x i16> %10 to <16 x i8>2672  %12 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %8, <16 x i8> %11)2673  %13 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %12)2674  store <16 x i8> %13, ptr %2, align 82675  ret void2676}2677 2678define arm_aapcs_vfpcc void @aesd_set16_via_val(i16 zeroext %0, <16 x i8> %1, ptr %2) nounwind {2679; CHECK-FIX-LABEL: aesd_set16_via_val:2680; CHECK-FIX:       @ %bb.0:2681; CHECK-FIX-NEXT:    vorr q0, q0, q02682; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r1]2683; CHECK-FIX-NEXT:    vmov.16 d0[0], r02684; CHECK-FIX-NEXT:    vmov.16 d16[0], r02685; CHECK-FIX-NEXT:    aesd.8 q8, q02686; CHECK-FIX-NEXT:    aesimc.8 q8, q82687; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r1]2688; CHECK-FIX-NEXT:    bx lr2689  %4 = bitcast ptr %2 to ptr2690  %5 = load <8 x i16>, ptr %4, align 82691  %6 = insertelement <8 x i16> %5, i16 %0, i64 02692  %7 = bitcast <8 x i16> %6 to <16 x i8>2693  %8 = bitcast <16 x i8> %1 to <8 x i16>2694  %9 = insertelement <8 x i16> %8, i16 %0, i64 02695  %10 = bitcast <8 x i16> %9 to <16 x i8>2696  %11 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %7, <16 x i8> %10)2697  %12 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %11)2698  store <16 x i8> %12, ptr %2, align 82699  ret void2700}2701 2702define arm_aapcs_vfpcc void @aesd_set16_cond_via_ptr(i1 zeroext %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {2703; CHECK-FIX-LABEL: aesd_set16_cond_via_ptr:2704; CHECK-FIX:       @ %bb.0:2705; CHECK-FIX-NEXT:    vorr q0, q0, q02706; CHECK-FIX-NEXT:    cmp r0, #02707; CHECK-FIX-NEXT:    beq .LBB64_22708; CHECK-FIX-NEXT:  @ %bb.1:2709; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]2710; CHECK-FIX-NEXT:    vld1.16 {d16[0]}, [r1:16]2711; CHECK-FIX-NEXT:    cmp r0, #02712; CHECK-FIX-NEXT:    bne .LBB64_32713; CHECK-FIX-NEXT:    b .LBB64_42714; CHECK-FIX-NEXT:  .LBB64_2:2715; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]2716; CHECK-FIX-NEXT:    cmp r0, #02717; CHECK-FIX-NEXT:    beq .LBB64_42718; CHECK-FIX-NEXT:  .LBB64_3:2719; CHECK-FIX-NEXT:    vld1.16 {d0[0]}, [r1:16]2720; CHECK-FIX-NEXT:  .LBB64_4:2721; CHECK-FIX-NEXT:    aesd.8 q8, q02722; CHECK-FIX-NEXT:    aesimc.8 q8, q82723; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]2724; CHECK-FIX-NEXT:    bx lr2725  br i1 %0, label %5, label %102726 27275:2728  %6 = load i16, ptr %1, align 22729  %7 = bitcast ptr %3 to ptr2730  %8 = load <8 x i16>, ptr %7, align 82731  %9 = insertelement <8 x i16> %8, i16 %6, i64 02732  br label %132733 273410:2735  %11 = bitcast ptr %3 to ptr2736  %12 = load <8 x i16>, ptr %11, align 82737  br label %132738 273913:2740  %14 = phi <8 x i16> [ %9, %5 ], [ %12, %10 ]2741  br i1 %0, label %15, label %192742 274315:2744  %16 = load i16, ptr %1, align 22745  %17 = bitcast <16 x i8> %2 to <8 x i16>2746  %18 = insertelement <8 x i16> %17, i16 %16, i64 02747  br label %212748 274919:2750  %20 = bitcast <16 x i8> %2 to <8 x i16>2751  br label %212752 275321:2754  %22 = phi <8 x i16> [ %18, %15 ], [ %20, %19 ]2755  %23 = bitcast <8 x i16> %14 to <16 x i8>2756  %24 = bitcast <8 x i16> %22 to <16 x i8>2757  %25 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %23, <16 x i8> %24)2758  %26 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %25)2759  store <16 x i8> %26, ptr %3, align 82760  ret void2761}2762 2763define arm_aapcs_vfpcc void @aesd_set16_cond_via_val(i1 zeroext %0, i16 zeroext %1, <16 x i8> %2, ptr %3) nounwind {2764; CHECK-FIX-LABEL: aesd_set16_cond_via_val:2765; CHECK-FIX:       @ %bb.0:2766; CHECK-FIX-NEXT:    vorr q0, q0, q02767; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]2768; CHECK-FIX-NEXT:    cmp r0, #02769; CHECK-FIX-NEXT:    beq .LBB65_22770; CHECK-FIX-NEXT:  @ %bb.1:2771; CHECK-FIX-NEXT:    vmov.16 d16[0], r12772; CHECK-FIX-NEXT:  .LBB65_2: @ %select.end2773; CHECK-FIX-NEXT:    cmp r0, #02774; CHECK-FIX-NEXT:    beq .LBB65_42775; CHECK-FIX-NEXT:  @ %bb.3:2776; CHECK-FIX-NEXT:    vmov.16 d0[0], r12777; CHECK-FIX-NEXT:  .LBB65_4: @ %select.end22778; CHECK-FIX-NEXT:    aesd.8 q8, q02779; CHECK-FIX-NEXT:    aesimc.8 q8, q82780; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]2781; CHECK-FIX-NEXT:    bx lr2782  %5 = bitcast ptr %3 to ptr2783  %6 = load <8 x i16>, ptr %5, align 82784  %7 = insertelement <8 x i16> %6, i16 %1, i64 02785  %8 = select i1 %0, <8 x i16> %7, <8 x i16> %62786  %9 = bitcast <16 x i8> %2 to <8 x i16>2787  %10 = insertelement <8 x i16> %9, i16 %1, i64 02788  %11 = select i1 %0, <8 x i16> %10, <8 x i16> %92789  %12 = bitcast <8 x i16> %8 to <16 x i8>2790  %13 = bitcast <8 x i16> %11 to <16 x i8>2791  %14 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %12, <16 x i8> %13)2792  %15 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %14)2793  store <16 x i8> %15, ptr %3, align 82794  ret void2795}2796 2797define arm_aapcs_vfpcc void @aesd_set16_loop_via_ptr(i32 %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {2798; CHECK-FIX-LABEL: aesd_set16_loop_via_ptr:2799; CHECK-FIX:       @ %bb.0:2800; CHECK-FIX-NEXT:    vorr q0, q0, q02801; CHECK-FIX-NEXT:    ldrh r1, [r1]2802; CHECK-FIX-NEXT:    cmp r0, #02803; CHECK-FIX-NEXT:    strh r1, [r2]2804; CHECK-FIX-NEXT:    bxeq lr2805; CHECK-FIX-NEXT:  .LBB66_1:2806; CHECK-FIX-NEXT:    vmov.16 d0[0], r12807; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]2808; CHECK-FIX-NEXT:  .LBB66_2: @ =>This Inner Loop Header: Depth=12809; CHECK-FIX-NEXT:    aesd.8 q8, q02810; CHECK-FIX-NEXT:    subs r0, r0, #12811; CHECK-FIX-NEXT:    aesimc.8 q8, q82812; CHECK-FIX-NEXT:    bne .LBB66_22813; CHECK-FIX-NEXT:  @ %bb.3:2814; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]2815; CHECK-FIX-NEXT:    bx lr2816  %5 = load i16, ptr %1, align 22817  %6 = bitcast <16 x i8> %2 to <8 x i16>2818  %7 = insertelement <8 x i16> %6, i16 %5, i64 02819  %8 = bitcast <8 x i16> %7 to <16 x i8>2820  %9 = bitcast ptr %3 to ptr2821  store i16 %5, ptr %9, align 82822  %10 = icmp eq i32 %0, 02823  br i1 %10, label %14, label %112824 282511:2826  %12 = load <16 x i8>, ptr %3, align 82827  br label %152828 282913:2830  store <16 x i8> %19, ptr %3, align 82831  br label %142832 283314:2834  ret void2835 283615:2837  %16 = phi <16 x i8> [ %12, %11 ], [ %19, %15 ]2838  %17 = phi i32 [ 0, %11 ], [ %20, %15 ]2839  %18 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %16, <16 x i8> %8)2840  %19 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %18)2841  %20 = add nuw i32 %17, 12842  %21 = icmp eq i32 %20, %02843  br i1 %21, label %13, label %152844}2845 2846define arm_aapcs_vfpcc void @aesd_set16_loop_via_val(i32 %0, i16 zeroext %1, <16 x i8> %2, ptr %3) nounwind {2847; CHECK-FIX-LABEL: aesd_set16_loop_via_val:2848; CHECK-FIX:       @ %bb.0:2849; CHECK-FIX-NEXT:    vorr q0, q0, q02850; CHECK-FIX-NEXT:    cmp r0, #02851; CHECK-FIX-NEXT:    bxeq lr2852; CHECK-FIX-NEXT:  .LBB67_1:2853; CHECK-FIX-NEXT:    vmov.16 d0[0], r12854; CHECK-FIX-NEXT:  .LBB67_2: @ =>This Inner Loop Header: Depth=12855; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]2856; CHECK-FIX-NEXT:    subs r0, r0, #12857; CHECK-FIX-NEXT:    vmov.16 d16[0], r12858; CHECK-FIX-NEXT:    aesd.8 q8, q02859; CHECK-FIX-NEXT:    aesimc.8 q8, q82860; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]2861; CHECK-FIX-NEXT:    bne .LBB67_22862; CHECK-FIX-NEXT:  @ %bb.3:2863; CHECK-FIX-NEXT:    bx lr2864  %5 = icmp eq i32 %0, 02865  br i1 %5, label %12, label %62866 28676:2868  %7 = bitcast <16 x i8> %2 to <8 x i16>2869  %8 = insertelement <8 x i16> %7, i16 %1, i64 02870  %9 = bitcast <8 x i16> %8 to <16 x i8>2871  %10 = bitcast ptr %3 to ptr2872  %11 = bitcast ptr %3 to ptr2873  br label %132874 287512:2876  ret void2877 287813:2879  %14 = phi i32 [ 0, %6 ], [ %20, %13 ]2880  %15 = load <8 x i16>, ptr %10, align 82881  %16 = insertelement <8 x i16> %15, i16 %1, i64 02882  %17 = bitcast <8 x i16> %16 to <16 x i8>2883  store i16 %1, ptr %11, align 82884  %18 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %17, <16 x i8> %9)2885  %19 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %18)2886  store <16 x i8> %19, ptr %3, align 82887  %20 = add nuw i32 %14, 12888  %21 = icmp eq i32 %20, %02889  br i1 %21, label %12, label %132890}2891 2892define arm_aapcs_vfpcc void @aesd_set32_via_ptr(ptr %0, <16 x i8> %1, ptr %2) nounwind {2893; CHECK-FIX-NOSCHED-LABEL: aesd_set32_via_ptr:2894; CHECK-FIX-NOSCHED:       @ %bb.0:2895; CHECK-FIX-NOSCHED-NEXT:    vorr q0, q0, q02896; CHECK-FIX-NOSCHED-NEXT:    ldr r0, [r0]2897; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r1]2898; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d0[0], r02899; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d16[0], r02900; CHECK-FIX-NOSCHED-NEXT:    aesd.8 q8, q02901; CHECK-FIX-NOSCHED-NEXT:    aesimc.8 q8, q82902; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r1]2903; CHECK-FIX-NOSCHED-NEXT:    bx lr2904;2905; CHECK-CORTEX-FIX-LABEL: aesd_set32_via_ptr:2906; CHECK-CORTEX-FIX:       @ %bb.0:2907; CHECK-CORTEX-FIX-NEXT:    vorr q0, q0, q02908; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r1]2909; CHECK-CORTEX-FIX-NEXT:    ldr r0, [r0]2910; CHECK-CORTEX-FIX-NEXT:    vmov.32 d0[0], r02911; CHECK-CORTEX-FIX-NEXT:    vmov.32 d16[0], r02912; CHECK-CORTEX-FIX-NEXT:    aesd.8 q8, q02913; CHECK-CORTEX-FIX-NEXT:    aesimc.8 q8, q82914; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r1]2915; CHECK-CORTEX-FIX-NEXT:    bx lr2916  %4 = load i32, ptr %0, align 42917  %5 = bitcast ptr %2 to ptr2918  %6 = load <4 x i32>, ptr %5, align 82919  %7 = insertelement <4 x i32> %6, i32 %4, i64 02920  %8 = bitcast <4 x i32> %7 to <16 x i8>2921  %9 = bitcast <16 x i8> %1 to <4 x i32>2922  %10 = insertelement <4 x i32> %9, i32 %4, i64 02923  %11 = bitcast <4 x i32> %10 to <16 x i8>2924  %12 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %8, <16 x i8> %11)2925  %13 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %12)2926  store <16 x i8> %13, ptr %2, align 82927  ret void2928}2929 2930define arm_aapcs_vfpcc void @aesd_set32_via_val(i32 %0, <16 x i8> %1, ptr %2) nounwind {2931; CHECK-FIX-LABEL: aesd_set32_via_val:2932; CHECK-FIX:       @ %bb.0:2933; CHECK-FIX-NEXT:    vorr q0, q0, q02934; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r1]2935; CHECK-FIX-NEXT:    vmov.32 d0[0], r02936; CHECK-FIX-NEXT:    vmov.32 d16[0], r02937; CHECK-FIX-NEXT:    aesd.8 q8, q02938; CHECK-FIX-NEXT:    aesimc.8 q8, q82939; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r1]2940; CHECK-FIX-NEXT:    bx lr2941  %4 = bitcast ptr %2 to ptr2942  %5 = load <4 x i32>, ptr %4, align 82943  %6 = insertelement <4 x i32> %5, i32 %0, i64 02944  %7 = bitcast <4 x i32> %6 to <16 x i8>2945  %8 = bitcast <16 x i8> %1 to <4 x i32>2946  %9 = insertelement <4 x i32> %8, i32 %0, i64 02947  %10 = bitcast <4 x i32> %9 to <16 x i8>2948  %11 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %7, <16 x i8> %10)2949  %12 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %11)2950  store <16 x i8> %12, ptr %2, align 82951  ret void2952}2953 2954define arm_aapcs_vfpcc void @aesd_set32_cond_via_ptr(i1 zeroext %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {2955; CHECK-FIX-LABEL: aesd_set32_cond_via_ptr:2956; CHECK-FIX:       @ %bb.0:2957; CHECK-FIX-NEXT:    vorr q0, q0, q02958; CHECK-FIX-NEXT:    cmp r0, #02959; CHECK-FIX-NEXT:    beq .LBB70_22960; CHECK-FIX-NEXT:  @ %bb.1:2961; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]2962; CHECK-FIX-NEXT:    vld1.32 {d16[0]}, [r1:32]2963; CHECK-FIX-NEXT:    cmp r0, #02964; CHECK-FIX-NEXT:    bne .LBB70_32965; CHECK-FIX-NEXT:    b .LBB70_42966; CHECK-FIX-NEXT:  .LBB70_2:2967; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]2968; CHECK-FIX-NEXT:    cmp r0, #02969; CHECK-FIX-NEXT:    beq .LBB70_42970; CHECK-FIX-NEXT:  .LBB70_3:2971; CHECK-FIX-NEXT:    vld1.32 {d0[0]}, [r1:32]2972; CHECK-FIX-NEXT:  .LBB70_4:2973; CHECK-FIX-NEXT:    aesd.8 q8, q02974; CHECK-FIX-NEXT:    aesimc.8 q8, q82975; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]2976; CHECK-FIX-NEXT:    bx lr2977  br i1 %0, label %5, label %102978 29795:2980  %6 = load i32, ptr %1, align 42981  %7 = bitcast ptr %3 to ptr2982  %8 = load <4 x i32>, ptr %7, align 82983  %9 = insertelement <4 x i32> %8, i32 %6, i64 02984  br label %132985 298610:2987  %11 = bitcast ptr %3 to ptr2988  %12 = load <4 x i32>, ptr %11, align 82989  br label %132990 299113:2992  %14 = phi <4 x i32> [ %9, %5 ], [ %12, %10 ]2993  br i1 %0, label %15, label %192994 299515:2996  %16 = load i32, ptr %1, align 42997  %17 = bitcast <16 x i8> %2 to <4 x i32>2998  %18 = insertelement <4 x i32> %17, i32 %16, i64 02999  br label %213000 300119:3002  %20 = bitcast <16 x i8> %2 to <4 x i32>3003  br label %213004 300521:3006  %22 = phi <4 x i32> [ %18, %15 ], [ %20, %19 ]3007  %23 = bitcast <4 x i32> %14 to <16 x i8>3008  %24 = bitcast <4 x i32> %22 to <16 x i8>3009  %25 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %23, <16 x i8> %24)3010  %26 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %25)3011  store <16 x i8> %26, ptr %3, align 83012  ret void3013}3014 3015define arm_aapcs_vfpcc void @aesd_set32_cond_via_val(i1 zeroext %0, i32 %1, <16 x i8> %2, ptr %3) nounwind {3016; CHECK-FIX-LABEL: aesd_set32_cond_via_val:3017; CHECK-FIX:       @ %bb.0:3018; CHECK-FIX-NEXT:    vorr q0, q0, q03019; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]3020; CHECK-FIX-NEXT:    cmp r0, #03021; CHECK-FIX-NEXT:    beq .LBB71_23022; CHECK-FIX-NEXT:  @ %bb.1:3023; CHECK-FIX-NEXT:    vmov.32 d16[0], r13024; CHECK-FIX-NEXT:  .LBB71_2: @ %select.end3025; CHECK-FIX-NEXT:    cmp r0, #03026; CHECK-FIX-NEXT:    beq .LBB71_43027; CHECK-FIX-NEXT:  @ %bb.3:3028; CHECK-FIX-NEXT:    vmov.32 d0[0], r13029; CHECK-FIX-NEXT:  .LBB71_4: @ %select.end23030; CHECK-FIX-NEXT:    aesd.8 q8, q03031; CHECK-FIX-NEXT:    aesimc.8 q8, q83032; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]3033; CHECK-FIX-NEXT:    bx lr3034  %5 = bitcast ptr %3 to ptr3035  %6 = load <4 x i32>, ptr %5, align 83036  %7 = insertelement <4 x i32> %6, i32 %1, i64 03037  %8 = select i1 %0, <4 x i32> %7, <4 x i32> %63038  %9 = bitcast <16 x i8> %2 to <4 x i32>3039  %10 = insertelement <4 x i32> %9, i32 %1, i64 03040  %11 = select i1 %0, <4 x i32> %10, <4 x i32> %93041  %12 = bitcast <4 x i32> %8 to <16 x i8>3042  %13 = bitcast <4 x i32> %11 to <16 x i8>3043  %14 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %12, <16 x i8> %13)3044  %15 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %14)3045  store <16 x i8> %15, ptr %3, align 83046  ret void3047}3048 3049define arm_aapcs_vfpcc void @aesd_set32_loop_via_ptr(i32 %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {3050; CHECK-FIX-LABEL: aesd_set32_loop_via_ptr:3051; CHECK-FIX:       @ %bb.0:3052; CHECK-FIX-NEXT:    vorr q0, q0, q03053; CHECK-FIX-NEXT:    ldr r1, [r1]3054; CHECK-FIX-NEXT:    cmp r0, #03055; CHECK-FIX-NEXT:    str r1, [r2]3056; CHECK-FIX-NEXT:    bxeq lr3057; CHECK-FIX-NEXT:  .LBB72_1:3058; CHECK-FIX-NEXT:    vmov.32 d0[0], r13059; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]3060; CHECK-FIX-NEXT:  .LBB72_2: @ =>This Inner Loop Header: Depth=13061; CHECK-FIX-NEXT:    aesd.8 q8, q03062; CHECK-FIX-NEXT:    subs r0, r0, #13063; CHECK-FIX-NEXT:    aesimc.8 q8, q83064; CHECK-FIX-NEXT:    bne .LBB72_23065; CHECK-FIX-NEXT:  @ %bb.3:3066; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]3067; CHECK-FIX-NEXT:    bx lr3068  %5 = load i32, ptr %1, align 43069  %6 = bitcast <16 x i8> %2 to <4 x i32>3070  %7 = insertelement <4 x i32> %6, i32 %5, i64 03071  %8 = bitcast <4 x i32> %7 to <16 x i8>3072  %9 = bitcast ptr %3 to ptr3073  store i32 %5, ptr %9, align 83074  %10 = icmp eq i32 %0, 03075  br i1 %10, label %14, label %113076 307711:3078  %12 = load <16 x i8>, ptr %3, align 83079  br label %153080 308113:3082  store <16 x i8> %19, ptr %3, align 83083  br label %143084 308514:3086  ret void3087 308815:3089  %16 = phi <16 x i8> [ %12, %11 ], [ %19, %15 ]3090  %17 = phi i32 [ 0, %11 ], [ %20, %15 ]3091  %18 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %16, <16 x i8> %8)3092  %19 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %18)3093  %20 = add nuw i32 %17, 13094  %21 = icmp eq i32 %20, %03095  br i1 %21, label %13, label %153096}3097 3098define arm_aapcs_vfpcc void @aesd_set32_loop_via_val(i32 %0, i32 %1, <16 x i8> %2, ptr %3) nounwind {3099; CHECK-FIX-LABEL: aesd_set32_loop_via_val:3100; CHECK-FIX:       @ %bb.0:3101; CHECK-FIX-NEXT:    vorr q0, q0, q03102; CHECK-FIX-NEXT:    cmp r0, #03103; CHECK-FIX-NEXT:    bxeq lr3104; CHECK-FIX-NEXT:  .LBB73_1:3105; CHECK-FIX-NEXT:    vmov.32 d0[0], r13106; CHECK-FIX-NEXT:  .LBB73_2: @ =>This Inner Loop Header: Depth=13107; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]3108; CHECK-FIX-NEXT:    subs r0, r0, #13109; CHECK-FIX-NEXT:    vmov.32 d16[0], r13110; CHECK-FIX-NEXT:    aesd.8 q8, q03111; CHECK-FIX-NEXT:    aesimc.8 q8, q83112; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]3113; CHECK-FIX-NEXT:    bne .LBB73_23114; CHECK-FIX-NEXT:  @ %bb.3:3115; CHECK-FIX-NEXT:    bx lr3116  %5 = icmp eq i32 %0, 03117  br i1 %5, label %12, label %63118 31196:3120  %7 = bitcast <16 x i8> %2 to <4 x i32>3121  %8 = insertelement <4 x i32> %7, i32 %1, i64 03122  %9 = bitcast <4 x i32> %8 to <16 x i8>3123  %10 = bitcast ptr %3 to ptr3124  %11 = bitcast ptr %3 to ptr3125  br label %133126 312712:3128  ret void3129 313013:3131  %14 = phi i32 [ 0, %6 ], [ %20, %13 ]3132  %15 = load <4 x i32>, ptr %10, align 83133  %16 = insertelement <4 x i32> %15, i32 %1, i64 03134  %17 = bitcast <4 x i32> %16 to <16 x i8>3135  store i32 %1, ptr %11, align 83136  %18 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %17, <16 x i8> %9)3137  %19 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %18)3138  store <16 x i8> %19, ptr %3, align 83139  %20 = add nuw i32 %14, 13140  %21 = icmp eq i32 %20, %03141  br i1 %21, label %12, label %133142}3143 3144define arm_aapcs_vfpcc void @aesd_set64_via_ptr(ptr %0, <16 x i8> %1, ptr %2) nounwind {3145; CHECK-FIX-NOSCHED-LABEL: aesd_set64_via_ptr:3146; CHECK-FIX-NOSCHED:       @ %bb.0:3147; CHECK-FIX-NOSCHED-NEXT:    vorr q0, q0, q03148; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r1]3149; CHECK-FIX-NOSCHED-NEXT:    vldr d0, [r0]3150; CHECK-FIX-NOSCHED-NEXT:    vorr d16, d0, d03151; CHECK-FIX-NOSCHED-NEXT:    aesd.8 q8, q03152; CHECK-FIX-NOSCHED-NEXT:    aesimc.8 q8, q83153; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r1]3154; CHECK-FIX-NOSCHED-NEXT:    bx lr3155;3156; CHECK-CORTEX-FIX-LABEL: aesd_set64_via_ptr:3157; CHECK-CORTEX-FIX:       @ %bb.0:3158; CHECK-CORTEX-FIX-NEXT:    vorr q0, q0, q03159; CHECK-CORTEX-FIX-NEXT:    vldr d0, [r0]3160; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r1]3161; CHECK-CORTEX-FIX-NEXT:    vorr d16, d0, d03162; CHECK-CORTEX-FIX-NEXT:    aesd.8 q8, q03163; CHECK-CORTEX-FIX-NEXT:    aesimc.8 q8, q83164; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r1]3165; CHECK-CORTEX-FIX-NEXT:    bx lr3166  %4 = load i64, ptr %0, align 83167  %5 = bitcast ptr %2 to ptr3168  %6 = load <2 x i64>, ptr %5, align 83169  %7 = insertelement <2 x i64> %6, i64 %4, i64 03170  %8 = bitcast <2 x i64> %7 to <16 x i8>3171  %9 = bitcast <16 x i8> %1 to <2 x i64>3172  %10 = insertelement <2 x i64> %9, i64 %4, i64 03173  %11 = bitcast <2 x i64> %10 to <16 x i8>3174  %12 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %8, <16 x i8> %11)3175  %13 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %12)3176  store <16 x i8> %13, ptr %2, align 83177  ret void3178}3179 3180define arm_aapcs_vfpcc void @aesd_set64_via_val(i64 %0, <16 x i8> %1, ptr %2) nounwind {3181; CHECK-FIX-LABEL: aesd_set64_via_val:3182; CHECK-FIX:       @ %bb.0:3183; CHECK-FIX-NEXT:    vorr q0, q0, q03184; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]3185; CHECK-FIX-NEXT:    vmov.32 d0[0], r03186; CHECK-FIX-NEXT:    vmov.32 d16[0], r03187; CHECK-FIX-NEXT:    vmov.32 d0[1], r13188; CHECK-FIX-NEXT:    vmov.32 d16[1], r13189; CHECK-FIX-NEXT:    aesd.8 q8, q03190; CHECK-FIX-NEXT:    aesimc.8 q8, q83191; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]3192; CHECK-FIX-NEXT:    bx lr3193  %4 = bitcast ptr %2 to ptr3194  %5 = load <2 x i64>, ptr %4, align 83195  %6 = insertelement <2 x i64> %5, i64 %0, i64 03196  %7 = bitcast <2 x i64> %6 to <16 x i8>3197  %8 = bitcast <16 x i8> %1 to <2 x i64>3198  %9 = insertelement <2 x i64> %8, i64 %0, i64 03199  %10 = bitcast <2 x i64> %9 to <16 x i8>3200  %11 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %7, <16 x i8> %10)3201  %12 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %11)3202  store <16 x i8> %12, ptr %2, align 83203  ret void3204}3205 3206define arm_aapcs_vfpcc void @aesd_set64_cond_via_ptr(i1 zeroext %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {3207; CHECK-FIX-NOSCHED-LABEL: aesd_set64_cond_via_ptr:3208; CHECK-FIX-NOSCHED:       @ %bb.0:3209; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #03210; CHECK-FIX-NOSCHED-NEXT:    beq .LBB76_23211; CHECK-FIX-NOSCHED-NEXT:  @ %bb.1:3212; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r2]3213; CHECK-FIX-NOSCHED-NEXT:    vldr d16, [r1]3214; CHECK-FIX-NOSCHED-NEXT:    b .LBB76_33215; CHECK-FIX-NOSCHED-NEXT:  .LBB76_2:3216; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r2]3217; CHECK-FIX-NOSCHED-NEXT:  .LBB76_3:3218; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #03219; CHECK-FIX-NOSCHED-NEXT:    vldrne d0, [r1]3220; CHECK-FIX-NOSCHED-NEXT:    vorr q0, q0, q03221; CHECK-FIX-NOSCHED-NEXT:    aesd.8 q8, q03222; CHECK-FIX-NOSCHED-NEXT:    aesimc.8 q8, q83223; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r2]3224; CHECK-FIX-NOSCHED-NEXT:    bx lr3225;3226; CHECK-CORTEX-FIX-LABEL: aesd_set64_cond_via_ptr:3227; CHECK-CORTEX-FIX:       @ %bb.0:3228; CHECK-CORTEX-FIX-NEXT:    cmp r0, #03229; CHECK-CORTEX-FIX-NEXT:    beq .LBB76_23230; CHECK-CORTEX-FIX-NEXT:  @ %bb.1:3231; CHECK-CORTEX-FIX-NEXT:    vldr d18, [r1]3232; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r2]3233; CHECK-CORTEX-FIX-NEXT:    vorr d16, d18, d183234; CHECK-CORTEX-FIX-NEXT:    b .LBB76_33235; CHECK-CORTEX-FIX-NEXT:  .LBB76_2:3236; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r2]3237; CHECK-CORTEX-FIX-NEXT:  .LBB76_3:3238; CHECK-CORTEX-FIX-NEXT:    cmp r0, #03239; CHECK-CORTEX-FIX-NEXT:    vldrne d0, [r1]3240; CHECK-CORTEX-FIX-NEXT:    vorr q0, q0, q03241; CHECK-CORTEX-FIX-NEXT:    aesd.8 q8, q03242; CHECK-CORTEX-FIX-NEXT:    aesimc.8 q8, q83243; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r2]3244; CHECK-CORTEX-FIX-NEXT:    bx lr3245  br i1 %0, label %5, label %103246 32475:3248  %6 = load i64, ptr %1, align 83249  %7 = bitcast ptr %3 to ptr3250  %8 = load <2 x i64>, ptr %7, align 83251  %9 = insertelement <2 x i64> %8, i64 %6, i64 03252  br label %133253 325410:3255  %11 = bitcast ptr %3 to ptr3256  %12 = load <2 x i64>, ptr %11, align 83257  br label %133258 325913:3260  %14 = phi <2 x i64> [ %9, %5 ], [ %12, %10 ]3261  br i1 %0, label %15, label %193262 326315:3264  %16 = load i64, ptr %1, align 83265  %17 = bitcast <16 x i8> %2 to <2 x i64>3266  %18 = insertelement <2 x i64> %17, i64 %16, i64 03267  br label %213268 326919:3270  %20 = bitcast <16 x i8> %2 to <2 x i64>3271  br label %213272 327321:3274  %22 = phi <2 x i64> [ %18, %15 ], [ %20, %19 ]3275  %23 = bitcast <2 x i64> %14 to <16 x i8>3276  %24 = bitcast <2 x i64> %22 to <16 x i8>3277  %25 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %23, <16 x i8> %24)3278  %26 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %25)3279  store <16 x i8> %26, ptr %3, align 83280  ret void3281}3282 3283define arm_aapcs_vfpcc void @aesd_set64_cond_via_val(i1 zeroext %0, i64 %1, <16 x i8> %2, ptr %3) nounwind {3284; CHECK-FIX-LABEL: aesd_set64_cond_via_val:3285; CHECK-FIX:       @ %bb.0:3286; CHECK-FIX-NEXT:    vorr q0, q0, q03287; CHECK-FIX-NEXT:    ldr r1, [sp]3288; CHECK-FIX-NEXT:    cmp r0, #03289; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r1]3290; CHECK-FIX-NEXT:    beq .LBB77_23291; CHECK-FIX-NEXT:  @ %bb.1:3292; CHECK-FIX-NEXT:    vmov.32 d16[0], r23293; CHECK-FIX-NEXT:    vmov.32 d16[1], r33294; CHECK-FIX-NEXT:  .LBB77_2: @ %select.end3295; CHECK-FIX-NEXT:    cmp r0, #03296; CHECK-FIX-NEXT:    beq .LBB77_43297; CHECK-FIX-NEXT:  @ %bb.3:3298; CHECK-FIX-NEXT:    vmov.32 d0[0], r23299; CHECK-FIX-NEXT:    vmov.32 d0[1], r33300; CHECK-FIX-NEXT:  .LBB77_4: @ %select.end23301; CHECK-FIX-NEXT:    aesd.8 q8, q03302; CHECK-FIX-NEXT:    aesimc.8 q8, q83303; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r1]3304; CHECK-FIX-NEXT:    bx lr3305  %5 = bitcast ptr %3 to ptr3306  %6 = load <2 x i64>, ptr %5, align 83307  %7 = insertelement <2 x i64> %6, i64 %1, i64 03308  %8 = select i1 %0, <2 x i64> %7, <2 x i64> %63309  %9 = bitcast <16 x i8> %2 to <2 x i64>3310  %10 = insertelement <2 x i64> %9, i64 %1, i64 03311  %11 = select i1 %0, <2 x i64> %10, <2 x i64> %93312  %12 = bitcast <2 x i64> %8 to <16 x i8>3313  %13 = bitcast <2 x i64> %11 to <16 x i8>3314  %14 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %12, <16 x i8> %13)3315  %15 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %14)3316  store <16 x i8> %15, ptr %3, align 83317  ret void3318}3319 3320define arm_aapcs_vfpcc void @aesd_set64_loop_via_ptr(i32 %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {3321; CHECK-FIX-NOSCHED-LABEL: aesd_set64_loop_via_ptr:3322; CHECK-FIX-NOSCHED:       @ %bb.0:3323; CHECK-FIX-NOSCHED-NEXT:    vorr q0, q0, q03324; CHECK-FIX-NOSCHED-NEXT:    .save {r4, r5, r11, lr}3325; CHECK-FIX-NOSCHED-NEXT:    push {r4, r5, r11, lr}3326; CHECK-FIX-NOSCHED-NEXT:    ldrd r4, r5, [r1]3327; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #03328; CHECK-FIX-NOSCHED-NEXT:    strd r4, r5, [r2]3329; CHECK-FIX-NOSCHED-NEXT:    beq .LBB78_43330; CHECK-FIX-NOSCHED-NEXT:  @ %bb.1:3331; CHECK-FIX-NOSCHED-NEXT:    vmov d0, r4, r53332; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r2]3333; CHECK-FIX-NOSCHED-NEXT:  .LBB78_2: @ =>This Inner Loop Header: Depth=13334; CHECK-FIX-NOSCHED-NEXT:    aesd.8 q8, q03335; CHECK-FIX-NOSCHED-NEXT:    subs r0, r0, #13336; CHECK-FIX-NOSCHED-NEXT:    aesimc.8 q8, q83337; CHECK-FIX-NOSCHED-NEXT:    bne .LBB78_23338; CHECK-FIX-NOSCHED-NEXT:  @ %bb.3:3339; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r2]3340; CHECK-FIX-NOSCHED-NEXT:  .LBB78_4:3341; CHECK-FIX-NOSCHED-NEXT:    pop {r4, r5, r11, pc}3342;3343; CHECK-CORTEX-FIX-LABEL: aesd_set64_loop_via_ptr:3344; CHECK-CORTEX-FIX:       @ %bb.0:3345; CHECK-CORTEX-FIX-NEXT:    vorr q0, q0, q03346; CHECK-CORTEX-FIX-NEXT:    .save {r4, r5, r11, lr}3347; CHECK-CORTEX-FIX-NEXT:    push {r4, r5, r11, lr}3348; CHECK-CORTEX-FIX-NEXT:    ldrd r4, r5, [r1]3349; CHECK-CORTEX-FIX-NEXT:    cmp r0, #03350; CHECK-CORTEX-FIX-NEXT:    strd r4, r5, [r2]3351; CHECK-CORTEX-FIX-NEXT:    popeq {r4, r5, r11, pc}3352; CHECK-CORTEX-FIX-NEXT:  .LBB78_1:3353; CHECK-CORTEX-FIX-NEXT:    vmov d0, r4, r53354; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r2]3355; CHECK-CORTEX-FIX-NEXT:  .LBB78_2: @ =>This Inner Loop Header: Depth=13356; CHECK-CORTEX-FIX-NEXT:    aesd.8 q8, q03357; CHECK-CORTEX-FIX-NEXT:    subs r0, r0, #13358; CHECK-CORTEX-FIX-NEXT:    aesimc.8 q8, q83359; CHECK-CORTEX-FIX-NEXT:    bne .LBB78_23360; CHECK-CORTEX-FIX-NEXT:  @ %bb.3:3361; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r2]3362; CHECK-CORTEX-FIX-NEXT:    pop {r4, r5, r11, pc}3363  %5 = load i64, ptr %1, align 83364  %6 = bitcast <16 x i8> %2 to <2 x i64>3365  %7 = insertelement <2 x i64> %6, i64 %5, i64 03366  %8 = bitcast <2 x i64> %7 to <16 x i8>3367  %9 = bitcast ptr %3 to ptr3368  store i64 %5, ptr %9, align 83369  %10 = icmp eq i32 %0, 03370  br i1 %10, label %14, label %113371 337211:3373  %12 = load <16 x i8>, ptr %3, align 83374  br label %153375 337613:3377  store <16 x i8> %19, ptr %3, align 83378  br label %143379 338014:3381  ret void3382 338315:3384  %16 = phi <16 x i8> [ %12, %11 ], [ %19, %15 ]3385  %17 = phi i32 [ 0, %11 ], [ %20, %15 ]3386  %18 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %16, <16 x i8> %8)3387  %19 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %18)3388  %20 = add nuw i32 %17, 13389  %21 = icmp eq i32 %20, %03390  br i1 %21, label %13, label %153391}3392 3393define arm_aapcs_vfpcc void @aesd_set64_loop_via_val(i32 %0, i64 %1, <16 x i8> %2, ptr %3) nounwind {3394; CHECK-FIX-LABEL: aesd_set64_loop_via_val:3395; CHECK-FIX:       @ %bb.0:3396; CHECK-FIX-NEXT:    vorr q0, q0, q03397; CHECK-FIX-NEXT:    cmp r0, #03398; CHECK-FIX-NEXT:    bxeq lr3399; CHECK-FIX-NEXT:  .LBB79_1:3400; CHECK-FIX-NEXT:    vmov.32 d0[0], r23401; CHECK-FIX-NEXT:    ldr r1, [sp]3402; CHECK-FIX-NEXT:    vmov.32 d0[1], r33403; CHECK-FIX-NEXT:  .LBB79_2: @ =>This Inner Loop Header: Depth=13404; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r1]3405; CHECK-FIX-NEXT:    subs r0, r0, #13406; CHECK-FIX-NEXT:    vmov.32 d16[0], r23407; CHECK-FIX-NEXT:    vmov.32 d16[1], r33408; CHECK-FIX-NEXT:    aesd.8 q8, q03409; CHECK-FIX-NEXT:    aesimc.8 q8, q83410; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r1]3411; CHECK-FIX-NEXT:    bne .LBB79_23412; CHECK-FIX-NEXT:  @ %bb.3:3413; CHECK-FIX-NEXT:    bx lr3414  %5 = icmp eq i32 %0, 03415  br i1 %5, label %12, label %63416 34176:3418  %7 = bitcast <16 x i8> %2 to <2 x i64>3419  %8 = insertelement <2 x i64> %7, i64 %1, i64 03420  %9 = bitcast <2 x i64> %8 to <16 x i8>3421  %10 = bitcast ptr %3 to ptr3422  %11 = bitcast ptr %3 to ptr3423  br label %133424 342512:3426  ret void3427 342813:3429  %14 = phi i32 [ 0, %6 ], [ %20, %13 ]3430  %15 = load <2 x i64>, ptr %10, align 83431  %16 = insertelement <2 x i64> %15, i64 %1, i64 03432  %17 = bitcast <2 x i64> %16 to <16 x i8>3433  store i64 %1, ptr %11, align 83434  %18 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %17, <16 x i8> %9)3435  %19 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %18)3436  store <16 x i8> %19, ptr %3, align 83437  %20 = add nuw i32 %14, 13438  %21 = icmp eq i32 %20, %03439  br i1 %21, label %12, label %133440}3441 3442define arm_aapcs_vfpcc void @aesd_setf16_via_ptr(ptr %0, <16 x i8> %1, ptr %2) nounwind {3443; CHECK-FIX-NOSCHED-LABEL: aesd_setf16_via_ptr:3444; CHECK-FIX-NOSCHED:       @ %bb.0:3445; CHECK-FIX-NOSCHED-NEXT:    vorr q0, q0, q03446; CHECK-FIX-NOSCHED-NEXT:    ldrh r0, [r0]3447; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r1]3448; CHECK-FIX-NOSCHED-NEXT:    vmov.16 d0[0], r03449; CHECK-FIX-NOSCHED-NEXT:    vmov.16 d16[0], r03450; CHECK-FIX-NOSCHED-NEXT:    aesd.8 q8, q03451; CHECK-FIX-NOSCHED-NEXT:    aesimc.8 q8, q83452; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r1]3453; CHECK-FIX-NOSCHED-NEXT:    bx lr3454;3455; CHECK-CORTEX-FIX-LABEL: aesd_setf16_via_ptr:3456; CHECK-CORTEX-FIX:       @ %bb.0:3457; CHECK-CORTEX-FIX-NEXT:    vorr q0, q0, q03458; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r1]3459; CHECK-CORTEX-FIX-NEXT:    ldrh r0, [r0]3460; CHECK-CORTEX-FIX-NEXT:    vmov.16 d0[0], r03461; CHECK-CORTEX-FIX-NEXT:    vmov.16 d16[0], r03462; CHECK-CORTEX-FIX-NEXT:    aesd.8 q8, q03463; CHECK-CORTEX-FIX-NEXT:    aesimc.8 q8, q83464; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r1]3465; CHECK-CORTEX-FIX-NEXT:    bx lr3466  %4 = bitcast ptr %0 to ptr3467  %5 = load i16, ptr %4, align 23468  %6 = bitcast ptr %2 to ptr3469  %7 = load <8 x i16>, ptr %6, align 83470  %8 = insertelement <8 x i16> %7, i16 %5, i64 03471  %9 = bitcast <8 x i16> %8 to <16 x i8>3472  %10 = bitcast <16 x i8> %1 to <8 x i16>3473  %11 = insertelement <8 x i16> %10, i16 %5, i64 03474  %12 = bitcast <8 x i16> %11 to <16 x i8>3475  %13 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %9, <16 x i8> %12)3476  %14 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %13)3477  store <16 x i8> %14, ptr %2, align 83478  ret void3479}3480 3481define arm_aapcs_vfpcc void @aesd_setf16_via_val(half %0, <16 x i8> %1, ptr %2) nounwind {3482; CHECK-FIX-LABEL: aesd_setf16_via_val:3483; CHECK-FIX:       @ %bb.0:3484; CHECK-FIX-NEXT:    vorr q1, q1, q13485; CHECK-FIX-NEXT:    vmov r1, s03486; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r0]3487; CHECK-FIX-NEXT:    vmov.16 d2[0], r13488; CHECK-FIX-NEXT:    vmov.16 d16[0], r13489; CHECK-FIX-NEXT:    aesd.8 q8, q13490; CHECK-FIX-NEXT:    aesimc.8 q8, q83491; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r0]3492; CHECK-FIX-NEXT:    bx lr3493  %4 = bitcast ptr %2 to ptr3494  %5 = load <8 x i16>, ptr %4, align 83495  %6 = bitcast half %0 to i163496  %7 = insertelement <8 x i16> %5, i16 %6, i64 03497  %8 = bitcast <8 x i16> %7 to <16 x i8>3498  %9 = bitcast <16 x i8> %1 to <8 x i16>3499  %10 = insertelement <8 x i16> %9, i16 %6, i64 03500  %11 = bitcast <8 x i16> %10 to <16 x i8>3501  %12 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %8, <16 x i8> %11)3502  %13 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %12)3503  store <16 x i8> %13, ptr %2, align 83504  ret void3505}3506 3507define arm_aapcs_vfpcc void @aesd_setf16_cond_via_ptr(i1 zeroext %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {3508; CHECK-FIX-NOSCHED-LABEL: aesd_setf16_cond_via_ptr:3509; CHECK-FIX-NOSCHED:       @ %bb.0:3510; CHECK-FIX-NOSCHED-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}3511; CHECK-FIX-NOSCHED-NEXT:    push {r4, r5, r6, r7, r8, r9, r10, r11, lr}3512; CHECK-FIX-NOSCHED-NEXT:    .pad #123513; CHECK-FIX-NOSCHED-NEXT:    sub sp, sp, #123514; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #03515; CHECK-FIX-NOSCHED-NEXT:    beq .LBB82_33516; CHECK-FIX-NOSCHED-NEXT:  @ %bb.1:3517; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r2]3518; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r3, d17[3]3519; CHECK-FIX-NOSCHED-NEXT:    ldrh r7, [r1]3520; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r9, d17[0]3521; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r10, d16[3]3522; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r11, d16[2]3523; CHECK-FIX-NOSCHED-NEXT:    str r3, [sp, #8] @ 4-byte Spill3524; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r3, d17[2]3525; CHECK-FIX-NOSCHED-NEXT:    str r3, [sp, #4] @ 4-byte Spill3526; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r3, d17[1]3527; CHECK-FIX-NOSCHED-NEXT:    str r3, [sp] @ 4-byte Spill3528; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r3, d16[1]3529; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #03530; CHECK-FIX-NOSCHED-NEXT:    bne .LBB82_43531; CHECK-FIX-NOSCHED-NEXT:  .LBB82_2:3532; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r0, d1[3]3533; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r4, d1[2]3534; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r5, d1[1]3535; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r6, d1[0]3536; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r12, d0[3]3537; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 lr, d0[2]3538; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r8, d0[1]3539; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r1, d0[0]3540; CHECK-FIX-NOSCHED-NEXT:    b .LBB82_53541; CHECK-FIX-NOSCHED-NEXT:  .LBB82_3:3542; CHECK-FIX-NOSCHED-NEXT:    add r3, r2, #83543; CHECK-FIX-NOSCHED-NEXT:    vld1.32 {d16[0]}, [r2:32]3544; CHECK-FIX-NOSCHED-NEXT:    vld1.32 {d17[0]}, [r3:32]3545; CHECK-FIX-NOSCHED-NEXT:    add r3, r2, #43546; CHECK-FIX-NOSCHED-NEXT:    vld1.32 {d16[1]}, [r3:32]3547; CHECK-FIX-NOSCHED-NEXT:    add r3, r2, #123548; CHECK-FIX-NOSCHED-NEXT:    vld1.32 {d17[1]}, [r3:32]3549; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r3, d17[3]3550; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r9, d17[0]3551; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r10, d16[3]3552; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r11, d16[2]3553; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r7, d16[0]3554; CHECK-FIX-NOSCHED-NEXT:    str r3, [sp, #8] @ 4-byte Spill3555; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r3, d17[2]3556; CHECK-FIX-NOSCHED-NEXT:    str r3, [sp, #4] @ 4-byte Spill3557; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r3, d17[1]3558; CHECK-FIX-NOSCHED-NEXT:    str r3, [sp] @ 4-byte Spill3559; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r3, d16[1]3560; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #03561; CHECK-FIX-NOSCHED-NEXT:    beq .LBB82_23562; CHECK-FIX-NOSCHED-NEXT:  .LBB82_4:3563; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r0, d1[3]3564; CHECK-FIX-NOSCHED-NEXT:    ldrh r1, [r1]3565; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r4, d1[2]3566; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r5, d1[1]3567; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r6, d1[0]3568; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r12, d0[3]3569; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 lr, d0[2]3570; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r8, d0[1]3571; CHECK-FIX-NOSCHED-NEXT:  .LBB82_5:3572; CHECK-FIX-NOSCHED-NEXT:    pkhbt r1, r1, r8, lsl #163573; CHECK-FIX-NOSCHED-NEXT:    pkhbt r3, r7, r3, lsl #163574; CHECK-FIX-NOSCHED-NEXT:    pkhbt r0, r4, r0, lsl #163575; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d18[0], r13576; CHECK-FIX-NOSCHED-NEXT:    pkhbt r1, lr, r12, lsl #163577; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d16[0], r33578; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d18[1], r13579; CHECK-FIX-NOSCHED-NEXT:    pkhbt r1, r11, r10, lsl #163580; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d16[1], r13581; CHECK-FIX-NOSCHED-NEXT:    pkhbt r1, r6, r5, lsl #163582; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d19[0], r13583; CHECK-FIX-NOSCHED-NEXT:    ldr r1, [sp] @ 4-byte Reload3584; CHECK-FIX-NOSCHED-NEXT:    pkhbt r1, r9, r1, lsl #163585; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d19[1], r03586; CHECK-FIX-NOSCHED-NEXT:    ldr r0, [sp, #8] @ 4-byte Reload3587; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d17[0], r13588; CHECK-FIX-NOSCHED-NEXT:    ldr r1, [sp, #4] @ 4-byte Reload3589; CHECK-FIX-NOSCHED-NEXT:    pkhbt r0, r1, r0, lsl #163590; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d17[1], r03591; CHECK-FIX-NOSCHED-NEXT:    aesd.8 q8, q93592; CHECK-FIX-NOSCHED-NEXT:    aesimc.8 q8, q83593; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r2]3594; CHECK-FIX-NOSCHED-NEXT:    add sp, sp, #123595; CHECK-FIX-NOSCHED-NEXT:    pop {r4, r5, r6, r7, r8, r9, r10, r11, pc}3596;3597; CHECK-CORTEX-FIX-LABEL: aesd_setf16_cond_via_ptr:3598; CHECK-CORTEX-FIX:       @ %bb.0:3599; CHECK-CORTEX-FIX-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}3600; CHECK-CORTEX-FIX-NEXT:    push {r4, r5, r6, r7, r8, r9, r10, r11, lr}3601; CHECK-CORTEX-FIX-NEXT:    .pad #243602; CHECK-CORTEX-FIX-NEXT:    sub sp, sp, #243603; CHECK-CORTEX-FIX-NEXT:    cmp r0, #03604; CHECK-CORTEX-FIX-NEXT:    beq .LBB82_33605; CHECK-CORTEX-FIX-NEXT:  @ %bb.1:3606; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r2]3607; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d16[1]3608; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r6, d17[0]3609; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r7, d17[2]3610; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r4, d17[3]3611; CHECK-CORTEX-FIX-NEXT:    str r3, [sp, #20] @ 4-byte Spill3612; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d16[2]3613; CHECK-CORTEX-FIX-NEXT:    str r3, [sp, #8] @ 4-byte Spill3614; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d16[3]3615; CHECK-CORTEX-FIX-NEXT:    str r3, [sp, #4] @ 4-byte Spill3616; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d17[1]3617; CHECK-CORTEX-FIX-NEXT:    str r3, [sp, #12] @ 4-byte Spill3618; CHECK-CORTEX-FIX-NEXT:    ldrh r3, [r1]3619; CHECK-CORTEX-FIX-NEXT:    str r3, [sp, #16] @ 4-byte Spill3620; CHECK-CORTEX-FIX-NEXT:    mov r3, r63621; CHECK-CORTEX-FIX-NEXT:    cmp r0, #03622; CHECK-CORTEX-FIX-NEXT:    bne .LBB82_43623; CHECK-CORTEX-FIX-NEXT:  .LBB82_2:3624; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r0, d0[0]3625; CHECK-CORTEX-FIX-NEXT:    b .LBB82_53626; CHECK-CORTEX-FIX-NEXT:  .LBB82_3:3627; CHECK-CORTEX-FIX-NEXT:    vld1.32 {d16[0]}, [r2:32]3628; CHECK-CORTEX-FIX-NEXT:    add r3, r2, #83629; CHECK-CORTEX-FIX-NEXT:    add r7, r2, #43630; CHECK-CORTEX-FIX-NEXT:    vld1.32 {d17[0]}, [r3:32]3631; CHECK-CORTEX-FIX-NEXT:    add r3, r2, #123632; CHECK-CORTEX-FIX-NEXT:    vld1.32 {d16[1]}, [r7:32]3633; CHECK-CORTEX-FIX-NEXT:    vld1.32 {d17[1]}, [r3:32]3634; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d16[0]3635; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r7, d17[1]3636; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r4, d17[3]3637; CHECK-CORTEX-FIX-NEXT:    str r3, [sp, #16] @ 4-byte Spill3638; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d16[1]3639; CHECK-CORTEX-FIX-NEXT:    str r7, [sp, #12] @ 4-byte Spill3640; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r7, d17[2]3641; CHECK-CORTEX-FIX-NEXT:    str r3, [sp, #20] @ 4-byte Spill3642; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d16[2]3643; CHECK-CORTEX-FIX-NEXT:    str r3, [sp, #8] @ 4-byte Spill3644; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d16[3]3645; CHECK-CORTEX-FIX-NEXT:    str r3, [sp, #4] @ 4-byte Spill3646; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d17[0]3647; CHECK-CORTEX-FIX-NEXT:    cmp r0, #03648; CHECK-CORTEX-FIX-NEXT:    beq .LBB82_23649; CHECK-CORTEX-FIX-NEXT:  .LBB82_4:3650; CHECK-CORTEX-FIX-NEXT:    ldrh r0, [r1]3651; CHECK-CORTEX-FIX-NEXT:  .LBB82_5:3652; CHECK-CORTEX-FIX-NEXT:    str r0, [sp] @ 4-byte Spill3653; CHECK-CORTEX-FIX-NEXT:    ldr r0, [sp, #8] @ 4-byte Reload3654; CHECK-CORTEX-FIX-NEXT:    ldr r1, [sp, #4] @ 4-byte Reload3655; CHECK-CORTEX-FIX-NEXT:    pkhbt r9, r7, r4, lsl #163656; CHECK-CORTEX-FIX-NEXT:    ldr r4, [sp, #20] @ 4-byte Reload3657; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r10, d0[1]3658; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r6, d0[2]3659; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r12, d0[3]3660; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r11, d1[0]3661; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r5, d1[1]3662; CHECK-CORTEX-FIX-NEXT:    vmov.u16 lr, d1[2]3663; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r8, d1[3]3664; CHECK-CORTEX-FIX-NEXT:    pkhbt r7, r0, r1, lsl #163665; CHECK-CORTEX-FIX-NEXT:    ldr r1, [sp, #12] @ 4-byte Reload3666; CHECK-CORTEX-FIX-NEXT:    pkhbt r0, lr, r8, lsl #163667; CHECK-CORTEX-FIX-NEXT:    pkhbt r6, r6, r12, lsl #163668; CHECK-CORTEX-FIX-NEXT:    pkhbt r5, r11, r5, lsl #163669; CHECK-CORTEX-FIX-NEXT:    pkhbt r1, r3, r1, lsl #163670; CHECK-CORTEX-FIX-NEXT:    ldr r3, [sp, #16] @ 4-byte Reload3671; CHECK-CORTEX-FIX-NEXT:    pkhbt r4, r3, r4, lsl #163672; CHECK-CORTEX-FIX-NEXT:    ldr r3, [sp] @ 4-byte Reload3673; CHECK-CORTEX-FIX-NEXT:    vmov.32 d18[0], r43674; CHECK-CORTEX-FIX-NEXT:    vmov.32 d19[0], r13675; CHECK-CORTEX-FIX-NEXT:    vmov.32 d18[1], r73676; CHECK-CORTEX-FIX-NEXT:    vmov.32 d19[1], r93677; CHECK-CORTEX-FIX-NEXT:    pkhbt r3, r3, r10, lsl #163678; CHECK-CORTEX-FIX-NEXT:    vmov.32 d16[0], r33679; CHECK-CORTEX-FIX-NEXT:    vmov.32 d17[0], r53680; CHECK-CORTEX-FIX-NEXT:    vmov.32 d16[1], r63681; CHECK-CORTEX-FIX-NEXT:    vmov.32 d17[1], r03682; CHECK-CORTEX-FIX-NEXT:    aesd.8 q9, q83683; CHECK-CORTEX-FIX-NEXT:    aesimc.8 q8, q93684; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r2]3685; CHECK-CORTEX-FIX-NEXT:    add sp, sp, #243686; CHECK-CORTEX-FIX-NEXT:    pop {r4, r5, r6, r7, r8, r9, r10, r11, pc}3687  br i1 %0, label %5, label %123688 36895:3690  %6 = bitcast ptr %1 to ptr3691  %7 = load i16, ptr %6, align 23692  %8 = bitcast ptr %3 to ptr3693  %9 = load <8 x i16>, ptr %8, align 83694  %10 = insertelement <8 x i16> %9, i16 %7, i64 03695  %11 = bitcast <8 x i16> %10 to <8 x half>3696  br label %153697 369812:3699  %13 = bitcast ptr %3 to ptr3700  %14 = load <8 x half>, ptr %13, align 83701  br label %153702 370315:3704  %16 = phi <8 x half> [ %11, %5 ], [ %14, %12 ]3705  br i1 %0, label %17, label %233706 370717:3708  %18 = bitcast ptr %1 to ptr3709  %19 = load i16, ptr %18, align 23710  %20 = bitcast <16 x i8> %2 to <8 x i16>3711  %21 = insertelement <8 x i16> %20, i16 %19, i64 03712  %22 = bitcast <8 x i16> %21 to <8 x half>3713  br label %253714 371523:3716  %24 = bitcast <16 x i8> %2 to <8 x half>3717  br label %253718 371925:3720  %26 = phi <8 x half> [ %22, %17 ], [ %24, %23 ]3721  %27 = bitcast <8 x half> %16 to <16 x i8>3722  %28 = bitcast <8 x half> %26 to <16 x i8>3723  %29 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %27, <16 x i8> %28)3724  %30 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %29)3725  store <16 x i8> %30, ptr %3, align 83726  ret void3727}3728 3729define arm_aapcs_vfpcc void @aesd_setf16_cond_via_val(i1 zeroext %0, half %1, <16 x i8> %2, ptr %3) nounwind {3730; CHECK-FIX-NOSCHED-LABEL: aesd_setf16_cond_via_val:3731; CHECK-FIX-NOSCHED:       @ %bb.0:3732; CHECK-FIX-NOSCHED-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}3733; CHECK-FIX-NOSCHED-NEXT:    push {r4, r5, r6, r7, r8, r9, r10, r11, lr}3734; CHECK-FIX-NOSCHED-NEXT:    .pad #123735; CHECK-FIX-NOSCHED-NEXT:    sub sp, sp, #123736; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #03737; CHECK-FIX-NOSCHED-NEXT:    beq .LBB83_23738; CHECK-FIX-NOSCHED-NEXT:  @ %bb.1:3739; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r1]3740; CHECK-FIX-NOSCHED-NEXT:    vmov.f32 s2, s03741; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r2, d17[1]3742; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r7, d17[3]3743; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 lr, d17[2]3744; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r11, d16[2]3745; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r8, d16[1]3746; CHECK-FIX-NOSCHED-NEXT:    str r2, [sp, #8] @ 4-byte Spill3747; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r2, d17[0]3748; CHECK-FIX-NOSCHED-NEXT:    str r2, [sp, #4] @ 4-byte Spill3749; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r2, d16[3]3750; CHECK-FIX-NOSCHED-NEXT:    str r2, [sp] @ 4-byte Spill3751; CHECK-FIX-NOSCHED-NEXT:    b .LBB83_33752; CHECK-FIX-NOSCHED-NEXT:  .LBB83_2:3753; CHECK-FIX-NOSCHED-NEXT:    add r2, r1, #83754; CHECK-FIX-NOSCHED-NEXT:    vld1.32 {d16[0]}, [r1:32]3755; CHECK-FIX-NOSCHED-NEXT:    vld1.32 {d17[0]}, [r2:32]3756; CHECK-FIX-NOSCHED-NEXT:    add r2, r1, #43757; CHECK-FIX-NOSCHED-NEXT:    vld1.32 {d16[1]}, [r2:32]3758; CHECK-FIX-NOSCHED-NEXT:    add r2, r1, #123759; CHECK-FIX-NOSCHED-NEXT:    vld1.32 {d17[1]}, [r2:32]3760; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r2, d17[1]3761; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r7, d17[3]3762; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 lr, d17[2]3763; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r11, d16[2]3764; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r8, d16[1]3765; CHECK-FIX-NOSCHED-NEXT:    str r2, [sp, #8] @ 4-byte Spill3766; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r2, d17[0]3767; CHECK-FIX-NOSCHED-NEXT:    str r2, [sp, #4] @ 4-byte Spill3768; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r2, d16[3]3769; CHECK-FIX-NOSCHED-NEXT:    str r2, [sp] @ 4-byte Spill3770; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r2, d16[0]3771; CHECK-FIX-NOSCHED-NEXT:    vmov s2, r23772; CHECK-FIX-NOSCHED-NEXT:  .LBB83_3:3773; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r9, d3[3]3774; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #03775; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r10, d3[2]3776; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r2, d3[1]3777; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r3, d3[0]3778; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r4, d2[3]3779; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r5, d2[2]3780; CHECK-FIX-NOSCHED-NEXT:    beq .LBB83_53781; CHECK-FIX-NOSCHED-NEXT:  @ %bb.4:3782; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r12, d2[1]3783; CHECK-FIX-NOSCHED-NEXT:    b .LBB83_63784; CHECK-FIX-NOSCHED-NEXT:  .LBB83_5:3785; CHECK-FIX-NOSCHED-NEXT:    mov r0, lr3786; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 lr, d2[0]3787; CHECK-FIX-NOSCHED-NEXT:    vmov.u16 r12, d2[1]3788; CHECK-FIX-NOSCHED-NEXT:    vmov s0, lr3789; CHECK-FIX-NOSCHED-NEXT:    mov lr, r03790; CHECK-FIX-NOSCHED-NEXT:  .LBB83_6:3791; CHECK-FIX-NOSCHED-NEXT:    vmov r0, s03792; CHECK-FIX-NOSCHED-NEXT:    vmov r6, s23793; CHECK-FIX-NOSCHED-NEXT:    pkhbt r0, r0, r12, lsl #163794; CHECK-FIX-NOSCHED-NEXT:    pkhbt r6, r6, r8, lsl #163795; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d18[0], r03796; CHECK-FIX-NOSCHED-NEXT:    pkhbt r0, r5, r4, lsl #163797; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d16[0], r63798; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d18[1], r03799; CHECK-FIX-NOSCHED-NEXT:    ldr r0, [sp] @ 4-byte Reload3800; CHECK-FIX-NOSCHED-NEXT:    pkhbt r0, r11, r0, lsl #163801; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d16[1], r03802; CHECK-FIX-NOSCHED-NEXT:    pkhbt r0, r3, r2, lsl #163803; CHECK-FIX-NOSCHED-NEXT:    ldr r2, [sp, #4] @ 4-byte Reload3804; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d19[0], r03805; CHECK-FIX-NOSCHED-NEXT:    ldr r0, [sp, #8] @ 4-byte Reload3806; CHECK-FIX-NOSCHED-NEXT:    pkhbt r0, r2, r0, lsl #163807; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d17[0], r03808; CHECK-FIX-NOSCHED-NEXT:    pkhbt r0, r10, r9, lsl #163809; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d19[1], r03810; CHECK-FIX-NOSCHED-NEXT:    pkhbt r0, lr, r7, lsl #163811; CHECK-FIX-NOSCHED-NEXT:    vmov.32 d17[1], r03812; CHECK-FIX-NOSCHED-NEXT:    aesd.8 q8, q93813; CHECK-FIX-NOSCHED-NEXT:    aesimc.8 q8, q83814; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r1]3815; CHECK-FIX-NOSCHED-NEXT:    add sp, sp, #123816; CHECK-FIX-NOSCHED-NEXT:    pop {r4, r5, r6, r7, r8, r9, r10, r11, pc}3817;3818; CHECK-CORTEX-FIX-LABEL: aesd_setf16_cond_via_val:3819; CHECK-CORTEX-FIX:       @ %bb.0:3820; CHECK-CORTEX-FIX-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}3821; CHECK-CORTEX-FIX-NEXT:    push {r4, r5, r6, r7, r8, r9, r10, r11, lr}3822; CHECK-CORTEX-FIX-NEXT:    .pad #123823; CHECK-CORTEX-FIX-NEXT:    sub sp, sp, #123824; CHECK-CORTEX-FIX-NEXT:    cmp r0, #03825; CHECK-CORTEX-FIX-NEXT:    beq .LBB83_33826; CHECK-CORTEX-FIX-NEXT:  @ %bb.1:3827; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r1]3828; CHECK-CORTEX-FIX-NEXT:    vmov.f32 s2, s03829; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r2, d16[1]3830; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r7, d16[2]3831; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r10, d16[3]3832; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r11, d17[2]3833; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r6, d17[3]3834; CHECK-CORTEX-FIX-NEXT:    str r2, [sp, #8] @ 4-byte Spill3835; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r2, d17[0]3836; CHECK-CORTEX-FIX-NEXT:    str r2, [sp, #4] @ 4-byte Spill3837; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r2, d17[1]3838; CHECK-CORTEX-FIX-NEXT:    str r2, [sp] @ 4-byte Spill3839; CHECK-CORTEX-FIX-NEXT:    cmp r0, #03840; CHECK-CORTEX-FIX-NEXT:    bne .LBB83_43841; CHECK-CORTEX-FIX-NEXT:  .LBB83_2:3842; CHECK-CORTEX-FIX-NEXT:    vmov.u16 lr, d2[0]3843; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r8, d2[1]3844; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d2[2]3845; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r4, d2[3]3846; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r9, d3[0]3847; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r2, d3[1]3848; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r5, d3[2]3849; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r12, d3[3]3850; CHECK-CORTEX-FIX-NEXT:    vmov s0, lr3851; CHECK-CORTEX-FIX-NEXT:    b .LBB83_53852; CHECK-CORTEX-FIX-NEXT:  .LBB83_3:3853; CHECK-CORTEX-FIX-NEXT:    vld1.32 {d16[0]}, [r1:32]3854; CHECK-CORTEX-FIX-NEXT:    add r2, r1, #83855; CHECK-CORTEX-FIX-NEXT:    add r3, r1, #43856; CHECK-CORTEX-FIX-NEXT:    vld1.32 {d17[0]}, [r2:32]3857; CHECK-CORTEX-FIX-NEXT:    add r2, r1, #123858; CHECK-CORTEX-FIX-NEXT:    vld1.32 {d16[1]}, [r3:32]3859; CHECK-CORTEX-FIX-NEXT:    vld1.32 {d17[1]}, [r2:32]3860; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d16[1]3861; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r2, d16[0]3862; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r7, d16[2]3863; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r10, d16[3]3864; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r11, d17[2]3865; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r6, d17[3]3866; CHECK-CORTEX-FIX-NEXT:    str r3, [sp, #8] @ 4-byte Spill3867; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d17[0]3868; CHECK-CORTEX-FIX-NEXT:    vmov s2, r23869; CHECK-CORTEX-FIX-NEXT:    str r3, [sp, #4] @ 4-byte Spill3870; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d17[1]3871; CHECK-CORTEX-FIX-NEXT:    str r3, [sp] @ 4-byte Spill3872; CHECK-CORTEX-FIX-NEXT:    cmp r0, #03873; CHECK-CORTEX-FIX-NEXT:    beq .LBB83_23874; CHECK-CORTEX-FIX-NEXT:  .LBB83_4:3875; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r8, d2[1]3876; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r3, d2[2]3877; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r4, d2[3]3878; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r9, d3[0]3879; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r2, d3[1]3880; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r5, d3[2]3881; CHECK-CORTEX-FIX-NEXT:    vmov.u16 r12, d3[3]3882; CHECK-CORTEX-FIX-NEXT:  .LBB83_5:3883; CHECK-CORTEX-FIX-NEXT:    pkhbt lr, r11, r6, lsl #163884; CHECK-CORTEX-FIX-NEXT:    pkhbt r0, r7, r10, lsl #163885; CHECK-CORTEX-FIX-NEXT:    ldm sp, {r6, r7} @ 8-byte Folded Reload3886; CHECK-CORTEX-FIX-NEXT:    pkhbt r3, r3, r4, lsl #163887; CHECK-CORTEX-FIX-NEXT:    pkhbt r5, r5, r12, lsl #163888; CHECK-CORTEX-FIX-NEXT:    pkhbt r2, r9, r2, lsl #163889; CHECK-CORTEX-FIX-NEXT:    pkhbt r4, r7, r6, lsl #163890; CHECK-CORTEX-FIX-NEXT:    vmov r7, s23891; CHECK-CORTEX-FIX-NEXT:    ldr r6, [sp, #8] @ 4-byte Reload3892; CHECK-CORTEX-FIX-NEXT:    pkhbt r7, r7, r6, lsl #163893; CHECK-CORTEX-FIX-NEXT:    vmov r6, s03894; CHECK-CORTEX-FIX-NEXT:    vmov.32 d18[0], r73895; CHECK-CORTEX-FIX-NEXT:    vmov.32 d19[0], r43896; CHECK-CORTEX-FIX-NEXT:    vmov.32 d18[1], r03897; CHECK-CORTEX-FIX-NEXT:    vmov.32 d19[1], lr3898; CHECK-CORTEX-FIX-NEXT:    pkhbt r6, r6, r8, lsl #163899; CHECK-CORTEX-FIX-NEXT:    vmov.32 d16[0], r63900; CHECK-CORTEX-FIX-NEXT:    vmov.32 d17[0], r23901; CHECK-CORTEX-FIX-NEXT:    vmov.32 d16[1], r33902; CHECK-CORTEX-FIX-NEXT:    vmov.32 d17[1], r53903; CHECK-CORTEX-FIX-NEXT:    aesd.8 q9, q83904; CHECK-CORTEX-FIX-NEXT:    aesimc.8 q8, q93905; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r1]3906; CHECK-CORTEX-FIX-NEXT:    add sp, sp, #123907; CHECK-CORTEX-FIX-NEXT:    pop {r4, r5, r6, r7, r8, r9, r10, r11, pc}3908  br i1 %0, label %5, label %113909 39105:3911  %6 = bitcast ptr %3 to ptr3912  %7 = load <8 x i16>, ptr %6, align 83913  %8 = bitcast half %1 to i163914  %9 = insertelement <8 x i16> %7, i16 %8, i64 03915  %10 = bitcast <8 x i16> %9 to <8 x half>3916  br label %143917 391811:3919  %12 = bitcast ptr %3 to ptr3920  %13 = load <8 x half>, ptr %12, align 83921  br label %143922 392314:3924  %15 = phi <8 x half> [ %10, %5 ], [ %13, %11 ]3925  br i1 %0, label %16, label %213926 392716:3928  %17 = bitcast <16 x i8> %2 to <8 x i16>3929  %18 = bitcast half %1 to i163930  %19 = insertelement <8 x i16> %17, i16 %18, i64 03931  %20 = bitcast <8 x i16> %19 to <8 x half>3932  br label %233933 393421:3935  %22 = bitcast <16 x i8> %2 to <8 x half>3936  br label %233937 393823:3939  %24 = phi <8 x half> [ %20, %16 ], [ %22, %21 ]3940  %25 = bitcast <8 x half> %15 to <16 x i8>3941  %26 = bitcast <8 x half> %24 to <16 x i8>3942  %27 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %25, <16 x i8> %26)3943  %28 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %27)3944  store <16 x i8> %28, ptr %3, align 83945  ret void3946}3947 3948define arm_aapcs_vfpcc void @aesd_setf16_loop_via_ptr(i32 %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {3949; CHECK-FIX-LABEL: aesd_setf16_loop_via_ptr:3950; CHECK-FIX:       @ %bb.0:3951; CHECK-FIX-NEXT:    vorr q0, q0, q03952; CHECK-FIX-NEXT:    ldrh r1, [r1]3953; CHECK-FIX-NEXT:    cmp r0, #03954; CHECK-FIX-NEXT:    strh r1, [r2]3955; CHECK-FIX-NEXT:    bxeq lr3956; CHECK-FIX-NEXT:  .LBB84_1:3957; CHECK-FIX-NEXT:    vmov.16 d0[0], r13958; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]3959; CHECK-FIX-NEXT:  .LBB84_2: @ =>This Inner Loop Header: Depth=13960; CHECK-FIX-NEXT:    aesd.8 q8, q03961; CHECK-FIX-NEXT:    subs r0, r0, #13962; CHECK-FIX-NEXT:    aesimc.8 q8, q83963; CHECK-FIX-NEXT:    bne .LBB84_23964; CHECK-FIX-NEXT:  @ %bb.3:3965; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]3966; CHECK-FIX-NEXT:    bx lr3967  %5 = bitcast ptr %1 to ptr3968  %6 = load i16, ptr %5, align 23969  %7 = bitcast <16 x i8> %2 to <8 x i16>3970  %8 = insertelement <8 x i16> %7, i16 %6, i64 03971  %9 = bitcast <8 x i16> %8 to <16 x i8>3972  %10 = bitcast ptr %3 to ptr3973  store i16 %6, ptr %10, align 83974  %11 = icmp eq i32 %0, 03975  br i1 %11, label %15, label %123976 397712:3978  %13 = load <16 x i8>, ptr %3, align 83979  br label %163980 398114:3982  store <16 x i8> %20, ptr %3, align 83983  br label %153984 398515:3986  ret void3987 398816:3989  %17 = phi <16 x i8> [ %13, %12 ], [ %20, %16 ]3990  %18 = phi i32 [ 0, %12 ], [ %21, %16 ]3991  %19 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %17, <16 x i8> %9)3992  %20 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %19)3993  %21 = add nuw i32 %18, 13994  %22 = icmp eq i32 %21, %03995  br i1 %22, label %14, label %163996}3997 3998define arm_aapcs_vfpcc void @aesd_setf16_loop_via_val(i32 %0, half %1, <16 x i8> %2, ptr %3) nounwind {3999; CHECK-FIX-LABEL: aesd_setf16_loop_via_val:4000; CHECK-FIX:       @ %bb.0:4001; CHECK-FIX-NEXT:    vorr q1, q1, q14002; CHECK-FIX-NEXT:    cmp r0, #04003; CHECK-FIX-NEXT:    bxeq lr4004; CHECK-FIX-NEXT:  .LBB85_1:4005; CHECK-FIX-NEXT:    vmov r2, s04006; CHECK-FIX-NEXT:    vmov.16 d2[0], r24007; CHECK-FIX-NEXT:  .LBB85_2: @ =>This Inner Loop Header: Depth=14008; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r1]4009; CHECK-FIX-NEXT:    subs r0, r0, #14010; CHECK-FIX-NEXT:    vmov.16 d16[0], r24011; CHECK-FIX-NEXT:    aesd.8 q8, q14012; CHECK-FIX-NEXT:    aesimc.8 q8, q84013; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r1]4014; CHECK-FIX-NEXT:    bne .LBB85_24015; CHECK-FIX-NEXT:  @ %bb.3:4016; CHECK-FIX-NEXT:    bx lr4017  %5 = icmp eq i32 %0, 04018  br i1 %5, label %13, label %64019 40206:4021  %7 = bitcast <16 x i8> %2 to <8 x i16>4022  %8 = bitcast half %1 to i164023  %9 = insertelement <8 x i16> %7, i16 %8, i64 04024  %10 = bitcast <8 x i16> %9 to <16 x i8>4025  %11 = bitcast ptr %3 to ptr4026  %12 = bitcast ptr %3 to ptr4027  br label %144028 402913:4030  ret void4031 403214:4033  %15 = phi i32 [ 0, %6 ], [ %21, %14 ]4034  %16 = load <8 x i16>, ptr %11, align 84035  %17 = insertelement <8 x i16> %16, i16 %8, i64 04036  %18 = bitcast <8 x i16> %17 to <16 x i8>4037  store half %1, ptr %12, align 84038  %19 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %18, <16 x i8> %10)4039  %20 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %19)4040  store <16 x i8> %20, ptr %3, align 84041  %21 = add nuw i32 %15, 14042  %22 = icmp eq i32 %21, %04043  br i1 %22, label %13, label %144044}4045 4046define arm_aapcs_vfpcc void @aesd_setf32_via_ptr(ptr %0, <16 x i8> %1, ptr %2) nounwind {4047; CHECK-FIX-LABEL: aesd_setf32_via_ptr:4048; CHECK-FIX:       @ %bb.0:4049; CHECK-FIX-NEXT:    vldr s0, [r0]4050; CHECK-FIX-NEXT:    vld1.64 {d2, d3}, [r1]4051; CHECK-FIX-NEXT:    vmov.f32 s4, s04052; CHECK-FIX-NEXT:    vorr q1, q1, q14053; CHECK-FIX-NEXT:    vorr q0, q0, q04054; CHECK-FIX-NEXT:    aesd.8 q1, q04055; CHECK-FIX-NEXT:    aesimc.8 q8, q14056; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r1]4057; CHECK-FIX-NEXT:    bx lr4058  %4 = load float, ptr %0, align 44059  %5 = bitcast ptr %2 to ptr4060  %6 = load <4 x float>, ptr %5, align 84061  %7 = insertelement <4 x float> %6, float %4, i64 04062  %8 = bitcast <4 x float> %7 to <16 x i8>4063  %9 = bitcast <16 x i8> %1 to <4 x float>4064  %10 = insertelement <4 x float> %9, float %4, i64 04065  %11 = bitcast <4 x float> %10 to <16 x i8>4066  %12 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %8, <16 x i8> %11)4067  %13 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %12)4068  store <16 x i8> %13, ptr %2, align 84069  ret void4070}4071 4072define arm_aapcs_vfpcc void @aesd_setf32_via_val(float %0, <16 x i8> %1, ptr %2) nounwind {4073; CHECK-FIX-LABEL: aesd_setf32_via_val:4074; CHECK-FIX:       @ %bb.0:4075; CHECK-FIX-NEXT:    vmov.f32 s4, s04076; CHECK-FIX-NEXT:    vld1.64 {d0, d1}, [r0]4077; CHECK-FIX-NEXT:    vmov.f32 s0, s44078; CHECK-FIX-NEXT:    vorr q0, q0, q04079; CHECK-FIX-NEXT:    vorr q1, q1, q14080; CHECK-FIX-NEXT:    aesd.8 q0, q14081; CHECK-FIX-NEXT:    aesimc.8 q8, q04082; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r0]4083; CHECK-FIX-NEXT:    bx lr4084  %4 = bitcast ptr %2 to ptr4085  %5 = load <4 x float>, ptr %4, align 84086  %6 = insertelement <4 x float> %5, float %0, i64 04087  %7 = bitcast <4 x float> %6 to <16 x i8>4088  %8 = bitcast <16 x i8> %1 to <4 x float>4089  %9 = insertelement <4 x float> %8, float %0, i64 04090  %10 = bitcast <4 x float> %9 to <16 x i8>4091  %11 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %7, <16 x i8> %10)4092  %12 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %11)4093  store <16 x i8> %12, ptr %2, align 84094  ret void4095}4096 4097define arm_aapcs_vfpcc void @aesd_setf32_cond_via_ptr(i1 zeroext %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {4098; CHECK-FIX-LABEL: aesd_setf32_cond_via_ptr:4099; CHECK-FIX:       @ %bb.0:4100; CHECK-FIX-NEXT:    vorr q0, q0, q04101; CHECK-FIX-NEXT:    cmp r0, #04102; CHECK-FIX-NEXT:    beq .LBB88_24103; CHECK-FIX-NEXT:  @ %bb.1:4104; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]4105; CHECK-FIX-NEXT:    vld1.32 {d16[0]}, [r1:32]4106; CHECK-FIX-NEXT:    cmp r0, #04107; CHECK-FIX-NEXT:    bne .LBB88_34108; CHECK-FIX-NEXT:    b .LBB88_44109; CHECK-FIX-NEXT:  .LBB88_2:4110; CHECK-FIX-NEXT:    vld1.64 {d16, d17}, [r2]4111; CHECK-FIX-NEXT:    cmp r0, #04112; CHECK-FIX-NEXT:    beq .LBB88_44113; CHECK-FIX-NEXT:  .LBB88_3:4114; CHECK-FIX-NEXT:    vld1.32 {d0[0]}, [r1:32]4115; CHECK-FIX-NEXT:  .LBB88_4:4116; CHECK-FIX-NEXT:    aesd.8 q8, q04117; CHECK-FIX-NEXT:    aesimc.8 q8, q84118; CHECK-FIX-NEXT:    vst1.64 {d16, d17}, [r2]4119; CHECK-FIX-NEXT:    bx lr4120  br i1 %0, label %5, label %104121 41225:4123  %6 = load float, ptr %1, align 44124  %7 = bitcast ptr %3 to ptr4125  %8 = load <4 x float>, ptr %7, align 84126  %9 = insertelement <4 x float> %8, float %6, i64 04127  br label %134128 412910:4130  %11 = bitcast ptr %3 to ptr4131  %12 = load <4 x float>, ptr %11, align 84132  br label %134133 413413:4135  %14 = phi <4 x float> [ %9, %5 ], [ %12, %10 ]4136  br i1 %0, label %15, label %194137 413815:4139  %16 = load float, ptr %1, align 44140  %17 = bitcast <16 x i8> %2 to <4 x float>4141  %18 = insertelement <4 x float> %17, float %16, i64 04142  br label %214143 414419:4145  %20 = bitcast <16 x i8> %2 to <4 x float>4146  br label %214147 414821:4149  %22 = phi <4 x float> [ %18, %15 ], [ %20, %19 ]4150  %23 = bitcast <4 x float> %14 to <16 x i8>4151  %24 = bitcast <4 x float> %22 to <16 x i8>4152  %25 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %23, <16 x i8> %24)4153  %26 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %25)4154  store <16 x i8> %26, ptr %3, align 84155  ret void4156}4157 4158define arm_aapcs_vfpcc void @aesd_setf32_cond_via_val(i1 zeroext %0, float %1, <16 x i8> %2, ptr %3) nounwind {4159; CHECK-FIX-NOSCHED-LABEL: aesd_setf32_cond_via_val:4160; CHECK-FIX-NOSCHED:       @ %bb.0:4161; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d4, d5}, [r1]4162; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #04163; CHECK-FIX-NOSCHED-NEXT:    vmovne.f32 s8, s04164; CHECK-FIX-NOSCHED-NEXT:    vorr q2, q2, q24165; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #04166; CHECK-FIX-NOSCHED-NEXT:    vmovne.f32 s4, s04167; CHECK-FIX-NOSCHED-NEXT:    vorr q1, q1, q14168; CHECK-FIX-NOSCHED-NEXT:    aesd.8 q2, q14169; CHECK-FIX-NOSCHED-NEXT:    aesimc.8 q8, q24170; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r1]4171; CHECK-FIX-NOSCHED-NEXT:    bx lr4172;4173; CHECK-CORTEX-FIX-LABEL: aesd_setf32_cond_via_val:4174; CHECK-CORTEX-FIX:       @ %bb.0:4175; CHECK-CORTEX-FIX-NEXT:    cmp r0, #04176; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d4, d5}, [r1]4177; CHECK-CORTEX-FIX-NEXT:    vmovne.f32 s8, s04178; CHECK-CORTEX-FIX-NEXT:    vorr q2, q2, q24179; CHECK-CORTEX-FIX-NEXT:    cmp r0, #04180; CHECK-CORTEX-FIX-NEXT:    vmovne.f32 s4, s04181; CHECK-CORTEX-FIX-NEXT:    vorr q1, q1, q14182; CHECK-CORTEX-FIX-NEXT:    aesd.8 q2, q14183; CHECK-CORTEX-FIX-NEXT:    aesimc.8 q8, q24184; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r1]4185; CHECK-CORTEX-FIX-NEXT:    bx lr4186  %5 = bitcast ptr %3 to ptr4187  %6 = load <4 x float>, ptr %5, align 84188  %7 = insertelement <4 x float> %6, float %1, i64 04189  %8 = select i1 %0, <4 x float> %7, <4 x float> %64190  %9 = bitcast <16 x i8> %2 to <4 x float>4191  %10 = insertelement <4 x float> %9, float %1, i64 04192  %11 = select i1 %0, <4 x float> %10, <4 x float> %94193  %12 = bitcast <4 x float> %8 to <16 x i8>4194  %13 = bitcast <4 x float> %11 to <16 x i8>4195  %14 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %12, <16 x i8> %13)4196  %15 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %14)4197  store <16 x i8> %15, ptr %3, align 84198  ret void4199}4200 4201define arm_aapcs_vfpcc void @aesd_setf32_loop_via_ptr(i32 %0, ptr %1, <16 x i8> %2, ptr %3) nounwind {4202; CHECK-FIX-NOSCHED-LABEL: aesd_setf32_loop_via_ptr:4203; CHECK-FIX-NOSCHED:       @ %bb.0:4204; CHECK-FIX-NOSCHED-NEXT:    vldr s4, [r1]4205; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #04206; CHECK-FIX-NOSCHED-NEXT:    vstr s4, [r2]4207; CHECK-FIX-NOSCHED-NEXT:    bxeq lr4208; CHECK-FIX-NOSCHED-NEXT:  .LBB90_1:4209; CHECK-FIX-NOSCHED-NEXT:    vmov.f32 s0, s44210; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r2]4211; CHECK-FIX-NOSCHED-NEXT:  .LBB90_2: @ =>This Inner Loop Header: Depth=14212; CHECK-FIX-NOSCHED-NEXT:    vorr q0, q0, q04213; CHECK-FIX-NOSCHED-NEXT:    aesd.8 q8, q04214; CHECK-FIX-NOSCHED-NEXT:    subs r0, r0, #14215; CHECK-FIX-NOSCHED-NEXT:    aesimc.8 q8, q84216; CHECK-FIX-NOSCHED-NEXT:    bne .LBB90_24217; CHECK-FIX-NOSCHED-NEXT:  @ %bb.3:4218; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r2]4219; CHECK-FIX-NOSCHED-NEXT:    bx lr4220;4221; CHECK-CORTEX-FIX-LABEL: aesd_setf32_loop_via_ptr:4222; CHECK-CORTEX-FIX:       @ %bb.0:4223; CHECK-CORTEX-FIX-NEXT:    vldr s4, [r1]4224; CHECK-CORTEX-FIX-NEXT:    cmp r0, #04225; CHECK-CORTEX-FIX-NEXT:    vstr s4, [r2]4226; CHECK-CORTEX-FIX-NEXT:    bxeq lr4227; CHECK-CORTEX-FIX-NEXT:  .LBB90_1:4228; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r2]4229; CHECK-CORTEX-FIX-NEXT:    vmov.f32 s0, s44230; CHECK-CORTEX-FIX-NEXT:  .LBB90_2: @ =>This Inner Loop Header: Depth=14231; CHECK-CORTEX-FIX-NEXT:    vorr q0, q0, q04232; CHECK-CORTEX-FIX-NEXT:    aesd.8 q8, q04233; CHECK-CORTEX-FIX-NEXT:    subs r0, r0, #14234; CHECK-CORTEX-FIX-NEXT:    aesimc.8 q8, q84235; CHECK-CORTEX-FIX-NEXT:    bne .LBB90_24236; CHECK-CORTEX-FIX-NEXT:  @ %bb.3:4237; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r2]4238; CHECK-CORTEX-FIX-NEXT:    bx lr4239  %5 = load float, ptr %1, align 44240  %6 = bitcast <16 x i8> %2 to <4 x float>4241  %7 = insertelement <4 x float> %6, float %5, i64 04242  %8 = bitcast <4 x float> %7 to <16 x i8>4243  %9 = bitcast ptr %3 to ptr4244  store float %5, ptr %9, align 84245  %10 = icmp eq i32 %0, 04246  br i1 %10, label %14, label %114247 424811:4249  %12 = load <16 x i8>, ptr %3, align 84250  br label %154251 425213:4253  store <16 x i8> %19, ptr %3, align 84254  br label %144255 425614:4257  ret void4258 425915:4260  %16 = phi <16 x i8> [ %12, %11 ], [ %19, %15 ]4261  %17 = phi i32 [ 0, %11 ], [ %20, %15 ]4262  %18 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %16, <16 x i8> %8)4263  %19 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %18)4264  %20 = add nuw i32 %17, 14265  %21 = icmp eq i32 %20, %04266  br i1 %21, label %13, label %154267}4268 4269define arm_aapcs_vfpcc void @aesd_setf32_loop_via_val(i32 %0, float %1, <16 x i8> %2, ptr %3) nounwind {4270; CHECK-FIX-NOSCHED-LABEL: aesd_setf32_loop_via_val:4271; CHECK-FIX-NOSCHED:       @ %bb.0:4272; CHECK-FIX-NOSCHED-NEXT:    cmp r0, #04273; CHECK-FIX-NOSCHED-NEXT:    bxeq lr4274; CHECK-FIX-NOSCHED-NEXT:  .LBB91_1:4275; CHECK-FIX-NOSCHED-NEXT:    vmov.f32 s4, s04276; CHECK-FIX-NOSCHED-NEXT:  .LBB91_2: @ =>This Inner Loop Header: Depth=14277; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d4, d5}, [r1]4278; CHECK-FIX-NOSCHED-NEXT:    subs r0, r0, #14279; CHECK-FIX-NOSCHED-NEXT:    vmov.f32 s8, s04280; CHECK-FIX-NOSCHED-NEXT:    vorr q2, q2, q24281; CHECK-FIX-NOSCHED-NEXT:    vorr q1, q1, q14282; CHECK-FIX-NOSCHED-NEXT:    aesd.8 q2, q14283; CHECK-FIX-NOSCHED-NEXT:    aesimc.8 q8, q24284; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r1]4285; CHECK-FIX-NOSCHED-NEXT:    bne .LBB91_24286; CHECK-FIX-NOSCHED-NEXT:  @ %bb.3:4287; CHECK-FIX-NOSCHED-NEXT:    bx lr4288;4289; CHECK-CORTEX-FIX-LABEL: aesd_setf32_loop_via_val:4290; CHECK-CORTEX-FIX:       @ %bb.0:4291; CHECK-CORTEX-FIX-NEXT:    cmp r0, #04292; CHECK-CORTEX-FIX-NEXT:    bxeq lr4293; CHECK-CORTEX-FIX-NEXT:  .LBB91_1:4294; CHECK-CORTEX-FIX-NEXT:    vmov.f32 s4, s04295; CHECK-CORTEX-FIX-NEXT:  .LBB91_2: @ =>This Inner Loop Header: Depth=14296; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d4, d5}, [r1]4297; CHECK-CORTEX-FIX-NEXT:    vmov.f32 s8, s04298; CHECK-CORTEX-FIX-NEXT:    vorr q2, q2, q24299; CHECK-CORTEX-FIX-NEXT:    subs r0, r0, #14300; CHECK-CORTEX-FIX-NEXT:    vorr q1, q1, q14301; CHECK-CORTEX-FIX-NEXT:    aesd.8 q2, q14302; CHECK-CORTEX-FIX-NEXT:    aesimc.8 q8, q24303; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r1]4304; CHECK-CORTEX-FIX-NEXT:    bne .LBB91_24305; CHECK-CORTEX-FIX-NEXT:  @ %bb.3:4306; CHECK-CORTEX-FIX-NEXT:    bx lr4307  %5 = icmp eq i32 %0, 04308  br i1 %5, label %12, label %64309 43106:4311  %7 = bitcast <16 x i8> %2 to <4 x float>4312  %8 = insertelement <4 x float> %7, float %1, i64 04313  %9 = bitcast <4 x float> %8 to <16 x i8>4314  %10 = bitcast ptr %3 to ptr4315  %11 = bitcast ptr %3 to ptr4316  br label %134317 431812:4319  ret void4320 432113:4322  %14 = phi i32 [ 0, %6 ], [ %20, %13 ]4323  %15 = load <4 x float>, ptr %10, align 84324  %16 = insertelement <4 x float> %15, float %1, i64 04325  %17 = bitcast <4 x float> %16 to <16 x i8>4326  store float %1, ptr %11, align 84327  %18 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %17, <16 x i8> %9)4328  %19 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %18)4329  store <16 x i8> %19, ptr %3, align 84330  %20 = add nuw i32 %14, 14331  %21 = icmp eq i32 %20, %04332  br i1 %21, label %12, label %134333}4334 4335define arm_aapcs_vfpcc void @aese_constantisland(ptr %0) nounwind {4336; CHECK-FIX-NOSCHED-LABEL: aese_constantisland:4337; CHECK-FIX-NOSCHED:       @ %bb.0:4338; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d16, d17}, [r0]4339; CHECK-FIX-NOSCHED-NEXT:    adr r1, .LCPI92_04340; CHECK-FIX-NOSCHED-NEXT:    vld1.64 {d18, d19}, [r1:128]4341; CHECK-FIX-NOSCHED-NEXT:    aese.8 q9, q84342; CHECK-FIX-NOSCHED-NEXT:    aesmc.8 q8, q94343; CHECK-FIX-NOSCHED-NEXT:    vst1.64 {d16, d17}, [r0]4344; CHECK-FIX-NOSCHED-NEXT:    bx lr4345; CHECK-FIX-NOSCHED-NEXT:    .p2align 44346; CHECK-FIX-NOSCHED-NEXT:  @ %bb.1:4347; CHECK-FIX-NOSCHED-NEXT:  .LCPI92_0:4348; CHECK-FIX-NOSCHED-NEXT:    .byte 0 @ 0x04349; CHECK-FIX-NOSCHED-NEXT:    .byte 1 @ 0x14350; CHECK-FIX-NOSCHED-NEXT:    .byte 2 @ 0x24351; CHECK-FIX-NOSCHED-NEXT:    .byte 3 @ 0x34352; CHECK-FIX-NOSCHED-NEXT:    .byte 4 @ 0x44353; CHECK-FIX-NOSCHED-NEXT:    .byte 5 @ 0x54354; CHECK-FIX-NOSCHED-NEXT:    .byte 6 @ 0x64355; CHECK-FIX-NOSCHED-NEXT:    .byte 7 @ 0x74356; CHECK-FIX-NOSCHED-NEXT:    .byte 8 @ 0x84357; CHECK-FIX-NOSCHED-NEXT:    .byte 9 @ 0x94358; CHECK-FIX-NOSCHED-NEXT:    .byte 10 @ 0xa4359; CHECK-FIX-NOSCHED-NEXT:    .byte 11 @ 0xb4360; CHECK-FIX-NOSCHED-NEXT:    .byte 12 @ 0xc4361; CHECK-FIX-NOSCHED-NEXT:    .byte 13 @ 0xd4362; CHECK-FIX-NOSCHED-NEXT:    .byte 14 @ 0xe4363; CHECK-FIX-NOSCHED-NEXT:    .byte 15 @ 0xf4364;4365; CHECK-CORTEX-FIX-LABEL: aese_constantisland:4366; CHECK-CORTEX-FIX:       @ %bb.0:4367; CHECK-CORTEX-FIX-NEXT:    adr r1, .LCPI92_04368; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d16, d17}, [r0]4369; CHECK-CORTEX-FIX-NEXT:    vld1.64 {d18, d19}, [r1:128]4370; CHECK-CORTEX-FIX-NEXT:    aese.8 q9, q84371; CHECK-CORTEX-FIX-NEXT:    aesmc.8 q8, q94372; CHECK-CORTEX-FIX-NEXT:    vst1.64 {d16, d17}, [r0]4373; CHECK-CORTEX-FIX-NEXT:    bx lr4374; CHECK-CORTEX-FIX-NEXT:    .p2align 44375; CHECK-CORTEX-FIX-NEXT:  @ %bb.1:4376; CHECK-CORTEX-FIX-NEXT:  .LCPI92_0:4377; CHECK-CORTEX-FIX-NEXT:    .byte 0 @ 0x04378; CHECK-CORTEX-FIX-NEXT:    .byte 1 @ 0x14379; CHECK-CORTEX-FIX-NEXT:    .byte 2 @ 0x24380; CHECK-CORTEX-FIX-NEXT:    .byte 3 @ 0x34381; CHECK-CORTEX-FIX-NEXT:    .byte 4 @ 0x44382; CHECK-CORTEX-FIX-NEXT:    .byte 5 @ 0x54383; CHECK-CORTEX-FIX-NEXT:    .byte 6 @ 0x64384; CHECK-CORTEX-FIX-NEXT:    .byte 7 @ 0x74385; CHECK-CORTEX-FIX-NEXT:    .byte 8 @ 0x84386; CHECK-CORTEX-FIX-NEXT:    .byte 9 @ 0x94387; CHECK-CORTEX-FIX-NEXT:    .byte 10 @ 0xa4388; CHECK-CORTEX-FIX-NEXT:    .byte 11 @ 0xb4389; CHECK-CORTEX-FIX-NEXT:    .byte 12 @ 0xc4390; CHECK-CORTEX-FIX-NEXT:    .byte 13 @ 0xd4391; CHECK-CORTEX-FIX-NEXT:    .byte 14 @ 0xe4392; CHECK-CORTEX-FIX-NEXT:    .byte 15 @ 0xf4393  %2 = load <16 x i8>, ptr %0, align 84394  %3 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>, <16 x i8> %2)4395  %4 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %3)4396  store <16 x i8> %4, ptr %0, align 84397  ret void4398}4399