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1; RUN: llc < %s -mtriple=armv7-apple-ios -O0 | FileCheck %s2 3; rdar://127137654; When realign-stack is set to false, make sure we are not creating stack5; objects that are assumed to be 64-byte aligned.6 7define void @test1(ptr noalias sret(<16 x float>) %agg.result) nounwind ssp "no-realign-stack" {8; CHECK-LABEL: test1:9; CHECK: mov r[[PTR:[0-9]+]], r{{[0-9]+}}10; CHECK: mov r[[NOTALIGNED:[0-9]+]], sp11; CHECK: add r[[NOTALIGNED]], r[[NOTALIGNED]], #3212; CHECK: add r[[PTR]], r[[PTR]], #3213; CHECK: vld1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[NOTALIGNED]]:128]14; CHECK: vld1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[PTR]]:128]15; CHECK: vst1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[PTR]]:128]16; CHECK: vst1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[NOTALIGNED]]:128]17entry:18 %retval = alloca <16 x float>, align 6419 %a2 = getelementptr inbounds float, ptr %retval, i64 820 21 %b2 = getelementptr inbounds float, ptr %agg.result, i64 822 23 %0 = load <4 x float>, ptr %a2, align 1624 %1 = load <4 x float>, ptr %b2, align 1625 store <4 x float> %0, ptr %b2, align 1626 store <4 x float> %1, ptr %a2, align 1627 ret void28}29 30define void @test2(ptr noalias sret(<16 x float>) %agg.result) nounwind ssp {31; CHECK-LABEL: test2:32; CHECK: mov r[[PTR:[0-9]+]], r{{[0-9]+}}33; CHECK: mov r[[ALIGNED:[0-9]+]], sp34; CHECK: orr r[[ALIGNED]], r[[ALIGNED]], #3235; CHECK: add r[[PTR]], r[[PTR]], #3236; CHECK: vld1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[ALIGNED]]:128]37; CHECK: vld1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[PTR]]:128]38; CHECK: vst1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[PTR]]:128]39; CHECK: vst1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[ALIGNED]]:128]40entry:41 %retval = alloca <16 x float>, align 6442 %a2 = getelementptr inbounds float, ptr %retval, i64 843 44 %b2 = getelementptr inbounds float, ptr %agg.result, i64 845 46 %0 = load <4 x float>, ptr %a2, align 1647 %1 = load <4 x float>, ptr %b2, align 1648 store <4 x float> %0, ptr %b2, align 1649 store <4 x float> %1, ptr %a2, align 1650 ret void51}52