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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=armv7 %s -o - | FileCheck %s --check-prefix=ARM3; RUN: llc -mtriple=armv7eb %s -o - | FileCheck %s --check-prefix=ARMEB4; RUN: llc -mtriple=armv6m %s -o - | FileCheck %s --check-prefix=THUMB15; RUN: llc -mtriple=thumbv8m.main %s -o - | FileCheck %s --check-prefix=THUMB26 7define arm_aapcscc zeroext i1 @cmp_xor8_short_short(ptr nocapture readonly %a, ptr nocapture readonly %b) {8; ARM-LABEL: cmp_xor8_short_short:9; ARM: @ %bb.0: @ %entry10; ARM-NEXT: ldrb r0, [r0]11; ARM-NEXT: ldrb r1, [r1]12; ARM-NEXT: eor r0, r1, r013; ARM-NEXT: clz r0, r014; ARM-NEXT: lsr r0, r0, #515; ARM-NEXT: bx lr16;17; ARMEB-LABEL: cmp_xor8_short_short:18; ARMEB: @ %bb.0: @ %entry19; ARMEB-NEXT: ldrb r0, [r0, #1]20; ARMEB-NEXT: ldrb r1, [r1, #1]21; ARMEB-NEXT: eor r0, r1, r022; ARMEB-NEXT: clz r0, r023; ARMEB-NEXT: lsr r0, r0, #524; ARMEB-NEXT: bx lr25;26; THUMB1-LABEL: cmp_xor8_short_short:27; THUMB1: @ %bb.0: @ %entry28; THUMB1-NEXT: ldrb r0, [r0]29; THUMB1-NEXT: ldrb r1, [r1]30; THUMB1-NEXT: eors r1, r031; THUMB1-NEXT: rsbs r0, r1, #032; THUMB1-NEXT: adcs r0, r133; THUMB1-NEXT: bx lr34;35; THUMB2-LABEL: cmp_xor8_short_short:36; THUMB2: @ %bb.0: @ %entry37; THUMB2-NEXT: ldrb r0, [r0]38; THUMB2-NEXT: ldrb r1, [r1]39; THUMB2-NEXT: eors r0, r140; THUMB2-NEXT: clz r0, r041; THUMB2-NEXT: lsrs r0, r0, #542; THUMB2-NEXT: bx lr43entry:44 %0 = load i16, ptr %a, align 245 %1 = load i16, ptr %b, align 246 %xor2 = xor i16 %1, %047 %2 = and i16 %xor2, 25548 %cmp = icmp eq i16 %2, 049 ret i1 %cmp50}51 52define arm_aapcscc zeroext i1 @cmp_xor8_short_int(ptr nocapture readonly %a, ptr nocapture readonly %b) {53; ARM-LABEL: cmp_xor8_short_int:54; ARM: @ %bb.0: @ %entry55; ARM-NEXT: ldrb r0, [r0]56; ARM-NEXT: ldrb r1, [r1]57; ARM-NEXT: eor r0, r1, r058; ARM-NEXT: clz r0, r059; ARM-NEXT: lsr r0, r0, #560; ARM-NEXT: bx lr61;62; ARMEB-LABEL: cmp_xor8_short_int:63; ARMEB: @ %bb.0: @ %entry64; ARMEB-NEXT: ldrb r0, [r0, #1]65; ARMEB-NEXT: ldrb r1, [r1, #3]66; ARMEB-NEXT: eor r0, r1, r067; ARMEB-NEXT: clz r0, r068; ARMEB-NEXT: lsr r0, r0, #569; ARMEB-NEXT: bx lr70;71; THUMB1-LABEL: cmp_xor8_short_int:72; THUMB1: @ %bb.0: @ %entry73; THUMB1-NEXT: ldrb r0, [r0]74; THUMB1-NEXT: ldrb r1, [r1]75; THUMB1-NEXT: eors r1, r076; THUMB1-NEXT: rsbs r0, r1, #077; THUMB1-NEXT: adcs r0, r178; THUMB1-NEXT: bx lr79;80; THUMB2-LABEL: cmp_xor8_short_int:81; THUMB2: @ %bb.0: @ %entry82; THUMB2-NEXT: ldrb r0, [r0]83; THUMB2-NEXT: ldrb r1, [r1]84; THUMB2-NEXT: eors r0, r185; THUMB2-NEXT: clz r0, r086; THUMB2-NEXT: lsrs r0, r0, #587; THUMB2-NEXT: bx lr88entry:89 %0 = load i16, ptr %a, align 290 %conv = zext i16 %0 to i3291 %1 = load i32, ptr %b, align 492 %xor = xor i32 %1, %conv93 %and = and i32 %xor, 25594 %cmp = icmp eq i32 %and, 095 ret i1 %cmp96}97 98define arm_aapcscc zeroext i1 @cmp_xor8_int_int(ptr nocapture readonly %a, ptr nocapture readonly %b) {99; ARM-LABEL: cmp_xor8_int_int:100; ARM: @ %bb.0: @ %entry101; ARM-NEXT: ldrb r0, [r0]102; ARM-NEXT: ldrb r1, [r1]103; ARM-NEXT: eor r0, r1, r0104; ARM-NEXT: clz r0, r0105; ARM-NEXT: lsr r0, r0, #5106; ARM-NEXT: bx lr107;108; ARMEB-LABEL: cmp_xor8_int_int:109; ARMEB: @ %bb.0: @ %entry110; ARMEB-NEXT: ldrb r0, [r0, #3]111; ARMEB-NEXT: ldrb r1, [r1, #3]112; ARMEB-NEXT: eor r0, r1, r0113; ARMEB-NEXT: clz r0, r0114; ARMEB-NEXT: lsr r0, r0, #5115; ARMEB-NEXT: bx lr116;117; THUMB1-LABEL: cmp_xor8_int_int:118; THUMB1: @ %bb.0: @ %entry119; THUMB1-NEXT: ldrb r0, [r0]120; THUMB1-NEXT: ldrb r1, [r1]121; THUMB1-NEXT: eors r1, r0122; THUMB1-NEXT: rsbs r0, r1, #0123; THUMB1-NEXT: adcs r0, r1124; THUMB1-NEXT: bx lr125;126; THUMB2-LABEL: cmp_xor8_int_int:127; THUMB2: @ %bb.0: @ %entry128; THUMB2-NEXT: ldrb r0, [r0]129; THUMB2-NEXT: ldrb r1, [r1]130; THUMB2-NEXT: eors r0, r1131; THUMB2-NEXT: clz r0, r0132; THUMB2-NEXT: lsrs r0, r0, #5133; THUMB2-NEXT: bx lr134entry:135 %0 = load i32, ptr %a, align 4136 %1 = load i32, ptr %b, align 4137 %xor = xor i32 %1, %0138 %and = and i32 %xor, 255139 %cmp = icmp eq i32 %and, 0140 ret i1 %cmp141}142 143define arm_aapcscc zeroext i1 @cmp_xor16(ptr nocapture readonly %a, ptr nocapture readonly %b) {144; ARM-LABEL: cmp_xor16:145; ARM: @ %bb.0: @ %entry146; ARM-NEXT: ldrh r0, [r0]147; ARM-NEXT: ldrh r1, [r1]148; ARM-NEXT: eor r0, r1, r0149; ARM-NEXT: clz r0, r0150; ARM-NEXT: lsr r0, r0, #5151; ARM-NEXT: bx lr152;153; ARMEB-LABEL: cmp_xor16:154; ARMEB: @ %bb.0: @ %entry155; ARMEB-NEXT: ldrh r0, [r0, #2]156; ARMEB-NEXT: ldrh r1, [r1, #2]157; ARMEB-NEXT: eor r0, r1, r0158; ARMEB-NEXT: clz r0, r0159; ARMEB-NEXT: lsr r0, r0, #5160; ARMEB-NEXT: bx lr161;162; THUMB1-LABEL: cmp_xor16:163; THUMB1: @ %bb.0: @ %entry164; THUMB1-NEXT: ldrh r0, [r0]165; THUMB1-NEXT: ldrh r1, [r1]166; THUMB1-NEXT: eors r1, r0167; THUMB1-NEXT: rsbs r0, r1, #0168; THUMB1-NEXT: adcs r0, r1169; THUMB1-NEXT: bx lr170;171; THUMB2-LABEL: cmp_xor16:172; THUMB2: @ %bb.0: @ %entry173; THUMB2-NEXT: ldrh r0, [r0]174; THUMB2-NEXT: ldrh r1, [r1]175; THUMB2-NEXT: eors r0, r1176; THUMB2-NEXT: clz r0, r0177; THUMB2-NEXT: lsrs r0, r0, #5178; THUMB2-NEXT: bx lr179entry:180 %0 = load i32, ptr %a, align 4181 %1 = load i32, ptr %b, align 4182 %xor = xor i32 %1, %0183 %and = and i32 %xor, 65535184 %cmp = icmp eq i32 %and, 0185 ret i1 %cmp186}187 188define arm_aapcscc zeroext i1 @cmp_or8_short_short(ptr nocapture readonly %a, ptr nocapture readonly %b) {189; ARM-LABEL: cmp_or8_short_short:190; ARM: @ %bb.0: @ %entry191; ARM-NEXT: ldrb r0, [r0]192; ARM-NEXT: ldrb r1, [r1]193; ARM-NEXT: orr r0, r1, r0194; ARM-NEXT: clz r0, r0195; ARM-NEXT: lsr r0, r0, #5196; ARM-NEXT: bx lr197;198; ARMEB-LABEL: cmp_or8_short_short:199; ARMEB: @ %bb.0: @ %entry200; ARMEB-NEXT: ldrb r0, [r0, #1]201; ARMEB-NEXT: ldrb r1, [r1, #1]202; ARMEB-NEXT: orr r0, r1, r0203; ARMEB-NEXT: clz r0, r0204; ARMEB-NEXT: lsr r0, r0, #5205; ARMEB-NEXT: bx lr206;207; THUMB1-LABEL: cmp_or8_short_short:208; THUMB1: @ %bb.0: @ %entry209; THUMB1-NEXT: ldrb r0, [r0]210; THUMB1-NEXT: ldrb r1, [r1]211; THUMB1-NEXT: orrs r1, r0212; THUMB1-NEXT: rsbs r0, r1, #0213; THUMB1-NEXT: adcs r0, r1214; THUMB1-NEXT: bx lr215;216; THUMB2-LABEL: cmp_or8_short_short:217; THUMB2: @ %bb.0: @ %entry218; THUMB2-NEXT: ldrb r0, [r0]219; THUMB2-NEXT: ldrb r1, [r1]220; THUMB2-NEXT: orrs r0, r1221; THUMB2-NEXT: clz r0, r0222; THUMB2-NEXT: lsrs r0, r0, #5223; THUMB2-NEXT: bx lr224entry:225 %0 = load i16, ptr %a, align 2226 %1 = load i16, ptr %b, align 2227 %or2 = or i16 %1, %0228 %2 = and i16 %or2, 255229 %cmp = icmp eq i16 %2, 0230 ret i1 %cmp231}232 233define arm_aapcscc zeroext i1 @cmp_or8_short_int(ptr nocapture readonly %a, ptr nocapture readonly %b) {234; ARM-LABEL: cmp_or8_short_int:235; ARM: @ %bb.0: @ %entry236; ARM-NEXT: ldrb r0, [r0]237; ARM-NEXT: ldrb r1, [r1]238; ARM-NEXT: orr r0, r1, r0239; ARM-NEXT: clz r0, r0240; ARM-NEXT: lsr r0, r0, #5241; ARM-NEXT: bx lr242;243; ARMEB-LABEL: cmp_or8_short_int:244; ARMEB: @ %bb.0: @ %entry245; ARMEB-NEXT: ldrb r0, [r0, #1]246; ARMEB-NEXT: ldrb r1, [r1, #3]247; ARMEB-NEXT: orr r0, r1, r0248; ARMEB-NEXT: clz r0, r0249; ARMEB-NEXT: lsr r0, r0, #5250; ARMEB-NEXT: bx lr251;252; THUMB1-LABEL: cmp_or8_short_int:253; THUMB1: @ %bb.0: @ %entry254; THUMB1-NEXT: ldrb r0, [r0]255; THUMB1-NEXT: ldrb r1, [r1]256; THUMB1-NEXT: orrs r1, r0257; THUMB1-NEXT: rsbs r0, r1, #0258; THUMB1-NEXT: adcs r0, r1259; THUMB1-NEXT: bx lr260;261; THUMB2-LABEL: cmp_or8_short_int:262; THUMB2: @ %bb.0: @ %entry263; THUMB2-NEXT: ldrb r0, [r0]264; THUMB2-NEXT: ldrb r1, [r1]265; THUMB2-NEXT: orrs r0, r1266; THUMB2-NEXT: clz r0, r0267; THUMB2-NEXT: lsrs r0, r0, #5268; THUMB2-NEXT: bx lr269entry:270 %0 = load i16, ptr %a, align 2271 %conv = zext i16 %0 to i32272 %1 = load i32, ptr %b, align 4273 %or = or i32 %1, %conv274 %and = and i32 %or, 255275 %cmp = icmp eq i32 %and, 0276 ret i1 %cmp277}278 279define arm_aapcscc zeroext i1 @cmp_or8_int_int(ptr nocapture readonly %a, ptr nocapture readonly %b) {280; ARM-LABEL: cmp_or8_int_int:281; ARM: @ %bb.0: @ %entry282; ARM-NEXT: ldrb r0, [r0]283; ARM-NEXT: ldrb r1, [r1]284; ARM-NEXT: orr r0, r1, r0285; ARM-NEXT: clz r0, r0286; ARM-NEXT: lsr r0, r0, #5287; ARM-NEXT: bx lr288;289; ARMEB-LABEL: cmp_or8_int_int:290; ARMEB: @ %bb.0: @ %entry291; ARMEB-NEXT: ldrb r0, [r0, #3]292; ARMEB-NEXT: ldrb r1, [r1, #3]293; ARMEB-NEXT: orr r0, r1, r0294; ARMEB-NEXT: clz r0, r0295; ARMEB-NEXT: lsr r0, r0, #5296; ARMEB-NEXT: bx lr297;298; THUMB1-LABEL: cmp_or8_int_int:299; THUMB1: @ %bb.0: @ %entry300; THUMB1-NEXT: ldrb r0, [r0]301; THUMB1-NEXT: ldrb r1, [r1]302; THUMB1-NEXT: orrs r1, r0303; THUMB1-NEXT: rsbs r0, r1, #0304; THUMB1-NEXT: adcs r0, r1305; THUMB1-NEXT: bx lr306;307; THUMB2-LABEL: cmp_or8_int_int:308; THUMB2: @ %bb.0: @ %entry309; THUMB2-NEXT: ldrb r0, [r0]310; THUMB2-NEXT: ldrb r1, [r1]311; THUMB2-NEXT: orrs r0, r1312; THUMB2-NEXT: clz r0, r0313; THUMB2-NEXT: lsrs r0, r0, #5314; THUMB2-NEXT: bx lr315entry:316 %0 = load i32, ptr %a, align 4317 %1 = load i32, ptr %b, align 4318 %or = or i32 %1, %0319 %and = and i32 %or, 255320 %cmp = icmp eq i32 %and, 0321 ret i1 %cmp322}323 324define arm_aapcscc zeroext i1 @cmp_or16(ptr nocapture readonly %a, ptr nocapture readonly %b) {325; ARM-LABEL: cmp_or16:326; ARM: @ %bb.0: @ %entry327; ARM-NEXT: ldrh r0, [r0]328; ARM-NEXT: ldrh r1, [r1]329; ARM-NEXT: orr r0, r1, r0330; ARM-NEXT: clz r0, r0331; ARM-NEXT: lsr r0, r0, #5332; ARM-NEXT: bx lr333;334; ARMEB-LABEL: cmp_or16:335; ARMEB: @ %bb.0: @ %entry336; ARMEB-NEXT: ldrh r0, [r0, #2]337; ARMEB-NEXT: ldrh r1, [r1, #2]338; ARMEB-NEXT: orr r0, r1, r0339; ARMEB-NEXT: clz r0, r0340; ARMEB-NEXT: lsr r0, r0, #5341; ARMEB-NEXT: bx lr342;343; THUMB1-LABEL: cmp_or16:344; THUMB1: @ %bb.0: @ %entry345; THUMB1-NEXT: ldrh r0, [r0]346; THUMB1-NEXT: ldrh r1, [r1]347; THUMB1-NEXT: orrs r1, r0348; THUMB1-NEXT: rsbs r0, r1, #0349; THUMB1-NEXT: adcs r0, r1350; THUMB1-NEXT: bx lr351;352; THUMB2-LABEL: cmp_or16:353; THUMB2: @ %bb.0: @ %entry354; THUMB2-NEXT: ldrh r0, [r0]355; THUMB2-NEXT: ldrh r1, [r1]356; THUMB2-NEXT: orrs r0, r1357; THUMB2-NEXT: clz r0, r0358; THUMB2-NEXT: lsrs r0, r0, #5359; THUMB2-NEXT: bx lr360entry:361 %0 = load i32, ptr %a, align 4362 %1 = load i32, ptr %b, align 4363 %or = or i32 %1, %0364 %and = and i32 %or, 65535365 %cmp = icmp eq i32 %and, 0366 ret i1 %cmp367}368 369define arm_aapcscc zeroext i1 @cmp_and8_short_short(ptr nocapture readonly %a, ptr nocapture readonly %b) {370; ARM-LABEL: cmp_and8_short_short:371; ARM: @ %bb.0: @ %entry372; ARM-NEXT: ldrb r1, [r1]373; ARM-NEXT: ldrb r0, [r0]374; ARM-NEXT: and r0, r0, r1375; ARM-NEXT: clz r0, r0376; ARM-NEXT: lsr r0, r0, #5377; ARM-NEXT: bx lr378;379; ARMEB-LABEL: cmp_and8_short_short:380; ARMEB: @ %bb.0: @ %entry381; ARMEB-NEXT: ldrb r1, [r1, #1]382; ARMEB-NEXT: ldrb r0, [r0, #1]383; ARMEB-NEXT: and r0, r0, r1384; ARMEB-NEXT: clz r0, r0385; ARMEB-NEXT: lsr r0, r0, #5386; ARMEB-NEXT: bx lr387;388; THUMB1-LABEL: cmp_and8_short_short:389; THUMB1: @ %bb.0: @ %entry390; THUMB1-NEXT: ldrb r1, [r1]391; THUMB1-NEXT: ldrb r2, [r0]392; THUMB1-NEXT: ands r2, r1393; THUMB1-NEXT: rsbs r0, r2, #0394; THUMB1-NEXT: adcs r0, r2395; THUMB1-NEXT: bx lr396;397; THUMB2-LABEL: cmp_and8_short_short:398; THUMB2: @ %bb.0: @ %entry399; THUMB2-NEXT: ldrb r1, [r1]400; THUMB2-NEXT: ldrb r0, [r0]401; THUMB2-NEXT: ands r0, r1402; THUMB2-NEXT: clz r0, r0403; THUMB2-NEXT: lsrs r0, r0, #5404; THUMB2-NEXT: bx lr405entry:406 %0 = load i16, ptr %a, align 2407 %1 = load i16, ptr %b, align 2408 %and3 = and i16 %0, 255409 %2 = and i16 %and3, %1410 %cmp = icmp eq i16 %2, 0411 ret i1 %cmp412}413 414define arm_aapcscc zeroext i1 @cmp_and8_short_int(ptr nocapture readonly %a, ptr nocapture readonly %b) {415; ARM-LABEL: cmp_and8_short_int:416; ARM: @ %bb.0: @ %entry417; ARM-NEXT: ldrb r0, [r0]418; ARM-NEXT: ldr r1, [r1]419; ARM-NEXT: and r0, r1, r0420; ARM-NEXT: clz r0, r0421; ARM-NEXT: lsr r0, r0, #5422; ARM-NEXT: bx lr423;424; ARMEB-LABEL: cmp_and8_short_int:425; ARMEB: @ %bb.0: @ %entry426; ARMEB-NEXT: ldrb r0, [r0, #1]427; ARMEB-NEXT: ldr r1, [r1]428; ARMEB-NEXT: and r0, r1, r0429; ARMEB-NEXT: clz r0, r0430; ARMEB-NEXT: lsr r0, r0, #5431; ARMEB-NEXT: bx lr432;433; THUMB1-LABEL: cmp_and8_short_int:434; THUMB1: @ %bb.0: @ %entry435; THUMB1-NEXT: ldrb r0, [r0]436; THUMB1-NEXT: ldr r1, [r1]437; THUMB1-NEXT: ands r1, r0438; THUMB1-NEXT: rsbs r0, r1, #0439; THUMB1-NEXT: adcs r0, r1440; THUMB1-NEXT: bx lr441;442; THUMB2-LABEL: cmp_and8_short_int:443; THUMB2: @ %bb.0: @ %entry444; THUMB2-NEXT: ldrb r0, [r0]445; THUMB2-NEXT: ldr r1, [r1]446; THUMB2-NEXT: ands r0, r1447; THUMB2-NEXT: clz r0, r0448; THUMB2-NEXT: lsrs r0, r0, #5449; THUMB2-NEXT: bx lr450entry:451 %0 = load i16, ptr %a, align 2452 %1 = load i32, ptr %b, align 4453 %2 = and i16 %0, 255454 %and = zext i16 %2 to i32455 %and1 = and i32 %1, %and456 %cmp = icmp eq i32 %and1, 0457 ret i1 %cmp458}459 460define arm_aapcscc zeroext i1 @cmp_and8_int_int(ptr nocapture readonly %a, ptr nocapture readonly %b) {461; ARM-LABEL: cmp_and8_int_int:462; ARM: @ %bb.0: @ %entry463; ARM-NEXT: ldrb r1, [r1]464; ARM-NEXT: ldrb r0, [r0]465; ARM-NEXT: and r0, r0, r1466; ARM-NEXT: clz r0, r0467; ARM-NEXT: lsr r0, r0, #5468; ARM-NEXT: bx lr469;470; ARMEB-LABEL: cmp_and8_int_int:471; ARMEB: @ %bb.0: @ %entry472; ARMEB-NEXT: ldrb r1, [r1, #3]473; ARMEB-NEXT: ldrb r0, [r0, #3]474; ARMEB-NEXT: and r0, r0, r1475; ARMEB-NEXT: clz r0, r0476; ARMEB-NEXT: lsr r0, r0, #5477; ARMEB-NEXT: bx lr478;479; THUMB1-LABEL: cmp_and8_int_int:480; THUMB1: @ %bb.0: @ %entry481; THUMB1-NEXT: ldrb r1, [r1]482; THUMB1-NEXT: ldrb r2, [r0]483; THUMB1-NEXT: ands r2, r1484; THUMB1-NEXT: rsbs r0, r2, #0485; THUMB1-NEXT: adcs r0, r2486; THUMB1-NEXT: bx lr487;488; THUMB2-LABEL: cmp_and8_int_int:489; THUMB2: @ %bb.0: @ %entry490; THUMB2-NEXT: ldrb r1, [r1]491; THUMB2-NEXT: ldrb r0, [r0]492; THUMB2-NEXT: ands r0, r1493; THUMB2-NEXT: clz r0, r0494; THUMB2-NEXT: lsrs r0, r0, #5495; THUMB2-NEXT: bx lr496entry:497 %0 = load i32, ptr %a, align 4498 %1 = load i32, ptr %b, align 4499 %and = and i32 %0, 255500 %and1 = and i32 %and, %1501 %cmp = icmp eq i32 %and1, 0502 ret i1 %cmp503}504 505define arm_aapcscc zeroext i1 @cmp_and16(ptr nocapture readonly %a, ptr nocapture readonly %b) {506; ARM-LABEL: cmp_and16:507; ARM: @ %bb.0: @ %entry508; ARM-NEXT: ldrh r1, [r1]509; ARM-NEXT: ldrh r0, [r0]510; ARM-NEXT: and r0, r0, r1511; ARM-NEXT: clz r0, r0512; ARM-NEXT: lsr r0, r0, #5513; ARM-NEXT: bx lr514;515; ARMEB-LABEL: cmp_and16:516; ARMEB: @ %bb.0: @ %entry517; ARMEB-NEXT: ldrh r1, [r1, #2]518; ARMEB-NEXT: ldrh r0, [r0, #2]519; ARMEB-NEXT: and r0, r0, r1520; ARMEB-NEXT: clz r0, r0521; ARMEB-NEXT: lsr r0, r0, #5522; ARMEB-NEXT: bx lr523;524; THUMB1-LABEL: cmp_and16:525; THUMB1: @ %bb.0: @ %entry526; THUMB1-NEXT: ldrh r1, [r1]527; THUMB1-NEXT: ldrh r2, [r0]528; THUMB1-NEXT: ands r2, r1529; THUMB1-NEXT: rsbs r0, r2, #0530; THUMB1-NEXT: adcs r0, r2531; THUMB1-NEXT: bx lr532;533; THUMB2-LABEL: cmp_and16:534; THUMB2: @ %bb.0: @ %entry535; THUMB2-NEXT: ldrh r1, [r1]536; THUMB2-NEXT: ldrh r0, [r0]537; THUMB2-NEXT: ands r0, r1538; THUMB2-NEXT: clz r0, r0539; THUMB2-NEXT: lsrs r0, r0, #5540; THUMB2-NEXT: bx lr541entry:542 %0 = load i32, ptr %a, align 4543 %1 = load i32, ptr %b, align 4544 %and = and i32 %0, 65535545 %and1 = and i32 %and, %1546 %cmp = icmp eq i32 %and1, 0547 ret i1 %cmp548}549 550define arm_aapcscc i32 @add_and16(ptr nocapture readonly %a, i32 %y, i32 %z) {551; ARM-LABEL: add_and16:552; ARM: @ %bb.0: @ %entry553; ARM-NEXT: add r1, r1, r2554; ARM-NEXT: ldrh r0, [r0]555; ARM-NEXT: uxth r1, r1556; ARM-NEXT: orr r0, r0, r1557; ARM-NEXT: bx lr558;559; ARMEB-LABEL: add_and16:560; ARMEB: @ %bb.0: @ %entry561; ARMEB-NEXT: add r1, r1, r2562; ARMEB-NEXT: ldrh r0, [r0, #2]563; ARMEB-NEXT: uxth r1, r1564; ARMEB-NEXT: orr r0, r0, r1565; ARMEB-NEXT: bx lr566;567; THUMB1-LABEL: add_and16:568; THUMB1: @ %bb.0: @ %entry569; THUMB1-NEXT: adds r1, r1, r2570; THUMB1-NEXT: uxth r1, r1571; THUMB1-NEXT: ldrh r0, [r0]572; THUMB1-NEXT: orrs r0, r1573; THUMB1-NEXT: bx lr574;575; THUMB2-LABEL: add_and16:576; THUMB2: @ %bb.0: @ %entry577; THUMB2-NEXT: add r1, r2578; THUMB2-NEXT: ldrh r0, [r0]579; THUMB2-NEXT: uxth r1, r1580; THUMB2-NEXT: orrs r0, r1581; THUMB2-NEXT: bx lr582entry:583 %x = load i32, ptr %a, align 4584 %add = add i32 %y, %z585 %or = or i32 %x, %add586 %and = and i32 %or, 65535587 ret i32 %and588}589 590define arm_aapcscc i32 @test1(ptr %a, ptr %b, i32 %x, i32 %y) {591; ARM-LABEL: test1:592; ARM: @ %bb.0: @ %entry593; ARM-NEXT: mul r2, r2, r3594; ARM-NEXT: ldrh r1, [r1]595; ARM-NEXT: ldrh r0, [r0]596; ARM-NEXT: eor r0, r0, r1597; ARM-NEXT: uxth r1, r2598; ARM-NEXT: orr r0, r0, r1599; ARM-NEXT: bx lr600;601; ARMEB-LABEL: test1:602; ARMEB: @ %bb.0: @ %entry603; ARMEB-NEXT: mul r2, r2, r3604; ARMEB-NEXT: ldrh r1, [r1, #2]605; ARMEB-NEXT: ldrh r0, [r0, #2]606; ARMEB-NEXT: eor r0, r0, r1607; ARMEB-NEXT: uxth r1, r2608; ARMEB-NEXT: orr r0, r0, r1609; ARMEB-NEXT: bx lr610;611; THUMB1-LABEL: test1:612; THUMB1: @ %bb.0: @ %entry613; THUMB1-NEXT: push {r4, lr}614; THUMB1-NEXT: ldrh r1, [r1]615; THUMB1-NEXT: ldrh r4, [r0]616; THUMB1-NEXT: eors r4, r1617; THUMB1-NEXT: muls r2, r3, r2618; THUMB1-NEXT: uxth r0, r2619; THUMB1-NEXT: orrs r0, r4620; THUMB1-NEXT: pop {r4, pc}621;622; THUMB2-LABEL: test1:623; THUMB2: @ %bb.0: @ %entry624; THUMB2-NEXT: ldrh r1, [r1]625; THUMB2-NEXT: ldrh r0, [r0]626; THUMB2-NEXT: eors r0, r1627; THUMB2-NEXT: mul r1, r2, r3628; THUMB2-NEXT: uxth r1, r1629; THUMB2-NEXT: orrs r0, r1630; THUMB2-NEXT: bx lr631entry:632 %0 = load i32, ptr %a, align 4633 %1 = load i32, ptr %b, align 4634 %mul = mul i32 %x, %y635 %xor = xor i32 %0, %1636 %or = or i32 %xor, %mul637 %and = and i32 %or, 65535638 ret i32 %and639}640 641define arm_aapcscc i32 @test2(ptr %a, ptr %b, i32 %x, i32 %y) {642; ARM-LABEL: test2:643; ARM: @ %bb.0: @ %entry644; ARM-NEXT: ldr r1, [r1]645; ARM-NEXT: ldr r0, [r0]646; ARM-NEXT: mul r1, r2, r1647; ARM-NEXT: eor r0, r0, r3648; ARM-NEXT: orr r0, r0, r1649; ARM-NEXT: uxth r0, r0650; ARM-NEXT: bx lr651;652; ARMEB-LABEL: test2:653; ARMEB: @ %bb.0: @ %entry654; ARMEB-NEXT: ldr r1, [r1]655; ARMEB-NEXT: ldr r0, [r0]656; ARMEB-NEXT: mul r1, r2, r1657; ARMEB-NEXT: eor r0, r0, r3658; ARMEB-NEXT: orr r0, r0, r1659; ARMEB-NEXT: uxth r0, r0660; ARMEB-NEXT: bx lr661;662; THUMB1-LABEL: test2:663; THUMB1: @ %bb.0: @ %entry664; THUMB1-NEXT: ldr r1, [r1]665; THUMB1-NEXT: muls r1, r2, r1666; THUMB1-NEXT: ldr r0, [r0]667; THUMB1-NEXT: eors r0, r3668; THUMB1-NEXT: orrs r0, r1669; THUMB1-NEXT: uxth r0, r0670; THUMB1-NEXT: bx lr671;672; THUMB2-LABEL: test2:673; THUMB2: @ %bb.0: @ %entry674; THUMB2-NEXT: ldr r1, [r1]675; THUMB2-NEXT: ldr r0, [r0]676; THUMB2-NEXT: muls r1, r2, r1677; THUMB2-NEXT: eors r0, r3678; THUMB2-NEXT: orrs r0, r1679; THUMB2-NEXT: uxth r0, r0680; THUMB2-NEXT: bx lr681entry:682 %0 = load i32, ptr %a, align 4683 %1 = load i32, ptr %b, align 4684 %mul = mul i32 %x, %1685 %xor = xor i32 %0, %y686 %or = or i32 %xor, %mul687 %and = and i32 %or, 65535688 ret i32 %and689}690 691define arm_aapcscc i32 @test3(ptr %a, ptr %b, i32 %x, ptr %y) {692; ARM-LABEL: test3:693; ARM: @ %bb.0: @ %entry694; ARM-NEXT: ldr r0, [r0]695; ARM-NEXT: mul r1, r2, r0696; ARM-NEXT: ldrh r2, [r3]697; ARM-NEXT: eor r0, r0, r2698; ARM-NEXT: orr r0, r0, r1699; ARM-NEXT: uxth r0, r0700; ARM-NEXT: bx lr701;702; ARMEB-LABEL: test3:703; ARMEB: @ %bb.0: @ %entry704; ARMEB-NEXT: ldr r0, [r0]705; ARMEB-NEXT: mul r1, r2, r0706; ARMEB-NEXT: ldrh r2, [r3]707; ARMEB-NEXT: eor r0, r0, r2708; ARMEB-NEXT: orr r0, r0, r1709; ARMEB-NEXT: uxth r0, r0710; ARMEB-NEXT: bx lr711;712; THUMB1-LABEL: test3:713; THUMB1: @ %bb.0: @ %entry714; THUMB1-NEXT: ldr r0, [r0]715; THUMB1-NEXT: muls r2, r0, r2716; THUMB1-NEXT: ldrh r1, [r3]717; THUMB1-NEXT: eors r1, r0718; THUMB1-NEXT: orrs r1, r2719; THUMB1-NEXT: uxth r0, r1720; THUMB1-NEXT: bx lr721;722; THUMB2-LABEL: test3:723; THUMB2: @ %bb.0: @ %entry724; THUMB2-NEXT: ldr r0, [r0]725; THUMB2-NEXT: mul r1, r2, r0726; THUMB2-NEXT: ldrh r2, [r3]727; THUMB2-NEXT: eors r0, r2728; THUMB2-NEXT: orrs r0, r1729; THUMB2-NEXT: uxth r0, r0730; THUMB2-NEXT: bx lr731entry:732 %0 = load i32, ptr %a, align 4733 %1 = load i16, ptr %y, align 4734 %2 = zext i16 %1 to i32735 %mul = mul i32 %x, %0736 %xor = xor i32 %0, %2737 %or = or i32 %xor, %mul738 %and = and i32 %or, 65535739 ret i32 %and740}741 742define arm_aapcscc i32 @test4(ptr %a, ptr %b, i32 %x, i32 %y) {743; ARM-LABEL: test4:744; ARM: @ %bb.0: @ %entry745; ARM-NEXT: mul r2, r2, r3746; ARM-NEXT: ldrh r1, [r1]747; ARM-NEXT: ldrh r0, [r0]748; ARM-NEXT: eor r0, r0, r1749; ARM-NEXT: uxth r1, r2750; ARM-NEXT: orr r0, r0, r1751; ARM-NEXT: bx lr752;753; ARMEB-LABEL: test4:754; ARMEB: @ %bb.0: @ %entry755; ARMEB-NEXT: mul r2, r2, r3756; ARMEB-NEXT: ldrh r1, [r1, #2]757; ARMEB-NEXT: ldrh r0, [r0, #2]758; ARMEB-NEXT: eor r0, r0, r1759; ARMEB-NEXT: uxth r1, r2760; ARMEB-NEXT: orr r0, r0, r1761; ARMEB-NEXT: bx lr762;763; THUMB1-LABEL: test4:764; THUMB1: @ %bb.0: @ %entry765; THUMB1-NEXT: push {r4, lr}766; THUMB1-NEXT: ldrh r1, [r1]767; THUMB1-NEXT: ldrh r4, [r0]768; THUMB1-NEXT: eors r4, r1769; THUMB1-NEXT: muls r2, r3, r2770; THUMB1-NEXT: uxth r0, r2771; THUMB1-NEXT: orrs r0, r4772; THUMB1-NEXT: pop {r4, pc}773;774; THUMB2-LABEL: test4:775; THUMB2: @ %bb.0: @ %entry776; THUMB2-NEXT: ldrh r1, [r1]777; THUMB2-NEXT: ldrh r0, [r0]778; THUMB2-NEXT: eors r0, r1779; THUMB2-NEXT: mul r1, r2, r3780; THUMB2-NEXT: uxth r1, r1781; THUMB2-NEXT: orrs r0, r1782; THUMB2-NEXT: bx lr783entry:784 %0 = load i32, ptr %a, align 4785 %1 = load i32, ptr %b, align 4786 %mul = mul i32 %x, %y787 %xor = xor i32 %0, %1788 %or = or i32 %xor, %mul789 %and = and i32 %or, 65535790 ret i32 %and791}792 793define arm_aapcscc i32 @test5(ptr %a, ptr %b, i32 %x, i16 zeroext %y) {794; ARM-LABEL: test5:795; ARM: @ %bb.0: @ %entry796; ARM-NEXT: ldr r1, [r1]797; ARM-NEXT: ldrh r0, [r0]798; ARM-NEXT: mul r1, r2, r1799; ARM-NEXT: eor r0, r0, r3800; ARM-NEXT: uxth r1, r1801; ARM-NEXT: orr r0, r0, r1802; ARM-NEXT: bx lr803;804; ARMEB-LABEL: test5:805; ARMEB: @ %bb.0: @ %entry806; ARMEB-NEXT: ldr r1, [r1]807; ARMEB-NEXT: ldrh r0, [r0, #2]808; ARMEB-NEXT: mul r1, r2, r1809; ARMEB-NEXT: eor r0, r0, r3810; ARMEB-NEXT: uxth r1, r1811; ARMEB-NEXT: orr r0, r0, r1812; ARMEB-NEXT: bx lr813;814; THUMB1-LABEL: test5:815; THUMB1: @ %bb.0: @ %entry816; THUMB1-NEXT: push {r4, lr}817; THUMB1-NEXT: ldrh r4, [r0]818; THUMB1-NEXT: eors r4, r3819; THUMB1-NEXT: ldr r0, [r1]820; THUMB1-NEXT: muls r0, r2, r0821; THUMB1-NEXT: uxth r0, r0822; THUMB1-NEXT: orrs r0, r4823; THUMB1-NEXT: pop {r4, pc}824;825; THUMB2-LABEL: test5:826; THUMB2: @ %bb.0: @ %entry827; THUMB2-NEXT: ldr r1, [r1]828; THUMB2-NEXT: ldrh r0, [r0]829; THUMB2-NEXT: muls r1, r2, r1830; THUMB2-NEXT: eors r0, r3831; THUMB2-NEXT: uxth r1, r1832; THUMB2-NEXT: orrs r0, r1833; THUMB2-NEXT: bx lr834entry:835 %0 = load i32, ptr %a, align 4836 %1 = load i32, ptr %b, align 4837 %mul = mul i32 %x, %1838 %ext = zext i16 %y to i32839 %xor = xor i32 %0, %ext840 %or = or i32 %xor, %mul841 %and = and i32 %or, 65535842 ret i32 %and843}844 845define arm_aapcscc i1 @test6(ptr %x, i8 %y, i8 %z) {846; ARM-LABEL: test6:847; ARM: @ %bb.0: @ %entry848; ARM-NEXT: ldrb r0, [r0]849; ARM-NEXT: and r0, r1, r0850; ARM-NEXT: uxtb r1, r2851; ARM-NEXT: sub r0, r0, r1852; ARM-NEXT: clz r0, r0853; ARM-NEXT: lsr r0, r0, #5854; ARM-NEXT: bx lr855;856; ARMEB-LABEL: test6:857; ARMEB: @ %bb.0: @ %entry858; ARMEB-NEXT: ldrb r0, [r0]859; ARMEB-NEXT: and r0, r1, r0860; ARMEB-NEXT: uxtb r1, r2861; ARMEB-NEXT: sub r0, r0, r1862; ARMEB-NEXT: clz r0, r0863; ARMEB-NEXT: lsr r0, r0, #5864; ARMEB-NEXT: bx lr865;866; THUMB1-LABEL: test6:867; THUMB1: @ %bb.0: @ %entry868; THUMB1-NEXT: ldrb r0, [r0]869; THUMB1-NEXT: ands r0, r1870; THUMB1-NEXT: uxtb r1, r2871; THUMB1-NEXT: subs r1, r0, r1872; THUMB1-NEXT: rsbs r0, r1, #0873; THUMB1-NEXT: adcs r0, r1874; THUMB1-NEXT: bx lr875;876; THUMB2-LABEL: test6:877; THUMB2: @ %bb.0: @ %entry878; THUMB2-NEXT: ldrb r0, [r0]879; THUMB2-NEXT: ands r0, r1880; THUMB2-NEXT: uxtb r1, r2881; THUMB2-NEXT: subs r0, r0, r1882; THUMB2-NEXT: clz r0, r0883; THUMB2-NEXT: lsrs r0, r0, #5884; THUMB2-NEXT: bx lr885entry:886 %0 = load i8, ptr %x, align 4887 %1 = and i8 %0, %y888 %2 = icmp eq i8 %1, %z889 ret i1 %2890}891 892define arm_aapcscc i1 @test7(ptr %x, i16 %y, i8 %z) {893; ARM-LABEL: test7:894; ARM: @ %bb.0: @ %entry895; ARM-NEXT: ldrb r0, [r0]896; ARM-NEXT: and r0, r1, r0897; ARM-NEXT: uxtb r1, r2898; ARM-NEXT: sub r0, r0, r1899; ARM-NEXT: clz r0, r0900; ARM-NEXT: lsr r0, r0, #5901; ARM-NEXT: bx lr902;903; ARMEB-LABEL: test7:904; ARMEB: @ %bb.0: @ %entry905; ARMEB-NEXT: ldrb r0, [r0, #1]906; ARMEB-NEXT: and r0, r1, r0907; ARMEB-NEXT: uxtb r1, r2908; ARMEB-NEXT: sub r0, r0, r1909; ARMEB-NEXT: clz r0, r0910; ARMEB-NEXT: lsr r0, r0, #5911; ARMEB-NEXT: bx lr912;913; THUMB1-LABEL: test7:914; THUMB1: @ %bb.0: @ %entry915; THUMB1-NEXT: ldrb r0, [r0]916; THUMB1-NEXT: ands r0, r1917; THUMB1-NEXT: uxtb r1, r2918; THUMB1-NEXT: subs r1, r0, r1919; THUMB1-NEXT: rsbs r0, r1, #0920; THUMB1-NEXT: adcs r0, r1921; THUMB1-NEXT: bx lr922;923; THUMB2-LABEL: test7:924; THUMB2: @ %bb.0: @ %entry925; THUMB2-NEXT: ldrb r0, [r0]926; THUMB2-NEXT: ands r0, r1927; THUMB2-NEXT: uxtb r1, r2928; THUMB2-NEXT: subs r0, r0, r1929; THUMB2-NEXT: clz r0, r0930; THUMB2-NEXT: lsrs r0, r0, #5931; THUMB2-NEXT: bx lr932entry:933 %0 = load i16, ptr %x, align 4934 %1 = and i16 %0, %y935 %2 = trunc i16 %1 to i8936 %3 = icmp eq i8 %2, %z937 ret i1 %3938}939 940define arm_aapcscc void @test8(ptr nocapture %p) {941; ARM-LABEL: test8:942; ARM: @ %bb.0: @ %entry943; ARM-NEXT: ldrb r1, [r0]944; ARM-NEXT: eor r1, r1, #255945; ARM-NEXT: str r1, [r0]946; ARM-NEXT: bx lr947;948; ARMEB-LABEL: test8:949; ARMEB: @ %bb.0: @ %entry950; ARMEB-NEXT: ldrb r1, [r0, #3]951; ARMEB-NEXT: eor r1, r1, #255952; ARMEB-NEXT: str r1, [r0]953; ARMEB-NEXT: bx lr954;955; THUMB1-LABEL: test8:956; THUMB1: @ %bb.0: @ %entry957; THUMB1-NEXT: ldrb r1, [r0]958; THUMB1-NEXT: movs r2, #255959; THUMB1-NEXT: eors r2, r1960; THUMB1-NEXT: str r2, [r0]961; THUMB1-NEXT: bx lr962;963; THUMB2-LABEL: test8:964; THUMB2: @ %bb.0: @ %entry965; THUMB2-NEXT: ldrb r1, [r0]966; THUMB2-NEXT: eor r1, r1, #255967; THUMB2-NEXT: str r1, [r0]968; THUMB2-NEXT: bx lr969entry:970 %0 = load i32, ptr %p, align 4971 %neg = and i32 %0, 255972 %and = xor i32 %neg, 255973 store i32 %and, ptr %p, align 4974 ret void975}976 977define arm_aapcscc void @test9(ptr nocapture %p) {978; ARM-LABEL: test9:979; ARM: @ %bb.0: @ %entry980; ARM-NEXT: ldrb r1, [r0]981; ARM-NEXT: eor r1, r1, #255982; ARM-NEXT: str r1, [r0]983; ARM-NEXT: bx lr984;985; ARMEB-LABEL: test9:986; ARMEB: @ %bb.0: @ %entry987; ARMEB-NEXT: ldrb r1, [r0, #3]988; ARMEB-NEXT: eor r1, r1, #255989; ARMEB-NEXT: str r1, [r0]990; ARMEB-NEXT: bx lr991;992; THUMB1-LABEL: test9:993; THUMB1: @ %bb.0: @ %entry994; THUMB1-NEXT: ldrb r1, [r0]995; THUMB1-NEXT: movs r2, #255996; THUMB1-NEXT: eors r2, r1997; THUMB1-NEXT: str r2, [r0]998; THUMB1-NEXT: bx lr999;1000; THUMB2-LABEL: test9:1001; THUMB2: @ %bb.0: @ %entry1002; THUMB2-NEXT: ldrb r1, [r0]1003; THUMB2-NEXT: eor r1, r1, #2551004; THUMB2-NEXT: str r1, [r0]1005; THUMB2-NEXT: bx lr1006entry:1007 %0 = load i32, ptr %p, align 41008 %neg = xor i32 %0, -11009 %and = and i32 %neg, 2551010 store i32 %and, ptr %p, align 41011 ret void1012}1013 1014define arm_aapcscc void @test10(ptr nocapture %p) {1015; ARM-LABEL: test10:1016; ARM: @ %bb.0: @ %entry1017; ARM-NEXT: ldrb r1, [r0]1018; ARM-NEXT: eor r1, r1, #2551019; ARM-NEXT: str r1, [r0]1020; ARM-NEXT: bx lr1021;1022; ARMEB-LABEL: test10:1023; ARMEB: @ %bb.0: @ %entry1024; ARMEB-NEXT: ldrb r1, [r0, #3]1025; ARMEB-NEXT: eor r1, r1, #2551026; ARMEB-NEXT: str r1, [r0]1027; ARMEB-NEXT: bx lr1028;1029; THUMB1-LABEL: test10:1030; THUMB1: @ %bb.0: @ %entry1031; THUMB1-NEXT: ldrb r1, [r0]1032; THUMB1-NEXT: movs r2, #2551033; THUMB1-NEXT: eors r2, r11034; THUMB1-NEXT: str r2, [r0]1035; THUMB1-NEXT: bx lr1036;1037; THUMB2-LABEL: test10:1038; THUMB2: @ %bb.0: @ %entry1039; THUMB2-NEXT: ldrb r1, [r0]1040; THUMB2-NEXT: eor r1, r1, #2551041; THUMB2-NEXT: str r1, [r0]1042; THUMB2-NEXT: bx lr1043entry:1044 %0 = load i32, ptr %p, align 41045 %neg = and i32 %0, 2551046 %and = xor i32 %neg, 2551047 store i32 %and, ptr %p, align 41048 ret void1049}1050 1051define arm_aapcscc i32 @test11(ptr nocapture %p) {1052; ARM-LABEL: test11:1053; ARM: @ %bb.0:1054; ARM-NEXT: ldrb r0, [r0, #1]1055; ARM-NEXT: lsl r0, r0, #81056; ARM-NEXT: bx lr1057;1058; ARMEB-LABEL: test11:1059; ARMEB: @ %bb.0:1060; ARMEB-NEXT: ldrb r0, [r0, #2]1061; ARMEB-NEXT: lsl r0, r0, #81062; ARMEB-NEXT: bx lr1063;1064; THUMB1-LABEL: test11:1065; THUMB1: @ %bb.0:1066; THUMB1-NEXT: ldrb r0, [r0, #1]1067; THUMB1-NEXT: lsls r0, r0, #81068; THUMB1-NEXT: bx lr1069;1070; THUMB2-LABEL: test11:1071; THUMB2: @ %bb.0:1072; THUMB2-NEXT: ldrb r0, [r0, #1]1073; THUMB2-NEXT: lsls r0, r0, #81074; THUMB2-NEXT: bx lr1075 %1 = load i32, ptr %p, align 41076 %and = and i32 %1, 652801077 ret i32 %and1078}1079 1080define arm_aapcscc i32 @test12(ptr nocapture %p) {1081; ARM-LABEL: test12:1082; ARM: @ %bb.0:1083; ARM-NEXT: ldrb r0, [r0, #2]1084; ARM-NEXT: lsl r0, r0, #161085; ARM-NEXT: bx lr1086;1087; ARMEB-LABEL: test12:1088; ARMEB: @ %bb.0:1089; ARMEB-NEXT: ldrb r0, [r0, #1]1090; ARMEB-NEXT: lsl r0, r0, #161091; ARMEB-NEXT: bx lr1092;1093; THUMB1-LABEL: test12:1094; THUMB1: @ %bb.0:1095; THUMB1-NEXT: ldrb r0, [r0, #2]1096; THUMB1-NEXT: lsls r0, r0, #161097; THUMB1-NEXT: bx lr1098;1099; THUMB2-LABEL: test12:1100; THUMB2: @ %bb.0:1101; THUMB2-NEXT: ldrb r0, [r0, #2]1102; THUMB2-NEXT: lsls r0, r0, #161103; THUMB2-NEXT: bx lr1104 %1 = load i32, ptr %p, align 41105 %and = and i32 %1, 167116801106 ret i32 %and1107}1108 1109define arm_aapcscc i32 @test13(ptr nocapture %p) {1110; ARM-LABEL: test13:1111; ARM: @ %bb.0:1112; ARM-NEXT: ldrb r0, [r0, #3]1113; ARM-NEXT: lsl r0, r0, #241114; ARM-NEXT: bx lr1115;1116; ARMEB-LABEL: test13:1117; ARMEB: @ %bb.0:1118; ARMEB-NEXT: ldrb r0, [r0]1119; ARMEB-NEXT: lsl r0, r0, #241120; ARMEB-NEXT: bx lr1121;1122; THUMB1-LABEL: test13:1123; THUMB1: @ %bb.0:1124; THUMB1-NEXT: ldrb r0, [r0, #3]1125; THUMB1-NEXT: lsls r0, r0, #241126; THUMB1-NEXT: bx lr1127;1128; THUMB2-LABEL: test13:1129; THUMB2: @ %bb.0:1130; THUMB2-NEXT: ldrb r0, [r0, #3]1131; THUMB2-NEXT: lsls r0, r0, #241132; THUMB2-NEXT: bx lr1133 %1 = load i32, ptr %p, align 41134 %and = and i32 %1, 42781900801135 ret i32 %and1136}1137 1138define arm_aapcscc i32 @test14(ptr nocapture %p) {1139; ARM-LABEL: test14:1140; ARM: @ %bb.0:1141; ARM-NEXT: ldrh r0, [r0, #1]1142; ARM-NEXT: lsl r0, r0, #81143; ARM-NEXT: bx lr1144;1145; ARMEB-LABEL: test14:1146; ARMEB: @ %bb.0:1147; ARMEB-NEXT: ldrh r0, [r0, #1]1148; ARMEB-NEXT: lsl r0, r0, #81149; ARMEB-NEXT: bx lr1150;1151; THUMB1-LABEL: test14:1152; THUMB1: @ %bb.0:1153; THUMB1-NEXT: ldr r1, [r0]1154; THUMB1-NEXT: ldr r0, .LCPI26_01155; THUMB1-NEXT: ands r0, r11156; THUMB1-NEXT: bx lr1157; THUMB1-NEXT: .p2align 21158; THUMB1-NEXT: @ %bb.1:1159; THUMB1-NEXT: .LCPI26_0:1160; THUMB1-NEXT: .long 16776960 @ 0xffff001161;1162; THUMB2-LABEL: test14:1163; THUMB2: @ %bb.0:1164; THUMB2-NEXT: ldrh.w r0, [r0, #1]1165; THUMB2-NEXT: lsls r0, r0, #81166; THUMB2-NEXT: bx lr1167 %1 = load i32, ptr %p, align 41168 %and = and i32 %1, 167769601169 ret i32 %and1170}1171 1172define arm_aapcscc i32 @test15(ptr nocapture %p) {1173; ARM-LABEL: test15:1174; ARM: @ %bb.0:1175; ARM-NEXT: ldrh r0, [r0, #2]1176; ARM-NEXT: lsl r0, r0, #161177; ARM-NEXT: bx lr1178;1179; ARMEB-LABEL: test15:1180; ARMEB: @ %bb.0:1181; ARMEB-NEXT: ldrh r0, [r0]1182; ARMEB-NEXT: lsl r0, r0, #161183; ARMEB-NEXT: bx lr1184;1185; THUMB1-LABEL: test15:1186; THUMB1: @ %bb.0:1187; THUMB1-NEXT: ldrh r0, [r0, #2]1188; THUMB1-NEXT: lsls r0, r0, #161189; THUMB1-NEXT: bx lr1190;1191; THUMB2-LABEL: test15:1192; THUMB2: @ %bb.0:1193; THUMB2-NEXT: ldrh r0, [r0, #2]1194; THUMB2-NEXT: lsls r0, r0, #161195; THUMB2-NEXT: bx lr1196 %1 = load i32, ptr %p, align 41197 %and = and i32 %1, 42949017601198 ret i32 %and1199}1200 1201define arm_aapcscc i32 @test16(ptr nocapture %p) {1202; ARM-LABEL: test16:1203; ARM: @ %bb.0:1204; ARM-NEXT: ldrb r0, [r0, #1]1205; ARM-NEXT: lsl r0, r0, #81206; ARM-NEXT: bx lr1207;1208; ARMEB-LABEL: test16:1209; ARMEB: @ %bb.0:1210; ARMEB-NEXT: ldrb r0, [r0, #6]1211; ARMEB-NEXT: lsl r0, r0, #81212; ARMEB-NEXT: bx lr1213;1214; THUMB1-LABEL: test16:1215; THUMB1: @ %bb.0:1216; THUMB1-NEXT: ldrb r0, [r0, #1]1217; THUMB1-NEXT: lsls r0, r0, #81218; THUMB1-NEXT: bx lr1219;1220; THUMB2-LABEL: test16:1221; THUMB2: @ %bb.0:1222; THUMB2-NEXT: ldrb r0, [r0, #1]1223; THUMB2-NEXT: lsls r0, r0, #81224; THUMB2-NEXT: bx lr1225 %1 = load i64, ptr %p, align 81226 %and = and i64 %1, 652801227 %trunc = trunc i64 %and to i321228 ret i32 %trunc1229}1230 1231define arm_aapcscc i32 @test17(ptr nocapture %p) {1232; ARM-LABEL: test17:1233; ARM: @ %bb.0:1234; ARM-NEXT: ldrb r0, [r0, #2]1235; ARM-NEXT: lsl r0, r0, #161236; ARM-NEXT: bx lr1237;1238; ARMEB-LABEL: test17:1239; ARMEB: @ %bb.0:1240; ARMEB-NEXT: ldrb r0, [r0, #5]1241; ARMEB-NEXT: lsl r0, r0, #161242; ARMEB-NEXT: bx lr1243;1244; THUMB1-LABEL: test17:1245; THUMB1: @ %bb.0:1246; THUMB1-NEXT: ldrb r0, [r0, #2]1247; THUMB1-NEXT: lsls r0, r0, #161248; THUMB1-NEXT: bx lr1249;1250; THUMB2-LABEL: test17:1251; THUMB2: @ %bb.0:1252; THUMB2-NEXT: ldrb r0, [r0, #2]1253; THUMB2-NEXT: lsls r0, r0, #161254; THUMB2-NEXT: bx lr1255 %1 = load i64, ptr %p, align 81256 %and = and i64 %1, 167116801257 %trunc = trunc i64 %and to i321258 ret i32 %trunc1259}1260 1261define arm_aapcscc i32 @test18(ptr nocapture %p) {1262; ARM-LABEL: test18:1263; ARM: @ %bb.0:1264; ARM-NEXT: ldrb r0, [r0, #3]1265; ARM-NEXT: lsl r0, r0, #241266; ARM-NEXT: bx lr1267;1268; ARMEB-LABEL: test18:1269; ARMEB: @ %bb.0:1270; ARMEB-NEXT: ldrb r0, [r0, #4]1271; ARMEB-NEXT: lsl r0, r0, #241272; ARMEB-NEXT: bx lr1273;1274; THUMB1-LABEL: test18:1275; THUMB1: @ %bb.0:1276; THUMB1-NEXT: ldrb r0, [r0, #3]1277; THUMB1-NEXT: lsls r0, r0, #241278; THUMB1-NEXT: bx lr1279;1280; THUMB2-LABEL: test18:1281; THUMB2: @ %bb.0:1282; THUMB2-NEXT: ldrb r0, [r0, #3]1283; THUMB2-NEXT: lsls r0, r0, #241284; THUMB2-NEXT: bx lr1285 %1 = load i64, ptr %p, align 81286 %and = and i64 %1, 42781900801287 %trunc = trunc i64 %and to i321288 ret i32 %trunc1289}1290 1291define arm_aapcscc i64 @test19(ptr nocapture %p) {1292; ARM-LABEL: test19:1293; ARM: @ %bb.0:1294; ARM-NEXT: ldrb r1, [r0, #4]1295; ARM-NEXT: mov r0, #01296; ARM-NEXT: bx lr1297;1298; ARMEB-LABEL: test19:1299; ARMEB: @ %bb.0:1300; ARMEB-NEXT: ldrb r0, [r0, #3]1301; ARMEB-NEXT: mov r1, #01302; ARMEB-NEXT: bx lr1303;1304; THUMB1-LABEL: test19:1305; THUMB1: @ %bb.0:1306; THUMB1-NEXT: ldrb r1, [r0, #4]1307; THUMB1-NEXT: movs r0, #01308; THUMB1-NEXT: bx lr1309;1310; THUMB2-LABEL: test19:1311; THUMB2: @ %bb.0:1312; THUMB2-NEXT: ldrb r1, [r0, #4]1313; THUMB2-NEXT: movs r0, #01314; THUMB2-NEXT: bx lr1315 %1 = load i64, ptr %p, align 81316 %and = and i64 %1, 10952166604801317 ret i64 %and1318}1319 1320define arm_aapcscc i64 @test20(ptr nocapture %p) {1321; ARM-LABEL: test20:1322; ARM: @ %bb.0:1323; ARM-NEXT: ldrb r0, [r0, #5]1324; ARM-NEXT: lsl r1, r0, #81325; ARM-NEXT: mov r0, #01326; ARM-NEXT: bx lr1327;1328; ARMEB-LABEL: test20:1329; ARMEB: @ %bb.0:1330; ARMEB-NEXT: ldrb r0, [r0, #2]1331; ARMEB-NEXT: mov r1, #01332; ARMEB-NEXT: lsl r0, r0, #81333; ARMEB-NEXT: bx lr1334;1335; THUMB1-LABEL: test20:1336; THUMB1: @ %bb.0:1337; THUMB1-NEXT: ldrb r0, [r0, #5]1338; THUMB1-NEXT: lsls r1, r0, #81339; THUMB1-NEXT: movs r0, #01340; THUMB1-NEXT: bx lr1341;1342; THUMB2-LABEL: test20:1343; THUMB2: @ %bb.0:1344; THUMB2-NEXT: ldrb r0, [r0, #5]1345; THUMB2-NEXT: lsls r1, r0, #81346; THUMB2-NEXT: movs r0, #01347; THUMB2-NEXT: bx lr1348 %1 = load i64, ptr %p, align 81349 %and = and i64 %1, 2803754650828801350 ret i64 %and1351}1352 1353define arm_aapcscc i64 @test21(ptr nocapture %p) {1354; ARM-LABEL: test21:1355; ARM: @ %bb.0:1356; ARM-NEXT: ldrb r0, [r0, #6]1357; ARM-NEXT: lsl r1, r0, #161358; ARM-NEXT: mov r0, #01359; ARM-NEXT: bx lr1360;1361; ARMEB-LABEL: test21:1362; ARMEB: @ %bb.0:1363; ARMEB-NEXT: ldrb r0, [r0, #1]1364; ARMEB-NEXT: mov r1, #01365; ARMEB-NEXT: lsl r0, r0, #161366; ARMEB-NEXT: bx lr1367;1368; THUMB1-LABEL: test21:1369; THUMB1: @ %bb.0:1370; THUMB1-NEXT: ldrb r0, [r0, #6]1371; THUMB1-NEXT: lsls r1, r0, #161372; THUMB1-NEXT: movs r0, #01373; THUMB1-NEXT: bx lr1374;1375; THUMB2-LABEL: test21:1376; THUMB2: @ %bb.0:1377; THUMB2-NEXT: ldrb r0, [r0, #6]1378; THUMB2-NEXT: lsls r1, r0, #161379; THUMB2-NEXT: movs r0, #01380; THUMB2-NEXT: bx lr1381 %1 = load i64, ptr %p, align 81382 %and = and i64 %1, 717761190612172801383 ret i64 %and1384}1385 1386define arm_aapcscc i64 @test22(ptr nocapture %p) {1387; ARM-LABEL: test22:1388; ARM: @ %bb.0:1389; ARM-NEXT: ldrb r0, [r0, #7]1390; ARM-NEXT: lsl r1, r0, #241391; ARM-NEXT: mov r0, #01392; ARM-NEXT: bx lr1393;1394; ARMEB-LABEL: test22:1395; ARMEB: @ %bb.0:1396; ARMEB-NEXT: ldrb r0, [r0]1397; ARMEB-NEXT: mov r1, #01398; ARMEB-NEXT: lsl r0, r0, #241399; ARMEB-NEXT: bx lr1400;1401; THUMB1-LABEL: test22:1402; THUMB1: @ %bb.0:1403; THUMB1-NEXT: ldrb r0, [r0, #7]1404; THUMB1-NEXT: lsls r1, r0, #241405; THUMB1-NEXT: movs r0, #01406; THUMB1-NEXT: bx lr1407;1408; THUMB2-LABEL: test22:1409; THUMB2: @ %bb.0:1410; THUMB2-NEXT: ldrb r0, [r0, #7]1411; THUMB2-NEXT: lsls r1, r0, #241412; THUMB2-NEXT: movs r0, #01413; THUMB2-NEXT: bx lr1414 %1 = load i64, ptr %p, align 81415 %and = and i64 %1, -720575940379279361416 ret i64 %and1417}1418 1419define arm_aapcscc i64 @test23(ptr nocapture %p) {1420; ARM-LABEL: test23:1421; ARM: @ %bb.0:1422; ARM-NEXT: ldrh r1, [r0, #3]1423; ARM-NEXT: lsl r0, r1, #241424; ARM-NEXT: lsr r1, r1, #81425; ARM-NEXT: bx lr1426;1427; ARMEB-LABEL: test23:1428; ARMEB: @ %bb.0:1429; ARMEB-NEXT: ldrh r1, [r0, #3]1430; ARMEB-NEXT: lsr r0, r1, #81431; ARMEB-NEXT: lsl r1, r1, #241432; ARMEB-NEXT: bx lr1433;1434; THUMB1-LABEL: test23:1435; THUMB1: @ %bb.0:1436; THUMB1-NEXT: ldrb r1, [r0, #4]1437; THUMB1-NEXT: ldrb r0, [r0, #3]1438; THUMB1-NEXT: lsls r0, r0, #241439; THUMB1-NEXT: bx lr1440;1441; THUMB2-LABEL: test23:1442; THUMB2: @ %bb.0:1443; THUMB2-NEXT: ldrh.w r1, [r0, #3]1444; THUMB2-NEXT: lsls r0, r1, #241445; THUMB2-NEXT: lsrs r1, r1, #81446; THUMB2-NEXT: bx lr1447 %1 = load i64, ptr %p, align 81448 %and = and i64 %1, 10994948505601449 ret i64 %and1450}1451 1452define arm_aapcscc i64 @test24(ptr nocapture %p) {1453; ARM-LABEL: test24:1454; ARM: @ %bb.0:1455; ARM-NEXT: ldrh r1, [r0, #4]1456; ARM-NEXT: mov r0, #01457; ARM-NEXT: bx lr1458;1459; ARMEB-LABEL: test24:1460; ARMEB: @ %bb.0:1461; ARMEB-NEXT: ldrh r0, [r0, #2]1462; ARMEB-NEXT: mov r1, #01463; ARMEB-NEXT: bx lr1464;1465; THUMB1-LABEL: test24:1466; THUMB1: @ %bb.0:1467; THUMB1-NEXT: ldrh r1, [r0, #4]1468; THUMB1-NEXT: movs r0, #01469; THUMB1-NEXT: bx lr1470;1471; THUMB2-LABEL: test24:1472; THUMB2: @ %bb.0:1473; THUMB2-NEXT: ldrh r1, [r0, #4]1474; THUMB2-NEXT: movs r0, #01475; THUMB2-NEXT: bx lr1476 %1 = load i64, ptr %p, align 81477 %and = and i64 %1, 2814706817433601478 ret i64 %and1479}1480 1481define arm_aapcscc i64 @test25(ptr nocapture %p) {1482; ARM-LABEL: test25:1483; ARM: @ %bb.0:1484; ARM-NEXT: ldrh r0, [r0, #5]1485; ARM-NEXT: lsl r1, r0, #81486; ARM-NEXT: mov r0, #01487; ARM-NEXT: bx lr1488;1489; ARMEB-LABEL: test25:1490; ARMEB: @ %bb.0:1491; ARMEB-NEXT: ldrh r0, [r0, #1]1492; ARMEB-NEXT: mov r1, #01493; ARMEB-NEXT: lsl r0, r0, #81494; ARMEB-NEXT: bx lr1495;1496; THUMB1-LABEL: test25:1497; THUMB1: @ %bb.0:1498; THUMB1-NEXT: ldr r0, [r0, #4]1499; THUMB1-NEXT: ldr r1, .LCPI37_01500; THUMB1-NEXT: ands r1, r01501; THUMB1-NEXT: movs r0, #01502; THUMB1-NEXT: bx lr1503; THUMB1-NEXT: .p2align 21504; THUMB1-NEXT: @ %bb.1:1505; THUMB1-NEXT: .LCPI37_0:1506; THUMB1-NEXT: .long 16776960 @ 0xffff001507;1508; THUMB2-LABEL: test25:1509; THUMB2: @ %bb.0:1510; THUMB2-NEXT: ldrh.w r0, [r0, #5]1511; THUMB2-NEXT: lsls r1, r0, #81512; THUMB2-NEXT: movs r0, #01513; THUMB2-NEXT: bx lr1514 %1 = load i64, ptr %p, align 81515 %and = and i64 %1, 720564945263001601516 ret i64 %and1517}1518 1519define arm_aapcscc i64 @test26(ptr nocapture %p) {1520; ARM-LABEL: test26:1521; ARM: @ %bb.0:1522; ARM-NEXT: ldrh r0, [r0, #6]1523; ARM-NEXT: lsl r1, r0, #161524; ARM-NEXT: mov r0, #01525; ARM-NEXT: bx lr1526;1527; ARMEB-LABEL: test26:1528; ARMEB: @ %bb.0:1529; ARMEB-NEXT: ldrh r0, [r0]1530; ARMEB-NEXT: mov r1, #01531; ARMEB-NEXT: lsl r0, r0, #161532; ARMEB-NEXT: bx lr1533;1534; THUMB1-LABEL: test26:1535; THUMB1: @ %bb.0:1536; THUMB1-NEXT: ldrh r0, [r0, #6]1537; THUMB1-NEXT: lsls r1, r0, #161538; THUMB1-NEXT: movs r0, #01539; THUMB1-NEXT: bx lr1540;1541; THUMB2-LABEL: test26:1542; THUMB2: @ %bb.0:1543; THUMB2-NEXT: ldrh r0, [r0, #6]1544; THUMB2-NEXT: lsls r1, r0, #161545; THUMB2-NEXT: movs r0, #01546; THUMB2-NEXT: bx lr1547 %1 = load i64, ptr %p, align 81548 %and = and i64 %1, -2814749767106561549 ret i64 %and1550}1551 1552define void @test27(ptr nocapture %ptr) {1553; ARM-LABEL: test27:1554; ARM: @ %bb.0: @ %entry1555; ARM-NEXT: ldrb r1, [r0, #1]1556; ARM-NEXT: lsl r1, r1, #161557; ARM-NEXT: str r1, [r0]1558; ARM-NEXT: bx lr1559;1560; ARMEB-LABEL: test27:1561; ARMEB: @ %bb.0: @ %entry1562; ARMEB-NEXT: ldrb r1, [r0, #2]1563; ARMEB-NEXT: lsl r1, r1, #161564; ARMEB-NEXT: str r1, [r0]1565; ARMEB-NEXT: bx lr1566;1567; THUMB1-LABEL: test27:1568; THUMB1: @ %bb.0: @ %entry1569; THUMB1-NEXT: ldrb r1, [r0, #1]1570; THUMB1-NEXT: lsls r1, r1, #161571; THUMB1-NEXT: str r1, [r0]1572; THUMB1-NEXT: bx lr1573;1574; THUMB2-LABEL: test27:1575; THUMB2: @ %bb.0: @ %entry1576; THUMB2-NEXT: ldrb r1, [r0, #1]1577; THUMB2-NEXT: lsls r1, r1, #161578; THUMB2-NEXT: str r1, [r0]1579; THUMB2-NEXT: bx lr1580entry:1581 %0 = load i32, ptr %ptr, align 41582 %and = and i32 %0, 652801583 %shl = shl i32 %and, 81584 store i32 %shl, ptr %ptr, align 41585 ret void1586}1587