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1; RUN: llc -mtriple=armv7-linux < %s | FileCheck %s2 3declare arm_aapcscc void @addrof_i32(ptr)4declare arm_aapcscc void @addrof_i64(ptr)5 6define arm_aapcscc void @simple(i32, i32, i32, i32, i32 %x) {7entry:8 %x.addr = alloca i329 store i32 %x, ptr %x.addr10 call void @addrof_i32(ptr %x.addr)11 ret void12}13 14; CHECK-LABEL: simple:15; CHECK: push {r11, lr}16; CHECK: add r0, sp, #817; CHECK: bl addrof_i3218; CHECK: pop {r11, pc}19 20 21; We need to load %x before calling addrof_i32 now because it could mutate %x in22; place.23 24define arm_aapcscc i32 @use_arg(i32, i32, i32, i32, i32 %x) {25entry:26 %x.addr = alloca i3227 store i32 %x, ptr %x.addr28 call void @addrof_i32(ptr %x.addr)29 ret i32 %x30}31 32; CHECK-LABEL: use_arg:33; CHECK: push {[[csr:[^ ]*]], lr}34; CHECK: add r0, sp, #835; CHECK: ldr [[csr]], [sp, #8]36; CHECK: bl addrof_i3237; CHECK: mov r0, [[csr]]38; CHECK: pop {[[csr]], pc}39 40 41define arm_aapcscc i64 @split_i64(i32, i32, i32, i32, i64 %x) {42entry:43 %x.addr = alloca i64, align 444 store i64 %x, ptr %x.addr, align 445 call void @addrof_i64(ptr %x.addr)46 ret i64 %x47}48 49; CHECK-LABEL: split_i64:50; CHECK: push {r4, r5, r11, lr}51; CHECK: sub sp, sp, #852; CHECK: ldr r4, [sp, #28]53; CHECK: mov r0, sp54; CHECK: ldr r5, [sp, #24]55; CHECK: str r4, [sp, #4]56; CHECK: str r5, [sp]57; CHECK: bl addrof_i6458; CHECK: mov r0, r559; CHECK: mov r1, r460; CHECK: add sp, sp, #861; CHECK: pop {r4, r5, r11, pc}62