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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc %s -o - -enable-shrink-wrap=true | FileCheck %s --check-prefix=ENABLE3; RUN: llc %s -o - -enable-shrink-wrap=false | FileCheck %s --check-prefix=DISABLE4; We cannot merge this test with the main test for shrink-wrapping, because5; the code path we want to exerce is not taken with ios lowering.6target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n8:16:32-S64"7target triple = "armv7--linux-gnueabi"8 9@skip = internal unnamed_addr constant [2 x i8] c"\01\01", align 110 11; Check that we do not restore the before having used the saved CSRs.12; This happened because of a bad use of the post-dominance property.13; The exit block of the loop happens to also lead to defs/uses of CSRs.14; It also post-dominates the loop body and we use to generate invalid15; restore sequence. I.e., we restored too early.16 17define fastcc ptr @wrongUseOfPostDominate(ptr readonly %s, i32 %off, ptr readnone %lim) {18; ENABLE-LABEL: wrongUseOfPostDominate:19; ENABLE: @ %bb.0: @ %entry20; ENABLE-NEXT: .save {r11, lr}21; ENABLE-NEXT: push {r11, lr}22; ENABLE-NEXT: cmn r1, #123; ENABLE-NEXT: ble .LBB0_724; ENABLE-NEXT: @ %bb.1: @ %while.cond.preheader25; ENABLE-NEXT: cmp r1, #026; ENABLE-NEXT: beq .LBB0_627; ENABLE-NEXT: @ %bb.2: @ %while.cond.preheader28; ENABLE-NEXT: cmp r0, r229; ENABLE-NEXT: pophs {r11, pc}30; ENABLE-NEXT: .LBB0_3: @ %while.body.preheader31; ENABLE-NEXT: movw r12, :lower16:skip32; ENABLE-NEXT: sub r1, r1, #133; ENABLE-NEXT: movt r12, :upper16:skip34; ENABLE-NEXT: .LBB0_4: @ %while.body35; ENABLE-NEXT: @ =>This Inner Loop Header: Depth=136; ENABLE-NEXT: ldrb r3, [r0]37; ENABLE-NEXT: ldrb r3, [r12, r3]38; ENABLE-NEXT: add r0, r0, r339; ENABLE-NEXT: sub r3, r1, #140; ENABLE-NEXT: cmp r3, r141; ENABLE-NEXT: bhs .LBB0_642; ENABLE-NEXT: @ %bb.5: @ %while.body43; ENABLE-NEXT: @ in Loop: Header=BB0_4 Depth=144; ENABLE-NEXT: mov r1, r345; ENABLE-NEXT: cmp r0, r246; ENABLE-NEXT: blo .LBB0_447; ENABLE-NEXT: .LBB0_6: @ %if.end2948; ENABLE-NEXT: pop {r11, pc}49; ENABLE-NEXT: .LBB0_7: @ %while.cond2.outer50; ENABLE-NEXT: @ =>This Loop Header: Depth=151; ENABLE-NEXT: @ Child Loop BB0_8 Depth 252; ENABLE-NEXT: @ Child Loop BB0_15 Depth 253; ENABLE-NEXT: mov r3, r054; ENABLE-NEXT: .LBB0_8: @ %while.cond255; ENABLE-NEXT: @ Parent Loop BB0_7 Depth=156; ENABLE-NEXT: @ => This Inner Loop Header: Depth=257; ENABLE-NEXT: add r1, r1, #158; ENABLE-NEXT: cmp r1, #159; ENABLE-NEXT: beq .LBB0_1860; ENABLE-NEXT: @ %bb.9: @ %while.body461; ENABLE-NEXT: @ in Loop: Header=BB0_8 Depth=262; ENABLE-NEXT: cmp r3, r263; ENABLE-NEXT: bls .LBB0_864; ENABLE-NEXT: @ %bb.10: @ %if.then765; ENABLE-NEXT: @ in Loop: Header=BB0_7 Depth=166; ENABLE-NEXT: mov r0, r367; ENABLE-NEXT: ldrb r12, [r0, #-1]!68; ENABLE-NEXT: sxtb lr, r1269; ENABLE-NEXT: cmn lr, #170; ENABLE-NEXT: bgt .LBB0_771; ENABLE-NEXT: @ %bb.11: @ %if.then772; ENABLE-NEXT: @ in Loop: Header=BB0_7 Depth=173; ENABLE-NEXT: cmp r0, r274; ENABLE-NEXT: bls .LBB0_775; ENABLE-NEXT: @ %bb.12: @ %land.rhs14.preheader76; ENABLE-NEXT: @ in Loop: Header=BB0_7 Depth=177; ENABLE-NEXT: cmn lr, #178; ENABLE-NEXT: bgt .LBB0_779; ENABLE-NEXT: @ %bb.13: @ %land.rhs14.preheader80; ENABLE-NEXT: @ in Loop: Header=BB0_7 Depth=181; ENABLE-NEXT: cmp r12, #19182; ENABLE-NEXT: bhi .LBB0_783; ENABLE-NEXT: @ %bb.14: @ %while.body24.preheader84; ENABLE-NEXT: @ in Loop: Header=BB0_7 Depth=185; ENABLE-NEXT: sub r3, r3, #286; ENABLE-NEXT: .LBB0_15: @ %while.body2487; ENABLE-NEXT: @ Parent Loop BB0_7 Depth=188; ENABLE-NEXT: @ => This Inner Loop Header: Depth=289; ENABLE-NEXT: mov r0, r390; ENABLE-NEXT: cmp r3, r291; ENABLE-NEXT: bls .LBB0_792; ENABLE-NEXT: @ %bb.16: @ %while.body24.land.rhs14_crit_edge93; ENABLE-NEXT: @ in Loop: Header=BB0_15 Depth=294; ENABLE-NEXT: mov r3, r095; ENABLE-NEXT: ldrsb lr, [r3], #-196; ENABLE-NEXT: cmn lr, #197; ENABLE-NEXT: uxtb r12, lr98; ENABLE-NEXT: bgt .LBB0_799; ENABLE-NEXT: @ %bb.17: @ %while.body24.land.rhs14_crit_edge100; ENABLE-NEXT: @ in Loop: Header=BB0_15 Depth=2101; ENABLE-NEXT: cmp r12, #192102; ENABLE-NEXT: blo .LBB0_15103; ENABLE-NEXT: b .LBB0_7104; ENABLE-NEXT: .LBB0_18:105; ENABLE-NEXT: mov r0, r3106; ENABLE-NEXT: pop {r11, pc}107;108; DISABLE-LABEL: wrongUseOfPostDominate:109; DISABLE: @ %bb.0: @ %entry110; DISABLE-NEXT: .save {r11, lr}111; DISABLE-NEXT: push {r11, lr}112; DISABLE-NEXT: cmn r1, #1113; DISABLE-NEXT: ble .LBB0_7114; DISABLE-NEXT: @ %bb.1: @ %while.cond.preheader115; DISABLE-NEXT: cmp r1, #0116; DISABLE-NEXT: beq .LBB0_6117; DISABLE-NEXT: @ %bb.2: @ %while.cond.preheader118; DISABLE-NEXT: cmp r0, r2119; DISABLE-NEXT: pophs {r11, pc}120; DISABLE-NEXT: .LBB0_3: @ %while.body.preheader121; DISABLE-NEXT: movw r12, :lower16:skip122; DISABLE-NEXT: sub r1, r1, #1123; DISABLE-NEXT: movt r12, :upper16:skip124; DISABLE-NEXT: .LBB0_4: @ %while.body125; DISABLE-NEXT: @ =>This Inner Loop Header: Depth=1126; DISABLE-NEXT: ldrb r3, [r0]127; DISABLE-NEXT: ldrb r3, [r12, r3]128; DISABLE-NEXT: add r0, r0, r3129; DISABLE-NEXT: sub r3, r1, #1130; DISABLE-NEXT: cmp r3, r1131; DISABLE-NEXT: bhs .LBB0_6132; DISABLE-NEXT: @ %bb.5: @ %while.body133; DISABLE-NEXT: @ in Loop: Header=BB0_4 Depth=1134; DISABLE-NEXT: mov r1, r3135; DISABLE-NEXT: cmp r0, r2136; DISABLE-NEXT: blo .LBB0_4137; DISABLE-NEXT: .LBB0_6: @ %if.end29138; DISABLE-NEXT: pop {r11, pc}139; DISABLE-NEXT: .LBB0_7: @ %while.cond2.outer140; DISABLE-NEXT: @ =>This Loop Header: Depth=1141; DISABLE-NEXT: @ Child Loop BB0_8 Depth 2142; DISABLE-NEXT: @ Child Loop BB0_15 Depth 2143; DISABLE-NEXT: mov r3, r0144; DISABLE-NEXT: .LBB0_8: @ %while.cond2145; DISABLE-NEXT: @ Parent Loop BB0_7 Depth=1146; DISABLE-NEXT: @ => This Inner Loop Header: Depth=2147; DISABLE-NEXT: add r1, r1, #1148; DISABLE-NEXT: cmp r1, #1149; DISABLE-NEXT: beq .LBB0_18150; DISABLE-NEXT: @ %bb.9: @ %while.body4151; DISABLE-NEXT: @ in Loop: Header=BB0_8 Depth=2152; DISABLE-NEXT: cmp r3, r2153; DISABLE-NEXT: bls .LBB0_8154; DISABLE-NEXT: @ %bb.10: @ %if.then7155; DISABLE-NEXT: @ in Loop: Header=BB0_7 Depth=1156; DISABLE-NEXT: mov r0, r3157; DISABLE-NEXT: ldrb r12, [r0, #-1]!158; DISABLE-NEXT: sxtb lr, r12159; DISABLE-NEXT: cmn lr, #1160; DISABLE-NEXT: bgt .LBB0_7161; DISABLE-NEXT: @ %bb.11: @ %if.then7162; DISABLE-NEXT: @ in Loop: Header=BB0_7 Depth=1163; DISABLE-NEXT: cmp r0, r2164; DISABLE-NEXT: bls .LBB0_7165; DISABLE-NEXT: @ %bb.12: @ %land.rhs14.preheader166; DISABLE-NEXT: @ in Loop: Header=BB0_7 Depth=1167; DISABLE-NEXT: cmn lr, #1168; DISABLE-NEXT: bgt .LBB0_7169; DISABLE-NEXT: @ %bb.13: @ %land.rhs14.preheader170; DISABLE-NEXT: @ in Loop: Header=BB0_7 Depth=1171; DISABLE-NEXT: cmp r12, #191172; DISABLE-NEXT: bhi .LBB0_7173; DISABLE-NEXT: @ %bb.14: @ %while.body24.preheader174; DISABLE-NEXT: @ in Loop: Header=BB0_7 Depth=1175; DISABLE-NEXT: sub r3, r3, #2176; DISABLE-NEXT: .LBB0_15: @ %while.body24177; DISABLE-NEXT: @ Parent Loop BB0_7 Depth=1178; DISABLE-NEXT: @ => This Inner Loop Header: Depth=2179; DISABLE-NEXT: mov r0, r3180; DISABLE-NEXT: cmp r3, r2181; DISABLE-NEXT: bls .LBB0_7182; DISABLE-NEXT: @ %bb.16: @ %while.body24.land.rhs14_crit_edge183; DISABLE-NEXT: @ in Loop: Header=BB0_15 Depth=2184; DISABLE-NEXT: mov r3, r0185; DISABLE-NEXT: ldrsb lr, [r3], #-1186; DISABLE-NEXT: cmn lr, #1187; DISABLE-NEXT: uxtb r12, lr188; DISABLE-NEXT: bgt .LBB0_7189; DISABLE-NEXT: @ %bb.17: @ %while.body24.land.rhs14_crit_edge190; DISABLE-NEXT: @ in Loop: Header=BB0_15 Depth=2191; DISABLE-NEXT: cmp r12, #192192; DISABLE-NEXT: blo .LBB0_15193; DISABLE-NEXT: b .LBB0_7194; DISABLE-NEXT: .LBB0_18:195; DISABLE-NEXT: mov r0, r3196; DISABLE-NEXT: pop {r11, pc}197entry:198 %cmp = icmp sgt i32 %off, -1199 br i1 %cmp, label %while.cond.preheader, label %while.cond2.outer200 201while.cond.preheader: ; preds = %entry202 %tobool4 = icmp ne i32 %off, 0203 %cmp15 = icmp ult ptr %s, %lim204 %sel66 = and i1 %tobool4, %cmp15205 br i1 %sel66, label %while.body, label %if.end29206 207while.body: ; preds = %while.body, %while.cond.preheader208 %s.addr.08 = phi ptr [ %add.ptr, %while.body ], [ %s, %while.cond.preheader ]209 %off.addr.07 = phi i32 [ %dec, %while.body ], [ %off, %while.cond.preheader ]210 %dec = add nsw i32 %off.addr.07, -1211 %tmp = load i8, ptr %s.addr.08, align 1, !tbaa !2212 %idxprom = zext i8 %tmp to i32213 %arrayidx = getelementptr inbounds [2 x i8], ptr @skip, i32 0, i32 %idxprom214 %tmp1 = load i8, ptr %arrayidx, align 1, !tbaa !2215 %conv = zext i8 %tmp1 to i32216 %add.ptr = getelementptr inbounds i8, ptr %s.addr.08, i32 %conv217 %tobool = icmp ne i32 %off.addr.07, 1218 %cmp1 = icmp ult ptr %add.ptr, %lim219 %sel6 = and i1 %tobool, %cmp1220 br i1 %sel6, label %while.body, label %if.end29221 222while.cond2.outer: ; preds = %while.body24.land.rhs14_crit_edge, %while.body24, %land.rhs14.preheader, %if.then7, %entry223 %off.addr.1.ph = phi i32 [ %off, %entry ], [ %inc, %land.rhs14.preheader ], [ %inc, %if.then7 ], [ %inc, %while.body24.land.rhs14_crit_edge ], [ %inc, %while.body24 ]224 %s.addr.1.ph = phi ptr [ %s, %entry ], [ %incdec.ptr, %land.rhs14.preheader ], [ %incdec.ptr, %if.then7 ], [ %lsr.iv, %while.body24.land.rhs14_crit_edge ], [ %lsr.iv, %while.body24 ]225 br label %while.cond2226 227while.cond2: ; preds = %while.body4, %while.cond2.outer228 %off.addr.1 = phi i32 [ %inc, %while.body4 ], [ %off.addr.1.ph, %while.cond2.outer ]229 %inc = add nsw i32 %off.addr.1, 1230 %tobool3 = icmp eq i32 %off.addr.1, 0231 br i1 %tobool3, label %if.end29, label %while.body4232 233while.body4: ; preds = %while.cond2234 %tmp2 = icmp ugt ptr %s.addr.1.ph, %lim235 br i1 %tmp2, label %if.then7, label %while.cond2236 237if.then7: ; preds = %while.body4238 %incdec.ptr = getelementptr inbounds i8, ptr %s.addr.1.ph, i32 -1239 %tmp3 = load i8, ptr %incdec.ptr, align 1, !tbaa !2240 %conv1525 = zext i8 %tmp3 to i32241 %tobool9 = icmp slt i8 %tmp3, 0242 %cmp129 = icmp ugt ptr %incdec.ptr, %lim243 %or.cond13 = and i1 %tobool9, %cmp129244 br i1 %or.cond13, label %land.rhs14.preheader, label %while.cond2.outer245 246land.rhs14.preheader: ; preds = %if.then7247 %cmp1624 = icmp slt i8 %tmp3, 0248 %cmp2026 = icmp ult i32 %conv1525, 192249 %or.cond27 = and i1 %cmp1624, %cmp2026250 br i1 %or.cond27, label %while.body24.preheader, label %while.cond2.outer251 252while.body24.preheader: ; preds = %land.rhs14.preheader253 %scevgep = getelementptr i8, ptr %s.addr.1.ph, i32 -2254 br label %while.body24255 256while.body24: ; preds = %while.body24.land.rhs14_crit_edge, %while.body24.preheader257 %lsr.iv = phi ptr [ %scevgep, %while.body24.preheader ], [ %scevgep34, %while.body24.land.rhs14_crit_edge ]258 %cmp12 = icmp ugt ptr %lsr.iv, %lim259 br i1 %cmp12, label %while.body24.land.rhs14_crit_edge, label %while.cond2.outer260 261while.body24.land.rhs14_crit_edge: ; preds = %while.body24262 %.pre = load i8, ptr %lsr.iv, align 1, !tbaa !2263 %cmp16 = icmp slt i8 %.pre, 0264 %conv15 = zext i8 %.pre to i32265 %cmp20 = icmp ult i32 %conv15, 192266 %or.cond = and i1 %cmp16, %cmp20267 %scevgep34 = getelementptr i8, ptr %lsr.iv, i32 -1268 br i1 %or.cond, label %while.body24, label %while.cond2.outer269 270if.end29: ; preds = %while.cond2, %while.body, %while.cond.preheader271 %s.addr.3 = phi ptr [ %s, %while.cond.preheader ], [ %add.ptr, %while.body ], [ %s.addr.1.ph, %while.cond2 ]272 ret ptr %s.addr.3273}274 275!llvm.module.flags = !{!0, !1}276 277!0 = !{i32 1, !"wchar_size", i32 4}278!1 = !{i32 1, !"min_enum_size", i32 4}279!2 = !{!3, !3, i64 0}280!3 = !{!"omnipotent char", !4, i64 0}281!4 = !{!"Simple C/C++ TBAA"}282