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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a9 < %s | FileCheck %s3 4define i8 @atomicrmw_usub_cond_i8(ptr %ptr, i8 %val) {5; CHECK-LABEL: atomicrmw_usub_cond_i8:6; CHECK: @ %bb.0:7; CHECK-NEXT: dmb ish8; CHECK-NEXT: .LBB0_1: @ %atomicrmw.start9; CHECK-NEXT: @ =>This Inner Loop Header: Depth=110; CHECK-NEXT: ldrexb r12, [r0]11; CHECK-NEXT: uxtb r3, r112; CHECK-NEXT: cmp r12, r313; CHECK-NEXT: mov r3, r1214; CHECK-NEXT: subhs r3, r3, r115; CHECK-NEXT: strexb r2, r3, [r0]16; CHECK-NEXT: cmp r2, #017; CHECK-NEXT: bne .LBB0_118; CHECK-NEXT: @ %bb.2: @ %atomicrmw.end19; CHECK-NEXT: mov r0, r1220; CHECK-NEXT: dmb ish21; CHECK-NEXT: bx lr22 %result = atomicrmw usub_cond ptr %ptr, i8 %val seq_cst23 ret i8 %result24}25 26define i16 @atomicrmw_usub_cond_i16(ptr %ptr, i16 %val) {27; CHECK-LABEL: atomicrmw_usub_cond_i16:28; CHECK: @ %bb.0:29; CHECK-NEXT: dmb ish30; CHECK-NEXT: .LBB1_1: @ %atomicrmw.start31; CHECK-NEXT: @ =>This Inner Loop Header: Depth=132; CHECK-NEXT: ldrexh r12, [r0]33; CHECK-NEXT: uxth r3, r134; CHECK-NEXT: cmp r12, r335; CHECK-NEXT: mov r3, r1236; CHECK-NEXT: subhs r3, r3, r137; CHECK-NEXT: strexh r2, r3, [r0]38; CHECK-NEXT: cmp r2, #039; CHECK-NEXT: bne .LBB1_140; CHECK-NEXT: @ %bb.2: @ %atomicrmw.end41; CHECK-NEXT: mov r0, r1242; CHECK-NEXT: dmb ish43; CHECK-NEXT: bx lr44 %result = atomicrmw usub_cond ptr %ptr, i16 %val seq_cst45 ret i16 %result46}47 48define i32 @atomicrmw_usub_cond_i32(ptr %ptr, i32 %val) {49; CHECK-LABEL: atomicrmw_usub_cond_i32:50; CHECK: @ %bb.0:51; CHECK-NEXT: dmb ish52; CHECK-NEXT: .LBB2_1: @ %atomicrmw.start53; CHECK-NEXT: @ =>This Inner Loop Header: Depth=154; CHECK-NEXT: ldrex r12, [r0]55; CHECK-NEXT: subs r3, r12, r156; CHECK-NEXT: movlo r3, r1257; CHECK-NEXT: strex r2, r3, [r0]58; CHECK-NEXT: cmp r2, #059; CHECK-NEXT: bne .LBB2_160; CHECK-NEXT: @ %bb.2: @ %atomicrmw.end61; CHECK-NEXT: mov r0, r1262; CHECK-NEXT: dmb ish63; CHECK-NEXT: bx lr64 %result = atomicrmw usub_cond ptr %ptr, i32 %val seq_cst65 ret i32 %result66}67 68define i64 @atomicrmw_usub_cond_i64(ptr %ptr, i64 %val) {69; CHECK-LABEL: atomicrmw_usub_cond_i64:70; CHECK: @ %bb.0:71; CHECK-NEXT: .save {r4, r5, r11, lr}72; CHECK-NEXT: push {r4, r5, r11, lr}73; CHECK-NEXT: mov r12, r074; CHECK-NEXT: dmb ish75; CHECK-NEXT: .LBB3_1: @ %atomicrmw.start76; CHECK-NEXT: @ =>This Inner Loop Header: Depth=177; CHECK-NEXT: ldrexd r0, r1, [r12]78; CHECK-NEXT: subs r4, r0, r279; CHECK-NEXT: sbcs r5, r1, r380; CHECK-NEXT: movlo r5, r181; CHECK-NEXT: movlo r4, r082; CHECK-NEXT: strexd lr, r4, r5, [r12]83; CHECK-NEXT: cmp lr, #084; CHECK-NEXT: bne .LBB3_185; CHECK-NEXT: @ %bb.2: @ %atomicrmw.end86; CHECK-NEXT: dmb ish87; CHECK-NEXT: pop {r4, r5, r11, pc}88 %result = atomicrmw usub_cond ptr %ptr, i64 %val seq_cst89 ret i64 %result90}91 92define i8 @atomicrmw_usub_sat_i8(ptr %ptr, i8 %val) {93; CHECK-LABEL: atomicrmw_usub_sat_i8:94; CHECK: @ %bb.0:95; CHECK-NEXT: dmb ish96; CHECK-NEXT: .LBB4_1: @ %atomicrmw.start97; CHECK-NEXT: @ =>This Inner Loop Header: Depth=198; CHECK-NEXT: ldrexb r12, [r0]99; CHECK-NEXT: uqsub8 r3, r12, r1100; CHECK-NEXT: strexb r2, r3, [r0]101; CHECK-NEXT: cmp r2, #0102; CHECK-NEXT: bne .LBB4_1103; CHECK-NEXT: @ %bb.2: @ %atomicrmw.end104; CHECK-NEXT: mov r0, r12105; CHECK-NEXT: dmb ish106; CHECK-NEXT: bx lr107 %result = atomicrmw usub_sat ptr %ptr, i8 %val seq_cst108 ret i8 %result109}110 111define i16 @atomicrmw_usub_sat_i16(ptr %ptr, i16 %val) {112; CHECK-LABEL: atomicrmw_usub_sat_i16:113; CHECK: @ %bb.0:114; CHECK-NEXT: dmb ish115; CHECK-NEXT: .LBB5_1: @ %atomicrmw.start116; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1117; CHECK-NEXT: ldrexh r12, [r0]118; CHECK-NEXT: uqsub16 r3, r12, r1119; CHECK-NEXT: strexh r2, r3, [r0]120; CHECK-NEXT: cmp r2, #0121; CHECK-NEXT: bne .LBB5_1122; CHECK-NEXT: @ %bb.2: @ %atomicrmw.end123; CHECK-NEXT: mov r0, r12124; CHECK-NEXT: dmb ish125; CHECK-NEXT: bx lr126 %result = atomicrmw usub_sat ptr %ptr, i16 %val seq_cst127 ret i16 %result128}129 130define i32 @atomicrmw_usub_sat_i32(ptr %ptr, i32 %val) {131; CHECK-LABEL: atomicrmw_usub_sat_i32:132; CHECK: @ %bb.0:133; CHECK-NEXT: dmb ish134; CHECK-NEXT: .LBB6_1: @ %atomicrmw.start135; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1136; CHECK-NEXT: ldrex r12, [r0]137; CHECK-NEXT: subs r3, r12, r1138; CHECK-NEXT: movlo r3, #0139; CHECK-NEXT: strex r2, r3, [r0]140; CHECK-NEXT: cmp r2, #0141; CHECK-NEXT: bne .LBB6_1142; CHECK-NEXT: @ %bb.2: @ %atomicrmw.end143; CHECK-NEXT: mov r0, r12144; CHECK-NEXT: dmb ish145; CHECK-NEXT: bx lr146 %result = atomicrmw usub_sat ptr %ptr, i32 %val seq_cst147 ret i32 %result148}149 150define i64 @atomicrmw_usub_sat_i64(ptr %ptr, i64 %val) {151; CHECK-LABEL: atomicrmw_usub_sat_i64:152; CHECK: @ %bb.0:153; CHECK-NEXT: .save {r4, r5, r6, r7, r11, lr}154; CHECK-NEXT: push {r4, r5, r6, r7, r11, lr}155; CHECK-NEXT: mov r12, #0156; CHECK-NEXT: dmb ish157; CHECK-NEXT: .LBB7_1: @ %atomicrmw.start158; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1159; CHECK-NEXT: ldrexd r4, r5, [r0]160; CHECK-NEXT: subs r6, r4, r2161; CHECK-NEXT: sbcs r7, r5, r3162; CHECK-NEXT: adc r1, r12, #0163; CHECK-NEXT: teq r1, #1164; CHECK-NEXT: movwne r7, #0165; CHECK-NEXT: movwne r6, #0166; CHECK-NEXT: strexd r1, r6, r7, [r0]167; CHECK-NEXT: cmp r1, #0168; CHECK-NEXT: bne .LBB7_1169; CHECK-NEXT: @ %bb.2: @ %atomicrmw.end170; CHECK-NEXT: mov r0, r4171; CHECK-NEXT: mov r1, r5172; CHECK-NEXT: dmb ish173; CHECK-NEXT: pop {r4, r5, r6, r7, r11, pc}174 %result = atomicrmw usub_sat ptr %ptr, i64 %val seq_cst175 ret i64 %result176}177