138 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=armv8.6a-none-none-eabi < %s | FileCheck %s --check-prefixes=CHECK3; RUN: llc -mtriple=armv8.6a-none-none-eabi -mattr=+bf16,+neon < %s | FileCheck %s --check-prefixes=CHECK4; RUN: llc -mtriple=armv8.6a-none-none-eabi -mattr=+bf16,+neon,+fullfp16 < %s | FileCheck %s --check-prefix=CHECK-FP165; RUN: llc -mtriple=armv8.6a-none-none-eabi -mattr=+bf16,+neon -float-abi=hard < %s | FileCheck %s --check-prefix=CHECK-HARD6 7define bfloat @bitcast_zero() {8; CHECK-LABEL: bitcast_zero:9; CHECK: @ %bb.0:10; CHECK-NEXT: .pad #411; CHECK-NEXT: sub sp, sp, #412; CHECK-NEXT: mov r0, #013; CHECK-NEXT: strh r0, [sp, #2]14; CHECK-NEXT: ldrh r0, [sp, #2]15; CHECK-NEXT: add sp, sp, #416; CHECK-NEXT: bx lr17;18; CHECK-FP16-LABEL: bitcast_zero:19; CHECK-FP16: @ %bb.0:20; CHECK-FP16-NEXT: mov r0, #021; CHECK-FP16-NEXT: vmov.f16 s0, r022; CHECK-FP16-NEXT: vmov r0, s023; CHECK-FP16-NEXT: bx lr24;25; CHECK-HARD-LABEL: bitcast_zero:26; CHECK-HARD: @ %bb.0:27; CHECK-HARD-NEXT: .pad #428; CHECK-HARD-NEXT: sub sp, sp, #429; CHECK-HARD-NEXT: mov r0, #030; CHECK-HARD-NEXT: strh r0, [sp, #2]31; CHECK-HARD-NEXT: ldrh r0, [sp, #2]32; CHECK-HARD-NEXT: vmov s0, r033; CHECK-HARD-NEXT: add sp, sp, #434; CHECK-HARD-NEXT: bx lr35 %z = bitcast i16 0 to bfloat36 ret bfloat %z37}38 39define bfloat @zero() {40; CHECK-LABEL: zero:41; CHECK: @ %bb.0:42; CHECK-NEXT: adr r0, .LCPI1_043; CHECK-NEXT: ldrh r0, [r0]44; CHECK-NEXT: bx lr45; CHECK-NEXT: .p2align 146; CHECK-NEXT: @ %bb.1:47; CHECK-NEXT: .LCPI1_0:48; CHECK-NEXT: .short 0x0000 @ bfloat 049;50; CHECK-FP16-LABEL: zero:51; CHECK-FP16: @ %bb.0:52; CHECK-FP16-NEXT: vldr.16 s0, .LCPI1_053; CHECK-FP16-NEXT: vmov r0, s054; CHECK-FP16-NEXT: bx lr55; CHECK-FP16-NEXT: .p2align 156; CHECK-FP16-NEXT: @ %bb.1:57; CHECK-FP16-NEXT: .LCPI1_0:58; CHECK-FP16-NEXT: .short 0x0000 @ bfloat 059;60; CHECK-HARD-LABEL: zero:61; CHECK-HARD: @ %bb.0:62; CHECK-HARD-NEXT: adr r0, .LCPI1_063; CHECK-HARD-NEXT: ldrh r0, [r0]64; CHECK-HARD-NEXT: vmov s0, r065; CHECK-HARD-NEXT: bx lr66; CHECK-HARD-NEXT: .p2align 167; CHECK-HARD-NEXT: @ %bb.1:68; CHECK-HARD-NEXT: .LCPI1_0:69; CHECK-HARD-NEXT: .short 0x0000 @ bfloat 070 ret bfloat 0xR000071}72 73define bfloat @bitcast_tenk() {74; CHECK-LABEL: bitcast_tenk:75; CHECK: @ %bb.0:76; CHECK-NEXT: .pad #477; CHECK-NEXT: sub sp, sp, #478; CHECK-NEXT: movw r0, #1000079; CHECK-NEXT: strh r0, [sp, #2]80; CHECK-NEXT: ldrh r0, [sp, #2]81; CHECK-NEXT: add sp, sp, #482; CHECK-NEXT: bx lr83;84; CHECK-FP16-LABEL: bitcast_tenk:85; CHECK-FP16: @ %bb.0:86; CHECK-FP16-NEXT: movw r0, #1000087; CHECK-FP16-NEXT: vmov.f16 s0, r088; CHECK-FP16-NEXT: vmov r0, s089; CHECK-FP16-NEXT: bx lr90;91; CHECK-HARD-LABEL: bitcast_tenk:92; CHECK-HARD: @ %bb.0:93; CHECK-HARD-NEXT: .pad #494; CHECK-HARD-NEXT: sub sp, sp, #495; CHECK-HARD-NEXT: movw r0, #1000096; CHECK-HARD-NEXT: strh r0, [sp, #2]97; CHECK-HARD-NEXT: ldrh r0, [sp, #2]98; CHECK-HARD-NEXT: vmov s0, r099; CHECK-HARD-NEXT: add sp, sp, #4100; CHECK-HARD-NEXT: bx lr101 %z = bitcast i16 10000 to bfloat102 ret bfloat %z103}104 105define bfloat @minus0() {106; CHECK-LABEL: minus0:107; CHECK: @ %bb.0:108; CHECK-NEXT: adr r0, .LCPI3_0109; CHECK-NEXT: ldrh r0, [r0]110; CHECK-NEXT: bx lr111; CHECK-NEXT: .p2align 1112; CHECK-NEXT: @ %bb.1:113; CHECK-NEXT: .LCPI3_0:114; CHECK-NEXT: .short 0x8000 @ bfloat -0115;116; CHECK-FP16-LABEL: minus0:117; CHECK-FP16: @ %bb.0:118; CHECK-FP16-NEXT: vldr.16 s0, .LCPI3_0119; CHECK-FP16-NEXT: vmov r0, s0120; CHECK-FP16-NEXT: bx lr121; CHECK-FP16-NEXT: .p2align 1122; CHECK-FP16-NEXT: @ %bb.1:123; CHECK-FP16-NEXT: .LCPI3_0:124; CHECK-FP16-NEXT: .short 0x8000 @ bfloat -0125;126; CHECK-HARD-LABEL: minus0:127; CHECK-HARD: @ %bb.0:128; CHECK-HARD-NEXT: adr r0, .LCPI3_0129; CHECK-HARD-NEXT: ldrh r0, [r0]130; CHECK-HARD-NEXT: vmov s0, r0131; CHECK-HARD-NEXT: bx lr132; CHECK-HARD-NEXT: .p2align 1133; CHECK-HARD-NEXT: @ %bb.1:134; CHECK-HARD-NEXT: .LCPI3_0:135; CHECK-HARD-NEXT: .short 0x8000 @ bfloat -0136 ret bfloat 0xR8000137}138