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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -float-abi hard -mattr=+bf16,+fullfp16 < %s | FileCheck %s --check-prefix=HARD3; RUN: llc -float-abi soft -mattr=+bf16,+fullfp16 < %s | FileCheck %s --check-prefix=SOFT4 5target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"6target triple = "armv8.6a-arm-none-eabi"7 8define bfloat @load_scalar_bf(ptr %addr) {9; HARD-LABEL: load_scalar_bf:10; HARD: @ %bb.0: @ %entry11; HARD-NEXT: vldr.16 s0, [r0]12; HARD-NEXT: bx lr13;14; SOFT-LABEL: load_scalar_bf:15; SOFT: @ %bb.0: @ %entry16; SOFT-NEXT: vldr.16 s0, [r0]17; SOFT-NEXT: vmov r0, s018; SOFT-NEXT: bx lr19entry:20 %0 = load bfloat, ptr %addr, align 221 ret bfloat %022}23 24define void @store_scalar_bf(bfloat %v, ptr %addr) {25; HARD-LABEL: store_scalar_bf:26; HARD: @ %bb.0: @ %entry27; HARD-NEXT: vstr.16 s0, [r0]28; HARD-NEXT: bx lr29;30; SOFT-LABEL: store_scalar_bf:31; SOFT: @ %bb.0: @ %entry32; SOFT-NEXT: vmov.f16 s0, r033; SOFT-NEXT: vstr.16 s0, [r1]34; SOFT-NEXT: bx lr35entry:36 store bfloat %v, ptr %addr, align 237 ret void38}39 40define <4 x bfloat> @load_vector4_bf(ptr %addr) {41; HARD-LABEL: load_vector4_bf:42; HARD: @ %bb.0: @ %entry43; HARD-NEXT: vldr d0, [r0]44; HARD-NEXT: bx lr45;46; SOFT-LABEL: load_vector4_bf:47; SOFT: @ %bb.0: @ %entry48; SOFT-NEXT: vldr d16, [r0]49; SOFT-NEXT: vmov r0, r1, d1650; SOFT-NEXT: bx lr51entry:52 %0 = load <4 x bfloat>, ptr %addr, align 853 ret <4 x bfloat> %054}55 56define void @store_vector4_bf(<4 x bfloat> %v, ptr %addr) {57; HARD-LABEL: store_vector4_bf:58; HARD: @ %bb.0: @ %entry59; HARD-NEXT: vstr d0, [r0]60; HARD-NEXT: bx lr61;62; SOFT-LABEL: store_vector4_bf:63; SOFT: @ %bb.0: @ %entry64; SOFT-NEXT: strd r0, r1, [r2]65; SOFT-NEXT: bx lr66entry:67 store <4 x bfloat> %v, ptr %addr, align 868 ret void69}70 71define <8 x bfloat> @load_vector8_bf(ptr %addr) {72; HARD-LABEL: load_vector8_bf:73; HARD: @ %bb.0: @ %entry74; HARD-NEXT: vld1.64 {d0, d1}, [r0]75; HARD-NEXT: bx lr76;77; SOFT-LABEL: load_vector8_bf:78; SOFT: @ %bb.0: @ %entry79; SOFT-NEXT: vld1.64 {d16, d17}, [r0]80; SOFT-NEXT: vmov r0, r1, d1681; SOFT-NEXT: vmov r2, r3, d1782; SOFT-NEXT: bx lr83entry:84 %0 = load <8 x bfloat>, ptr %addr, align 885 ret <8 x bfloat> %086}87 88define void @store_vector8_bf(<8 x bfloat> %v, ptr %addr) {89; HARD-LABEL: store_vector8_bf:90; HARD: @ %bb.0: @ %entry91; HARD-NEXT: vst1.64 {d0, d1}, [r0]92; HARD-NEXT: bx lr93;94; SOFT-LABEL: store_vector8_bf:95; SOFT: @ %bb.0: @ %entry96; SOFT-NEXT: vmov d17, r2, r397; SOFT-NEXT: ldr r12, [sp]98; SOFT-NEXT: vmov d16, r0, r199; SOFT-NEXT: vst1.64 {d16, d17}, [r12]100; SOFT-NEXT: bx lr101entry:102 store <8 x bfloat> %v, ptr %addr, align 8103 ret void104}105 106 107