1344 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc %s -o - -mtriple=thumbv8m.main -mattr=+fp-armv8d16sp,+dsp -float-abi=hard | \3; RUN: FileCheck %s --check-prefix=CHECK-8M --check-prefix=CHECK-8M-LE4; RUN: llc %s -o - -mtriple=thumbebv8m.main -mattr=+fp-armv8d16sp,+dsp -float-abi=hard | \5; RUN: FileCheck %s --check-prefix=CHECK-8M --check-prefix=CHECK-8M-BE6; RUN: llc %s -o - -mtriple=thumbv8.1m.main -mattr=+fp-armv8d16sp,+dsp -float-abi=hard | \7; RUN: FileCheck %s --check-prefix=CHECK-81M --check-prefix=CHECK-NO-MVE --check-prefix=CHECK-81M-LE8; RUN: llc %s -o - -mtriple=thumbebv8.1m.main -mattr=+fp-armv8d16sp,+dsp -float-abi=hard | \9; RUN: FileCheck %s --check-prefix=CHECK-81M --check-prefix=CHECK-NO-MVE --check-prefix=CHECK-81M-BE10; RUN: llc %s -o - -mtriple=thumbv8.1m.main -mattr=+mve.fp -float-abi=hard | \11; RUN: FileCheck %s --check-prefix=CHECK-81M --check-prefix=CHECK-MVE --check-prefix=CHECK-81M-LE12; RUN: llc %s -o - -mtriple=thumbebv8.1m.main -mattr=+mve.fp -float-abi=hard | \13; RUN: FileCheck %s --check-prefix=CHECK-81M --check-prefix=CHECK-MVE --check-prefix=CHECK-81M-BE14 15define float @f1(ptr nocapture %fptr) #0 {16; CHECK-8M-LABEL: f1:17; CHECK-8M: @ %bb.0: @ %entry18; CHECK-8M-NEXT: push {r7, lr}19; CHECK-8M-NEXT: vmov.f32 s0, #1.000000e+0120; CHECK-8M-NEXT: blx r021; CHECK-8M-NEXT: pop.w {r7, lr}22; CHECK-8M-NEXT: mrs r12, control23; CHECK-8M-NEXT: tst.w r12, #824; CHECK-8M-NEXT: beq .LBB0_225; CHECK-8M-NEXT: @ %bb.1: @ %entry26; CHECK-8M-NEXT: vmrs r12, fpscr27; CHECK-8M-NEXT: vmov s1, lr28; CHECK-8M-NEXT: vmov d1, lr, lr29; CHECK-8M-NEXT: vmov d2, lr, lr30; CHECK-8M-NEXT: vmov d3, lr, lr31; CHECK-8M-NEXT: vmov d4, lr, lr32; CHECK-8M-NEXT: vmov d5, lr, lr33; CHECK-8M-NEXT: vmov d6, lr, lr34; CHECK-8M-NEXT: vmov d7, lr, lr35; CHECK-8M-NEXT: bic r12, r12, #15936; CHECK-8M-NEXT: bic r12, r12, #402653184037; CHECK-8M-NEXT: vmsr fpscr, r1238; CHECK-8M-NEXT: .LBB0_2: @ %entry39; CHECK-8M-NEXT: mov r0, lr40; CHECK-8M-NEXT: mov r1, lr41; CHECK-8M-NEXT: mov r2, lr42; CHECK-8M-NEXT: mov r3, lr43; CHECK-8M-NEXT: mov r12, lr44; CHECK-8M-NEXT: msr apsr_nzcvqg, lr45; CHECK-8M-NEXT: bxns lr46;47; CHECK-81M-LABEL: f1:48; CHECK-81M: @ %bb.0: @ %entry49; CHECK-81M-NEXT: vstr fpcxtns, [sp, #-4]!50; CHECK-81M-NEXT: push {r7, lr}51; CHECK-81M-NEXT: sub sp, #452; CHECK-81M-NEXT: vmov.f32 s0, #1.000000e+0153; CHECK-81M-NEXT: blx r054; CHECK-81M-NEXT: add sp, #455; CHECK-81M-NEXT: pop.w {r7, lr}56; CHECK-81M-NEXT: vscclrm {s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, vpr}57; CHECK-81M-NEXT: vldr fpcxtns, [sp], #458; CHECK-81M-NEXT: clrm {r0, r1, r2, r3, r12, apsr}59; CHECK-81M-NEXT: bxns lr60entry:61 %call = call float %fptr(float 10.0) #162 ret float %call63}64 65attributes #0 = { "cmse_nonsecure_entry" nounwind }66attributes #1 = { nounwind }67 68define double @d1(ptr nocapture %fptr) #0 {69; CHECK-8M-LE-LABEL: d1:70; CHECK-8M-LE: @ %bb.0: @ %entry71; CHECK-8M-LE-NEXT: push {r7, lr}72; CHECK-8M-LE-NEXT: vldr d0, .LCPI1_073; CHECK-8M-LE-NEXT: blx r074; CHECK-8M-LE-NEXT: pop.w {r7, lr}75; CHECK-8M-LE-NEXT: mrs r12, control76; CHECK-8M-LE-NEXT: tst.w r12, #877; CHECK-8M-LE-NEXT: beq .LBB1_278; CHECK-8M-LE-NEXT: @ %bb.1: @ %entry79; CHECK-8M-LE-NEXT: vmrs r12, fpscr80; CHECK-8M-LE-NEXT: vmov d1, lr, lr81; CHECK-8M-LE-NEXT: vmov d2, lr, lr82; CHECK-8M-LE-NEXT: vmov d3, lr, lr83; CHECK-8M-LE-NEXT: vmov d4, lr, lr84; CHECK-8M-LE-NEXT: vmov d5, lr, lr85; CHECK-8M-LE-NEXT: vmov d6, lr, lr86; CHECK-8M-LE-NEXT: vmov d7, lr, lr87; CHECK-8M-LE-NEXT: bic r12, r12, #15988; CHECK-8M-LE-NEXT: bic r12, r12, #402653184089; CHECK-8M-LE-NEXT: vmsr fpscr, r1290; CHECK-8M-LE-NEXT: .LBB1_2: @ %entry91; CHECK-8M-LE-NEXT: mov r0, lr92; CHECK-8M-LE-NEXT: mov r1, lr93; CHECK-8M-LE-NEXT: mov r2, lr94; CHECK-8M-LE-NEXT: mov r3, lr95; CHECK-8M-LE-NEXT: mov r12, lr96; CHECK-8M-LE-NEXT: msr apsr_nzcvqg, lr97; CHECK-8M-LE-NEXT: bxns lr98; CHECK-8M-LE-NEXT: .p2align 399; CHECK-8M-LE-NEXT: @ %bb.3:100; CHECK-8M-LE-NEXT: .LCPI1_0:101; CHECK-8M-LE-NEXT: .long 0 @ double 10102; CHECK-8M-LE-NEXT: .long 1076101120103;104; CHECK-8M-BE-LABEL: d1:105; CHECK-8M-BE: @ %bb.0: @ %entry106; CHECK-8M-BE-NEXT: push {r7, lr}107; CHECK-8M-BE-NEXT: vldr d0, .LCPI1_0108; CHECK-8M-BE-NEXT: blx r0109; CHECK-8M-BE-NEXT: pop.w {r7, lr}110; CHECK-8M-BE-NEXT: mrs r12, control111; CHECK-8M-BE-NEXT: tst.w r12, #8112; CHECK-8M-BE-NEXT: beq .LBB1_2113; CHECK-8M-BE-NEXT: @ %bb.1: @ %entry114; CHECK-8M-BE-NEXT: vmrs r12, fpscr115; CHECK-8M-BE-NEXT: vmov d1, lr, lr116; CHECK-8M-BE-NEXT: vmov d2, lr, lr117; CHECK-8M-BE-NEXT: vmov d3, lr, lr118; CHECK-8M-BE-NEXT: vmov d4, lr, lr119; CHECK-8M-BE-NEXT: vmov d5, lr, lr120; CHECK-8M-BE-NEXT: vmov d6, lr, lr121; CHECK-8M-BE-NEXT: vmov d7, lr, lr122; CHECK-8M-BE-NEXT: bic r12, r12, #159123; CHECK-8M-BE-NEXT: bic r12, r12, #4026531840124; CHECK-8M-BE-NEXT: vmsr fpscr, r12125; CHECK-8M-BE-NEXT: .LBB1_2: @ %entry126; CHECK-8M-BE-NEXT: mov r0, lr127; CHECK-8M-BE-NEXT: mov r1, lr128; CHECK-8M-BE-NEXT: mov r2, lr129; CHECK-8M-BE-NEXT: mov r3, lr130; CHECK-8M-BE-NEXT: mov r12, lr131; CHECK-8M-BE-NEXT: msr apsr_nzcvqg, lr132; CHECK-8M-BE-NEXT: bxns lr133; CHECK-8M-BE-NEXT: .p2align 3134; CHECK-8M-BE-NEXT: @ %bb.3:135; CHECK-8M-BE-NEXT: .LCPI1_0:136; CHECK-8M-BE-NEXT: .long 1076101120 @ double 10137; CHECK-8M-BE-NEXT: .long 0138;139; CHECK-81M-LE-LABEL: d1:140; CHECK-81M-LE: @ %bb.0: @ %entry141; CHECK-81M-LE-NEXT: vstr fpcxtns, [sp, #-4]!142; CHECK-81M-LE-NEXT: push {r7, lr}143; CHECK-81M-LE-NEXT: sub sp, #4144; CHECK-81M-LE-NEXT: vldr d0, .LCPI1_0145; CHECK-81M-LE-NEXT: blx r0146; CHECK-81M-LE-NEXT: add sp, #4147; CHECK-81M-LE-NEXT: pop.w {r7, lr}148; CHECK-81M-LE-NEXT: vscclrm {s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, vpr}149; CHECK-81M-LE-NEXT: vldr fpcxtns, [sp], #4150; CHECK-81M-LE-NEXT: clrm {r0, r1, r2, r3, r12, apsr}151; CHECK-81M-LE-NEXT: bxns lr152; CHECK-81M-LE-NEXT: .p2align 3153; CHECK-81M-LE-NEXT: @ %bb.1:154; CHECK-81M-LE-NEXT: .LCPI1_0:155; CHECK-81M-LE-NEXT: .long 0 @ double 10156; CHECK-81M-LE-NEXT: .long 1076101120157;158; CHECK-81M-BE-LABEL: d1:159; CHECK-81M-BE: @ %bb.0: @ %entry160; CHECK-81M-BE-NEXT: vstr fpcxtns, [sp, #-4]!161; CHECK-81M-BE-NEXT: push {r7, lr}162; CHECK-81M-BE-NEXT: sub sp, #4163; CHECK-81M-BE-NEXT: vldr d0, .LCPI1_0164; CHECK-81M-BE-NEXT: blx r0165; CHECK-81M-BE-NEXT: add sp, #4166; CHECK-81M-BE-NEXT: pop.w {r7, lr}167; CHECK-81M-BE-NEXT: vscclrm {s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, vpr}168; CHECK-81M-BE-NEXT: vldr fpcxtns, [sp], #4169; CHECK-81M-BE-NEXT: clrm {r0, r1, r2, r3, r12, apsr}170; CHECK-81M-BE-NEXT: bxns lr171; CHECK-81M-BE-NEXT: .p2align 3172; CHECK-81M-BE-NEXT: @ %bb.1:173; CHECK-81M-BE-NEXT: .LCPI1_0:174; CHECK-81M-BE-NEXT: .long 1076101120 @ double 10175; CHECK-81M-BE-NEXT: .long 0176entry:177 %call = call double %fptr(double 10.0) #1178 ret double %call179}180 181define float @f2(ptr nocapture %fptr) #2 {182; CHECK-8M-LABEL: f2:183; CHECK-8M: @ %bb.0: @ %entry184; CHECK-8M-NEXT: push {r7, lr}185; CHECK-8M-NEXT: vmov.f32 s0, #1.000000e+01186; CHECK-8M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}187; CHECK-8M-NEXT: bic r0, r0, #1188; CHECK-8M-NEXT: sub sp, #136189; CHECK-8M-NEXT: vmov r12, s0190; CHECK-8M-NEXT: vlstm sp, {d0 - d15}191; CHECK-8M-NEXT: vmov s0, r12192; CHECK-8M-NEXT: ldr r1, [sp, #64]193; CHECK-8M-NEXT: bic r1, r1, #159194; CHECK-8M-NEXT: bic r1, r1, #4026531840195; CHECK-8M-NEXT: vmsr fpscr, r1196; CHECK-8M-NEXT: mov r1, r0197; CHECK-8M-NEXT: mov r2, r0198; CHECK-8M-NEXT: mov r3, r0199; CHECK-8M-NEXT: mov r4, r0200; CHECK-8M-NEXT: mov r5, r0201; CHECK-8M-NEXT: mov r6, r0202; CHECK-8M-NEXT: mov r7, r0203; CHECK-8M-NEXT: mov r8, r0204; CHECK-8M-NEXT: mov r9, r0205; CHECK-8M-NEXT: mov r10, r0206; CHECK-8M-NEXT: mov r11, r0207; CHECK-8M-NEXT: msr apsr_nzcvqg, r0208; CHECK-8M-NEXT: blxns r0209; CHECK-8M-NEXT: vmov r12, s0210; CHECK-8M-NEXT: vlldm sp, {d0 - d15}211; CHECK-8M-NEXT: vmov s0, r12212; CHECK-8M-NEXT: add sp, #136213; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}214; CHECK-8M-NEXT: pop {r7, pc}215;216; CHECK-81M-LABEL: f2:217; CHECK-81M: @ %bb.0: @ %entry218; CHECK-81M-NEXT: push {r7, lr}219; CHECK-81M-NEXT: vmov.f32 s0, #1.000000e+01220; CHECK-81M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}221; CHECK-81M-NEXT: bic r0, r0, #1222; CHECK-81M-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}223; CHECK-81M-NEXT: vscclrm {s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31, vpr}224; CHECK-81M-NEXT: vstr fpcxts, [sp, #-8]!225; CHECK-81M-NEXT: clrm {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, apsr}226; CHECK-81M-NEXT: blxns r0227; CHECK-81M-NEXT: vldr fpcxts, [sp], #8228; CHECK-81M-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}229; CHECK-81M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}230; CHECK-81M-NEXT: pop {r7, pc}231entry:232 %call = call float %fptr(float 10.0) #3233 ret float %call234}235 236attributes #2 = { nounwind }237attributes #3 = { "cmse_nonsecure_call" nounwind }238 239define double @d2(ptr nocapture %fptr) #2 {240; CHECK-8M-LE-LABEL: d2:241; CHECK-8M-LE: @ %bb.0: @ %entry242; CHECK-8M-LE-NEXT: push {r7, lr}243; CHECK-8M-LE-NEXT: vldr d0, .LCPI3_0244; CHECK-8M-LE-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}245; CHECK-8M-LE-NEXT: bic r0, r0, #1246; CHECK-8M-LE-NEXT: sub sp, #136247; CHECK-8M-LE-NEXT: vmov r11, r12, d0248; CHECK-8M-LE-NEXT: vlstm sp, {d0 - d15}249; CHECK-8M-LE-NEXT: vmov d0, r11, r12250; CHECK-8M-LE-NEXT: ldr r1, [sp, #64]251; CHECK-8M-LE-NEXT: bic r1, r1, #159252; CHECK-8M-LE-NEXT: bic r1, r1, #4026531840253; CHECK-8M-LE-NEXT: vmsr fpscr, r1254; CHECK-8M-LE-NEXT: mov r1, r0255; CHECK-8M-LE-NEXT: mov r2, r0256; CHECK-8M-LE-NEXT: mov r3, r0257; CHECK-8M-LE-NEXT: mov r4, r0258; CHECK-8M-LE-NEXT: mov r5, r0259; CHECK-8M-LE-NEXT: mov r6, r0260; CHECK-8M-LE-NEXT: mov r7, r0261; CHECK-8M-LE-NEXT: mov r8, r0262; CHECK-8M-LE-NEXT: mov r9, r0263; CHECK-8M-LE-NEXT: mov r10, r0264; CHECK-8M-LE-NEXT: msr apsr_nzcvqg, r0265; CHECK-8M-LE-NEXT: blxns r0266; CHECK-8M-LE-NEXT: vmov r11, r12, d0267; CHECK-8M-LE-NEXT: vlldm sp, {d0 - d15}268; CHECK-8M-LE-NEXT: vmov d0, r11, r12269; CHECK-8M-LE-NEXT: add sp, #136270; CHECK-8M-LE-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}271; CHECK-8M-LE-NEXT: pop {r7, pc}272; CHECK-8M-LE-NEXT: .p2align 3273; CHECK-8M-LE-NEXT: @ %bb.1:274; CHECK-8M-LE-NEXT: .LCPI3_0:275; CHECK-8M-LE-NEXT: .long 0 @ double 10276; CHECK-8M-LE-NEXT: .long 1076101120277;278; CHECK-8M-BE-LABEL: d2:279; CHECK-8M-BE: @ %bb.0: @ %entry280; CHECK-8M-BE-NEXT: push {r7, lr}281; CHECK-8M-BE-NEXT: vldr d0, .LCPI3_0282; CHECK-8M-BE-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}283; CHECK-8M-BE-NEXT: bic r0, r0, #1284; CHECK-8M-BE-NEXT: sub sp, #136285; CHECK-8M-BE-NEXT: vmov r11, r12, d0286; CHECK-8M-BE-NEXT: vlstm sp, {d0 - d15}287; CHECK-8M-BE-NEXT: vmov d0, r11, r12288; CHECK-8M-BE-NEXT: ldr r1, [sp, #64]289; CHECK-8M-BE-NEXT: bic r1, r1, #159290; CHECK-8M-BE-NEXT: bic r1, r1, #4026531840291; CHECK-8M-BE-NEXT: vmsr fpscr, r1292; CHECK-8M-BE-NEXT: mov r1, r0293; CHECK-8M-BE-NEXT: mov r2, r0294; CHECK-8M-BE-NEXT: mov r3, r0295; CHECK-8M-BE-NEXT: mov r4, r0296; CHECK-8M-BE-NEXT: mov r5, r0297; CHECK-8M-BE-NEXT: mov r6, r0298; CHECK-8M-BE-NEXT: mov r7, r0299; CHECK-8M-BE-NEXT: mov r8, r0300; CHECK-8M-BE-NEXT: mov r9, r0301; CHECK-8M-BE-NEXT: mov r10, r0302; CHECK-8M-BE-NEXT: msr apsr_nzcvqg, r0303; CHECK-8M-BE-NEXT: blxns r0304; CHECK-8M-BE-NEXT: vmov r11, r12, d0305; CHECK-8M-BE-NEXT: vlldm sp, {d0 - d15}306; CHECK-8M-BE-NEXT: vmov d0, r11, r12307; CHECK-8M-BE-NEXT: add sp, #136308; CHECK-8M-BE-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}309; CHECK-8M-BE-NEXT: pop {r7, pc}310; CHECK-8M-BE-NEXT: .p2align 3311; CHECK-8M-BE-NEXT: @ %bb.1:312; CHECK-8M-BE-NEXT: .LCPI3_0:313; CHECK-8M-BE-NEXT: .long 1076101120 @ double 10314; CHECK-8M-BE-NEXT: .long 0315;316; CHECK-81M-LE-LABEL: d2:317; CHECK-81M-LE: @ %bb.0: @ %entry318; CHECK-81M-LE-NEXT: push {r7, lr}319; CHECK-81M-LE-NEXT: vldr d0, .LCPI3_0320; CHECK-81M-LE-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}321; CHECK-81M-LE-NEXT: bic r0, r0, #1322; CHECK-81M-LE-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}323; CHECK-81M-LE-NEXT: vscclrm {s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31, vpr}324; CHECK-81M-LE-NEXT: vstr fpcxts, [sp, #-8]!325; CHECK-81M-LE-NEXT: clrm {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, apsr}326; CHECK-81M-LE-NEXT: blxns r0327; CHECK-81M-LE-NEXT: vldr fpcxts, [sp], #8328; CHECK-81M-LE-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}329; CHECK-81M-LE-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}330; CHECK-81M-LE-NEXT: pop {r7, pc}331; CHECK-81M-LE-NEXT: .p2align 3332; CHECK-81M-LE-NEXT: @ %bb.1:333; CHECK-81M-LE-NEXT: .LCPI3_0:334; CHECK-81M-LE-NEXT: .long 0 @ double 10335; CHECK-81M-LE-NEXT: .long 1076101120336;337; CHECK-81M-BE-LABEL: d2:338; CHECK-81M-BE: @ %bb.0: @ %entry339; CHECK-81M-BE-NEXT: push {r7, lr}340; CHECK-81M-BE-NEXT: vldr d0, .LCPI3_0341; CHECK-81M-BE-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}342; CHECK-81M-BE-NEXT: bic r0, r0, #1343; CHECK-81M-BE-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}344; CHECK-81M-BE-NEXT: vscclrm {s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31, vpr}345; CHECK-81M-BE-NEXT: vstr fpcxts, [sp, #-8]!346; CHECK-81M-BE-NEXT: clrm {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, apsr}347; CHECK-81M-BE-NEXT: blxns r0348; CHECK-81M-BE-NEXT: vldr fpcxts, [sp], #8349; CHECK-81M-BE-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}350; CHECK-81M-BE-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}351; CHECK-81M-BE-NEXT: pop {r7, pc}352; CHECK-81M-BE-NEXT: .p2align 3353; CHECK-81M-BE-NEXT: @ %bb.1:354; CHECK-81M-BE-NEXT: .LCPI3_0:355; CHECK-81M-BE-NEXT: .long 1076101120 @ double 10356; CHECK-81M-BE-NEXT: .long 0357entry:358 %call = call double %fptr(double 10.0) #3359 ret double %call360}361 362define float @f3(ptr nocapture %fptr) #4 {363; CHECK-8M-LABEL: f3:364; CHECK-8M: @ %bb.0: @ %entry365; CHECK-8M-NEXT: push {r7, lr}366; CHECK-8M-NEXT: vmov.f32 s0, #1.000000e+01367; CHECK-8M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}368; CHECK-8M-NEXT: bic r0, r0, #1369; CHECK-8M-NEXT: sub sp, #136370; CHECK-8M-NEXT: vmov r12, s0371; CHECK-8M-NEXT: vlstm sp, {d0 - d15}372; CHECK-8M-NEXT: vmov s0, r12373; CHECK-8M-NEXT: ldr r1, [sp, #64]374; CHECK-8M-NEXT: bic r1, r1, #159375; CHECK-8M-NEXT: bic r1, r1, #4026531840376; CHECK-8M-NEXT: vmsr fpscr, r1377; CHECK-8M-NEXT: mov r1, r0378; CHECK-8M-NEXT: mov r2, r0379; CHECK-8M-NEXT: mov r3, r0380; CHECK-8M-NEXT: mov r4, r0381; CHECK-8M-NEXT: mov r5, r0382; CHECK-8M-NEXT: mov r6, r0383; CHECK-8M-NEXT: mov r7, r0384; CHECK-8M-NEXT: mov r8, r0385; CHECK-8M-NEXT: mov r9, r0386; CHECK-8M-NEXT: mov r10, r0387; CHECK-8M-NEXT: mov r11, r0388; CHECK-8M-NEXT: msr apsr_nzcvqg, r0389; CHECK-8M-NEXT: blxns r0390; CHECK-8M-NEXT: vmov r12, s0391; CHECK-8M-NEXT: vlldm sp, {d0 - d15}392; CHECK-8M-NEXT: vmov s0, r12393; CHECK-8M-NEXT: add sp, #136394; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}395; CHECK-8M-NEXT: pop {r7, pc}396;397; CHECK-81M-LABEL: f3:398; CHECK-81M: @ %bb.0: @ %entry399; CHECK-81M-NEXT: push {r7, lr}400; CHECK-81M-NEXT: vmov.f32 s0, #1.000000e+01401; CHECK-81M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}402; CHECK-81M-NEXT: bic r0, r0, #1403; CHECK-81M-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}404; CHECK-81M-NEXT: vscclrm {s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31, vpr}405; CHECK-81M-NEXT: vstr fpcxts, [sp, #-8]!406; CHECK-81M-NEXT: clrm {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, apsr}407; CHECK-81M-NEXT: blxns r0408; CHECK-81M-NEXT: vldr fpcxts, [sp], #8409; CHECK-81M-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}410; CHECK-81M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}411; CHECK-81M-NEXT: pop {r7, pc}412entry:413 %call = tail call float %fptr(float 10.0) #5414 ret float %call415}416 417attributes #4 = { nounwind }418attributes #5 = { "cmse_nonsecure_call" nounwind }419 420define double @d3(ptr nocapture %fptr) #4 {421; CHECK-8M-LE-LABEL: d3:422; CHECK-8M-LE: @ %bb.0: @ %entry423; CHECK-8M-LE-NEXT: push {r7, lr}424; CHECK-8M-LE-NEXT: vldr d0, .LCPI5_0425; CHECK-8M-LE-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}426; CHECK-8M-LE-NEXT: bic r0, r0, #1427; CHECK-8M-LE-NEXT: sub sp, #136428; CHECK-8M-LE-NEXT: vmov r11, r12, d0429; CHECK-8M-LE-NEXT: vlstm sp, {d0 - d15}430; CHECK-8M-LE-NEXT: vmov d0, r11, r12431; CHECK-8M-LE-NEXT: ldr r1, [sp, #64]432; CHECK-8M-LE-NEXT: bic r1, r1, #159433; CHECK-8M-LE-NEXT: bic r1, r1, #4026531840434; CHECK-8M-LE-NEXT: vmsr fpscr, r1435; CHECK-8M-LE-NEXT: mov r1, r0436; CHECK-8M-LE-NEXT: mov r2, r0437; CHECK-8M-LE-NEXT: mov r3, r0438; CHECK-8M-LE-NEXT: mov r4, r0439; CHECK-8M-LE-NEXT: mov r5, r0440; CHECK-8M-LE-NEXT: mov r6, r0441; CHECK-8M-LE-NEXT: mov r7, r0442; CHECK-8M-LE-NEXT: mov r8, r0443; CHECK-8M-LE-NEXT: mov r9, r0444; CHECK-8M-LE-NEXT: mov r10, r0445; CHECK-8M-LE-NEXT: msr apsr_nzcvqg, r0446; CHECK-8M-LE-NEXT: blxns r0447; CHECK-8M-LE-NEXT: vmov r11, r12, d0448; CHECK-8M-LE-NEXT: vlldm sp, {d0 - d15}449; CHECK-8M-LE-NEXT: vmov d0, r11, r12450; CHECK-8M-LE-NEXT: add sp, #136451; CHECK-8M-LE-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}452; CHECK-8M-LE-NEXT: pop {r7, pc}453; CHECK-8M-LE-NEXT: .p2align 3454; CHECK-8M-LE-NEXT: @ %bb.1:455; CHECK-8M-LE-NEXT: .LCPI5_0:456; CHECK-8M-LE-NEXT: .long 0 @ double 10457; CHECK-8M-LE-NEXT: .long 1076101120458;459; CHECK-8M-BE-LABEL: d3:460; CHECK-8M-BE: @ %bb.0: @ %entry461; CHECK-8M-BE-NEXT: push {r7, lr}462; CHECK-8M-BE-NEXT: vldr d0, .LCPI5_0463; CHECK-8M-BE-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}464; CHECK-8M-BE-NEXT: bic r0, r0, #1465; CHECK-8M-BE-NEXT: sub sp, #136466; CHECK-8M-BE-NEXT: vmov r11, r12, d0467; CHECK-8M-BE-NEXT: vlstm sp, {d0 - d15}468; CHECK-8M-BE-NEXT: vmov d0, r11, r12469; CHECK-8M-BE-NEXT: ldr r1, [sp, #64]470; CHECK-8M-BE-NEXT: bic r1, r1, #159471; CHECK-8M-BE-NEXT: bic r1, r1, #4026531840472; CHECK-8M-BE-NEXT: vmsr fpscr, r1473; CHECK-8M-BE-NEXT: mov r1, r0474; CHECK-8M-BE-NEXT: mov r2, r0475; CHECK-8M-BE-NEXT: mov r3, r0476; CHECK-8M-BE-NEXT: mov r4, r0477; CHECK-8M-BE-NEXT: mov r5, r0478; CHECK-8M-BE-NEXT: mov r6, r0479; CHECK-8M-BE-NEXT: mov r7, r0480; CHECK-8M-BE-NEXT: mov r8, r0481; CHECK-8M-BE-NEXT: mov r9, r0482; CHECK-8M-BE-NEXT: mov r10, r0483; CHECK-8M-BE-NEXT: msr apsr_nzcvqg, r0484; CHECK-8M-BE-NEXT: blxns r0485; CHECK-8M-BE-NEXT: vmov r11, r12, d0486; CHECK-8M-BE-NEXT: vlldm sp, {d0 - d15}487; CHECK-8M-BE-NEXT: vmov d0, r11, r12488; CHECK-8M-BE-NEXT: add sp, #136489; CHECK-8M-BE-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}490; CHECK-8M-BE-NEXT: pop {r7, pc}491; CHECK-8M-BE-NEXT: .p2align 3492; CHECK-8M-BE-NEXT: @ %bb.1:493; CHECK-8M-BE-NEXT: .LCPI5_0:494; CHECK-8M-BE-NEXT: .long 1076101120 @ double 10495; CHECK-8M-BE-NEXT: .long 0496;497; CHECK-81M-LE-LABEL: d3:498; CHECK-81M-LE: @ %bb.0: @ %entry499; CHECK-81M-LE-NEXT: push {r7, lr}500; CHECK-81M-LE-NEXT: vldr d0, .LCPI5_0501; CHECK-81M-LE-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}502; CHECK-81M-LE-NEXT: bic r0, r0, #1503; CHECK-81M-LE-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}504; CHECK-81M-LE-NEXT: vscclrm {s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31, vpr}505; CHECK-81M-LE-NEXT: vstr fpcxts, [sp, #-8]!506; CHECK-81M-LE-NEXT: clrm {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, apsr}507; CHECK-81M-LE-NEXT: blxns r0508; CHECK-81M-LE-NEXT: vldr fpcxts, [sp], #8509; CHECK-81M-LE-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}510; CHECK-81M-LE-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}511; CHECK-81M-LE-NEXT: pop {r7, pc}512; CHECK-81M-LE-NEXT: .p2align 3513; CHECK-81M-LE-NEXT: @ %bb.1:514; CHECK-81M-LE-NEXT: .LCPI5_0:515; CHECK-81M-LE-NEXT: .long 0 @ double 10516; CHECK-81M-LE-NEXT: .long 1076101120517;518; CHECK-81M-BE-LABEL: d3:519; CHECK-81M-BE: @ %bb.0: @ %entry520; CHECK-81M-BE-NEXT: push {r7, lr}521; CHECK-81M-BE-NEXT: vldr d0, .LCPI5_0522; CHECK-81M-BE-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}523; CHECK-81M-BE-NEXT: bic r0, r0, #1524; CHECK-81M-BE-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}525; CHECK-81M-BE-NEXT: vscclrm {s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31, vpr}526; CHECK-81M-BE-NEXT: vstr fpcxts, [sp, #-8]!527; CHECK-81M-BE-NEXT: clrm {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, apsr}528; CHECK-81M-BE-NEXT: blxns r0529; CHECK-81M-BE-NEXT: vldr fpcxts, [sp], #8530; CHECK-81M-BE-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}531; CHECK-81M-BE-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}532; CHECK-81M-BE-NEXT: pop {r7, pc}533; CHECK-81M-BE-NEXT: .p2align 3534; CHECK-81M-BE-NEXT: @ %bb.1:535; CHECK-81M-BE-NEXT: .LCPI5_0:536; CHECK-81M-BE-NEXT: .long 1076101120 @ double 10537; CHECK-81M-BE-NEXT: .long 0538entry:539 %call = tail call double %fptr(double 10.0) #5540 ret double %call541}542 543define float @f4(ptr nocapture %fptr) #6 {544; CHECK-8M-LABEL: f4:545; CHECK-8M: @ %bb.0: @ %entry546; CHECK-8M-NEXT: push {r7, lr}547; CHECK-8M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}548; CHECK-8M-NEXT: bic r0, r0, #1549; CHECK-8M-NEXT: sub sp, #136550; CHECK-8M-NEXT: vmov.f32 s0, s0551; CHECK-8M-NEXT: mov r1, r0552; CHECK-8M-NEXT: vlstm sp, {d0 - d15}553; CHECK-8M-NEXT: mov r2, r0554; CHECK-8M-NEXT: mov r3, r0555; CHECK-8M-NEXT: mov r4, r0556; CHECK-8M-NEXT: mov r5, r0557; CHECK-8M-NEXT: mov r6, r0558; CHECK-8M-NEXT: mov r7, r0559; CHECK-8M-NEXT: mov r8, r0560; CHECK-8M-NEXT: mov r9, r0561; CHECK-8M-NEXT: mov r10, r0562; CHECK-8M-NEXT: mov r11, r0563; CHECK-8M-NEXT: mov r12, r0564; CHECK-8M-NEXT: msr apsr_nzcvqg, r0565; CHECK-8M-NEXT: blxns r0566; CHECK-8M-NEXT: vmov r12, s0567; CHECK-8M-NEXT: vlldm sp, {d0 - d15}568; CHECK-8M-NEXT: vmov s0, r12569; CHECK-8M-NEXT: add sp, #136570; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}571; CHECK-8M-NEXT: pop {r7, pc}572;573; CHECK-81M-LABEL: f4:574; CHECK-81M: @ %bb.0: @ %entry575; CHECK-81M-NEXT: push {r7, lr}576; CHECK-81M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}577; CHECK-81M-NEXT: bic r0, r0, #1578; CHECK-81M-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}579; CHECK-81M-NEXT: vscclrm {s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31, vpr}580; CHECK-81M-NEXT: vstr fpcxts, [sp, #-8]!581; CHECK-81M-NEXT: clrm {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, apsr}582; CHECK-81M-NEXT: blxns r0583; CHECK-81M-NEXT: vldr fpcxts, [sp], #8584; CHECK-81M-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}585; CHECK-81M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}586; CHECK-81M-NEXT: pop {r7, pc}587entry:588 %call = call float %fptr() #7589 ret float %call590}591 592attributes #6 = { nounwind }593attributes #7 = { "cmse_nonsecure_call" nounwind }594 595define double @d4(ptr nocapture %fptr) #6 {596; CHECK-8M-LABEL: d4:597; CHECK-8M: @ %bb.0: @ %entry598; CHECK-8M-NEXT: push {r7, lr}599; CHECK-8M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}600; CHECK-8M-NEXT: bic r0, r0, #1601; CHECK-8M-NEXT: sub sp, #136602; CHECK-8M-NEXT: vmov.f32 s0, s0603; CHECK-8M-NEXT: mov r1, r0604; CHECK-8M-NEXT: vlstm sp, {d0 - d15}605; CHECK-8M-NEXT: mov r2, r0606; CHECK-8M-NEXT: mov r3, r0607; CHECK-8M-NEXT: mov r4, r0608; CHECK-8M-NEXT: mov r5, r0609; CHECK-8M-NEXT: mov r6, r0610; CHECK-8M-NEXT: mov r7, r0611; CHECK-8M-NEXT: mov r8, r0612; CHECK-8M-NEXT: mov r9, r0613; CHECK-8M-NEXT: mov r10, r0614; CHECK-8M-NEXT: mov r11, r0615; CHECK-8M-NEXT: mov r12, r0616; CHECK-8M-NEXT: msr apsr_nzcvqg, r0617; CHECK-8M-NEXT: blxns r0618; CHECK-8M-NEXT: vmov r11, r12, d0619; CHECK-8M-NEXT: vlldm sp, {d0 - d15}620; CHECK-8M-NEXT: vmov d0, r11, r12621; CHECK-8M-NEXT: add sp, #136622; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}623; CHECK-8M-NEXT: pop {r7, pc}624;625; CHECK-81M-LABEL: d4:626; CHECK-81M: @ %bb.0: @ %entry627; CHECK-81M-NEXT: push {r7, lr}628; CHECK-81M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}629; CHECK-81M-NEXT: bic r0, r0, #1630; CHECK-81M-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}631; CHECK-81M-NEXT: vscclrm {s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31, vpr}632; CHECK-81M-NEXT: vstr fpcxts, [sp, #-8]!633; CHECK-81M-NEXT: clrm {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, apsr}634; CHECK-81M-NEXT: blxns r0635; CHECK-81M-NEXT: vldr fpcxts, [sp], #8636; CHECK-81M-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}637; CHECK-81M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}638; CHECK-81M-NEXT: pop {r7, pc}639entry:640 %call = call double %fptr() #7641 ret double %call642}643 644define void @fd(ptr %f, float %a, double %b) #8 {645; CHECK-8M-LABEL: fd:646; CHECK-8M: @ %bb.0: @ %entry647; CHECK-8M-NEXT: push {r7, lr}648; CHECK-8M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}649; CHECK-8M-NEXT: bic r0, r0, #1650; CHECK-8M-NEXT: sub sp, #136651; CHECK-8M-NEXT: vmov r12, s0652; CHECK-8M-NEXT: mov r2, r0653; CHECK-8M-NEXT: vmov r10, r11, d1654; CHECK-8M-NEXT: vlstm sp, {d0 - d15}655; CHECK-8M-NEXT: vmov s0, r12656; CHECK-8M-NEXT: vmov d1, r10, r11657; CHECK-8M-NEXT: ldr r1, [sp, #64]658; CHECK-8M-NEXT: bic r1, r1, #159659; CHECK-8M-NEXT: bic r1, r1, #4026531840660; CHECK-8M-NEXT: vmsr fpscr, r1661; CHECK-8M-NEXT: mov r1, r0662; CHECK-8M-NEXT: mov r3, r0663; CHECK-8M-NEXT: mov r4, r0664; CHECK-8M-NEXT: mov r5, r0665; CHECK-8M-NEXT: mov r6, r0666; CHECK-8M-NEXT: mov r7, r0667; CHECK-8M-NEXT: mov r8, r0668; CHECK-8M-NEXT: mov r9, r0669; CHECK-8M-NEXT: msr apsr_nzcvqg, r0670; CHECK-8M-NEXT: blxns r0671; CHECK-8M-NEXT: vlldm sp, {d0 - d15}672; CHECK-8M-NEXT: add sp, #136673; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}674; CHECK-8M-NEXT: pop {r7, pc}675;676; CHECK-81M-LABEL: fd:677; CHECK-81M: @ %bb.0: @ %entry678; CHECK-81M-NEXT: push {r7, lr}679; CHECK-81M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}680; CHECK-81M-NEXT: bic r0, r0, #1681; CHECK-81M-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}682; CHECK-81M-NEXT: vscclrm {s1, vpr}683; CHECK-81M-NEXT: vscclrm {s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31, vpr}684; CHECK-81M-NEXT: vstr fpcxts, [sp, #-8]!685; CHECK-81M-NEXT: clrm {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, apsr}686; CHECK-81M-NEXT: blxns r0687; CHECK-81M-NEXT: vldr fpcxts, [sp], #8688; CHECK-81M-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}689; CHECK-81M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}690; CHECK-81M-NEXT: pop {r7, pc}691entry:692 call void %f(float %a, double %b) #9693 ret void694}695 696attributes #8 = { nounwind }697attributes #9 = { "cmse_nonsecure_call" nounwind }698 699define void @fdff(ptr %f, float %a, double %b, float %c, float %d) #8 {700; CHECK-8M-LABEL: fdff:701; CHECK-8M: @ %bb.0: @ %entry702; CHECK-8M-NEXT: push {r7, lr}703; CHECK-8M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}704; CHECK-8M-NEXT: bic r0, r0, #1705; CHECK-8M-NEXT: sub sp, #136706; CHECK-8M-NEXT: vmov r12, s0707; CHECK-8M-NEXT: mov r2, r0708; CHECK-8M-NEXT: vmov r10, r11, d1709; CHECK-8M-NEXT: mov r3, r0710; CHECK-8M-NEXT: vmov r9, s1711; CHECK-8M-NEXT: mov r4, r0712; CHECK-8M-NEXT: vmov r8, s4713; CHECK-8M-NEXT: vlstm sp, {d0 - d15}714; CHECK-8M-NEXT: vmov s0, r12715; CHECK-8M-NEXT: vmov d1, r10, r11716; CHECK-8M-NEXT: vmov s1, r9717; CHECK-8M-NEXT: vmov s4, r8718; CHECK-8M-NEXT: ldr r1, [sp, #64]719; CHECK-8M-NEXT: bic r1, r1, #159720; CHECK-8M-NEXT: bic r1, r1, #4026531840721; CHECK-8M-NEXT: vmsr fpscr, r1722; CHECK-8M-NEXT: mov r1, r0723; CHECK-8M-NEXT: mov r5, r0724; CHECK-8M-NEXT: mov r6, r0725; CHECK-8M-NEXT: mov r7, r0726; CHECK-8M-NEXT: msr apsr_nzcvqg, r0727; CHECK-8M-NEXT: blxns r0728; CHECK-8M-NEXT: vlldm sp, {d0 - d15}729; CHECK-8M-NEXT: add sp, #136730; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}731; CHECK-8M-NEXT: pop {r7, pc}732;733; CHECK-81M-LABEL: fdff:734; CHECK-81M: @ %bb.0: @ %entry735; CHECK-81M-NEXT: push {r7, lr}736; CHECK-81M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}737; CHECK-81M-NEXT: bic r0, r0, #1738; CHECK-81M-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}739; CHECK-81M-NEXT: vscclrm {s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31, vpr}740; CHECK-81M-NEXT: vstr fpcxts, [sp, #-8]!741; CHECK-81M-NEXT: clrm {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, apsr}742; CHECK-81M-NEXT: blxns r0743; CHECK-81M-NEXT: vldr fpcxts, [sp], #8744; CHECK-81M-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}745; CHECK-81M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}746; CHECK-81M-NEXT: pop {r7, pc}747entry:748 call void %f(float %a, double %b, float %c, float %d) #9749 ret void750}751 752define void @fidififid(ptr %fu, float %a, i32 %b, double %c, i32 %d, float %e, i32 %f, float %g, i32 %h, double %i) #8 {753; CHECK-8M-LABEL: fidififid:754; CHECK-8M: @ %bb.0: @ %entry755; CHECK-8M-NEXT: push {r7, lr}756; CHECK-8M-NEXT: mov lr, r3757; CHECK-8M-NEXT: mov r12, r0758; CHECK-8M-NEXT: mov r0, r1759; CHECK-8M-NEXT: mov r1, r2760; CHECK-8M-NEXT: ldr r3, [sp, #8]761; CHECK-8M-NEXT: mov r2, lr762; CHECK-8M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}763; CHECK-8M-NEXT: bic r12, r12, #1764; CHECK-8M-NEXT: sub sp, #136765; CHECK-8M-NEXT: vmov r11, s0766; CHECK-8M-NEXT: vmov r9, r10, d1767; CHECK-8M-NEXT: vmov r8, s1768; CHECK-8M-NEXT: vmov r7, s4769; CHECK-8M-NEXT: vmov r5, r6, d3770; CHECK-8M-NEXT: vlstm sp, {d0 - d15}771; CHECK-8M-NEXT: vmov s0, r11772; CHECK-8M-NEXT: vmov d1, r9, r10773; CHECK-8M-NEXT: vmov s1, r8774; CHECK-8M-NEXT: vmov s4, r7775; CHECK-8M-NEXT: vmov d3, r5, r6776; CHECK-8M-NEXT: ldr r4, [sp, #64]777; CHECK-8M-NEXT: bic r4, r4, #159778; CHECK-8M-NEXT: bic r4, r4, #4026531840779; CHECK-8M-NEXT: vmsr fpscr, r4780; CHECK-8M-NEXT: mov r4, r12781; CHECK-8M-NEXT: msr apsr_nzcvqg, r12782; CHECK-8M-NEXT: blxns r12783; CHECK-8M-NEXT: vlldm sp, {d0 - d15}784; CHECK-8M-NEXT: add sp, #136785; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}786; CHECK-8M-NEXT: pop {r7, pc}787;788; CHECK-81M-LABEL: fidififid:789; CHECK-81M: @ %bb.0: @ %entry790; CHECK-81M-NEXT: push {r7, lr}791; CHECK-81M-NEXT: mov lr, r3792; CHECK-81M-NEXT: mov r12, r0793; CHECK-81M-NEXT: mov r0, r1794; CHECK-81M-NEXT: mov r1, r2795; CHECK-81M-NEXT: ldr r3, [sp, #8]796; CHECK-81M-NEXT: mov r2, lr797; CHECK-81M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}798; CHECK-81M-NEXT: bic r12, r12, #1799; CHECK-81M-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}800; CHECK-81M-NEXT: vscclrm {s5, vpr}801; CHECK-81M-NEXT: vscclrm {s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31, vpr}802; CHECK-81M-NEXT: vstr fpcxts, [sp, #-8]!803; CHECK-81M-NEXT: clrm {r4, r5, r6, r7, r8, r9, r10, r11, apsr}804; CHECK-81M-NEXT: blxns r12805; CHECK-81M-NEXT: vldr fpcxts, [sp], #8806; CHECK-81M-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}807; CHECK-81M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}808; CHECK-81M-NEXT: pop {r7, pc}809entry:810 call void %fu(float %a, i32 %b, double %c, i32 %d, float %e, i32 %f, float %g, i32 %h, double %i) #9811 ret void812}813 814define half @h1(ptr nocapture %hptr) "cmse_nonsecure_entry" nounwind {815; CHECK-8M-LABEL: h1:816; CHECK-8M: @ %bb.0:817; CHECK-8M-NEXT: push {r7, lr}818; CHECK-8M-NEXT: vldr s0, .LCPI11_0819; CHECK-8M-NEXT: blx r0820; CHECK-8M-NEXT: vmov r0, s0821; CHECK-8M-NEXT: uxth r0, r0822; CHECK-8M-NEXT: vmov s0, r0823; CHECK-8M-NEXT: pop.w {r7, lr}824; CHECK-8M-NEXT: mrs r12, control825; CHECK-8M-NEXT: tst.w r12, #8826; CHECK-8M-NEXT: beq .LBB11_2827; CHECK-8M-NEXT: @ %bb.1:828; CHECK-8M-NEXT: vmrs r12, fpscr829; CHECK-8M-NEXT: vmov s1, lr830; CHECK-8M-NEXT: vmov d1, lr, lr831; CHECK-8M-NEXT: vmov d2, lr, lr832; CHECK-8M-NEXT: vmov d3, lr, lr833; CHECK-8M-NEXT: vmov d4, lr, lr834; CHECK-8M-NEXT: vmov d5, lr, lr835; CHECK-8M-NEXT: vmov d6, lr, lr836; CHECK-8M-NEXT: vmov d7, lr, lr837; CHECK-8M-NEXT: bic r12, r12, #159838; CHECK-8M-NEXT: bic r12, r12, #4026531840839; CHECK-8M-NEXT: vmsr fpscr, r12840; CHECK-8M-NEXT: .LBB11_2:841; CHECK-8M-NEXT: mov r0, lr842; CHECK-8M-NEXT: mov r1, lr843; CHECK-8M-NEXT: mov r2, lr844; CHECK-8M-NEXT: mov r3, lr845; CHECK-8M-NEXT: mov r12, lr846; CHECK-8M-NEXT: msr apsr_nzcvqg, lr847; CHECK-8M-NEXT: bxns lr848; CHECK-8M-NEXT: .p2align 2849; CHECK-8M-NEXT: @ %bb.3:850; CHECK-8M-NEXT: .LCPI11_0:851; CHECK-8M-NEXT: .long 0x00004900 @ float 2.61874657E-41852;853; CHECK-NO-MVE-LABEL: h1:854; CHECK-NO-MVE: @ %bb.0:855; CHECK-NO-MVE-NEXT: vstr fpcxtns, [sp, #-4]!856; CHECK-NO-MVE-NEXT: push {r7, lr}857; CHECK-NO-MVE-NEXT: sub sp, #4858; CHECK-NO-MVE-NEXT: vldr s0, .LCPI11_0859; CHECK-NO-MVE-NEXT: blx r0860; CHECK-NO-MVE-NEXT: vmov r0, s0861; CHECK-NO-MVE-NEXT: uxth r0, r0862; CHECK-NO-MVE-NEXT: vmov s0, r0863; CHECK-NO-MVE-NEXT: add sp, #4864; CHECK-NO-MVE-NEXT: pop.w {r7, lr}865; CHECK-NO-MVE-NEXT: vscclrm {s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, vpr}866; CHECK-NO-MVE-NEXT: vldr fpcxtns, [sp], #4867; CHECK-NO-MVE-NEXT: clrm {r0, r1, r2, r3, r12, apsr}868; CHECK-NO-MVE-NEXT: bxns lr869; CHECK-NO-MVE-NEXT: .p2align 2870; CHECK-NO-MVE-NEXT: @ %bb.1:871; CHECK-NO-MVE-NEXT: .LCPI11_0:872; CHECK-NO-MVE-NEXT: .long 0x00004900 @ float 2.61874657E-41873;874; CHECK-MVE-LABEL: h1:875; CHECK-MVE: @ %bb.0:876; CHECK-MVE-NEXT: vstr fpcxtns, [sp, #-4]!877; CHECK-MVE-NEXT: push {r7, lr}878; CHECK-MVE-NEXT: sub sp, #4879; CHECK-MVE-NEXT: vmov.f16 s0, #1.000000e+01880; CHECK-MVE-NEXT: blx r0881; CHECK-MVE-NEXT: vmov.f16 r0, s0882; CHECK-MVE-NEXT: vmov s0, r0883; CHECK-MVE-NEXT: add sp, #4884; CHECK-MVE-NEXT: pop.w {r7, lr}885; CHECK-MVE-NEXT: vscclrm {s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, vpr}886; CHECK-MVE-NEXT: vldr fpcxtns, [sp], #4887; CHECK-MVE-NEXT: clrm {r0, r1, r2, r3, r12, apsr}888; CHECK-MVE-NEXT: bxns lr889 %call = call half %hptr(half 10.0) nounwind890 ret half %call891}892 893define half @h2(ptr nocapture %hptr) nounwind {894; CHECK-8M-LABEL: h2:895; CHECK-8M: @ %bb.0: @ %entry896; CHECK-8M-NEXT: push {r7, lr}897; CHECK-8M-NEXT: vldr s0, .LCPI12_0898; CHECK-8M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}899; CHECK-8M-NEXT: bic r0, r0, #1900; CHECK-8M-NEXT: sub sp, #136901; CHECK-8M-NEXT: vmov r12, s0902; CHECK-8M-NEXT: vlstm sp, {d0 - d15}903; CHECK-8M-NEXT: vmov s0, r12904; CHECK-8M-NEXT: ldr r1, [sp, #64]905; CHECK-8M-NEXT: bic r1, r1, #159906; CHECK-8M-NEXT: bic r1, r1, #4026531840907; CHECK-8M-NEXT: vmsr fpscr, r1908; CHECK-8M-NEXT: mov r1, r0909; CHECK-8M-NEXT: mov r2, r0910; CHECK-8M-NEXT: mov r3, r0911; CHECK-8M-NEXT: mov r4, r0912; CHECK-8M-NEXT: mov r5, r0913; CHECK-8M-NEXT: mov r6, r0914; CHECK-8M-NEXT: mov r7, r0915; CHECK-8M-NEXT: mov r8, r0916; CHECK-8M-NEXT: mov r9, r0917; CHECK-8M-NEXT: mov r10, r0918; CHECK-8M-NEXT: mov r11, r0919; CHECK-8M-NEXT: msr apsr_nzcvqg, r0920; CHECK-8M-NEXT: blxns r0921; CHECK-8M-NEXT: vmov r12, s0922; CHECK-8M-NEXT: vlldm sp, {d0 - d15}923; CHECK-8M-NEXT: vmov s0, r12924; CHECK-8M-NEXT: add sp, #136925; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}926; CHECK-8M-NEXT: pop {r7, pc}927; CHECK-8M-NEXT: .p2align 2928; CHECK-8M-NEXT: @ %bb.1:929; CHECK-8M-NEXT: .LCPI12_0:930; CHECK-8M-NEXT: .long 0x00004900 @ float 2.61874657E-41931;932; CHECK-NO-MVE-LABEL: h2:933; CHECK-NO-MVE: @ %bb.0: @ %entry934; CHECK-NO-MVE-NEXT: push {r7, lr}935; CHECK-NO-MVE-NEXT: vldr s0, .LCPI12_0936; CHECK-NO-MVE-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}937; CHECK-NO-MVE-NEXT: bic r0, r0, #1938; CHECK-NO-MVE-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}939; CHECK-NO-MVE-NEXT: vscclrm {s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31, vpr}940; CHECK-NO-MVE-NEXT: vstr fpcxts, [sp, #-8]!941; CHECK-NO-MVE-NEXT: clrm {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, apsr}942; CHECK-NO-MVE-NEXT: blxns r0943; CHECK-NO-MVE-NEXT: vldr fpcxts, [sp], #8944; CHECK-NO-MVE-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}945; CHECK-NO-MVE-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}946; CHECK-NO-MVE-NEXT: pop {r7, pc}947; CHECK-NO-MVE-NEXT: .p2align 2948; CHECK-NO-MVE-NEXT: @ %bb.1:949; CHECK-NO-MVE-NEXT: .LCPI12_0:950; CHECK-NO-MVE-NEXT: .long 0x00004900 @ float 2.61874657E-41951;952; CHECK-MVE-LABEL: h2:953; CHECK-MVE: @ %bb.0: @ %entry954; CHECK-MVE-NEXT: push {r7, lr}955; CHECK-MVE-NEXT: vmov.f16 s0, #1.000000e+01956; CHECK-MVE-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}957; CHECK-MVE-NEXT: bic r0, r0, #1958; CHECK-MVE-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}959; CHECK-MVE-NEXT: vscclrm {s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31, vpr}960; CHECK-MVE-NEXT: vstr fpcxts, [sp, #-8]!961; CHECK-MVE-NEXT: clrm {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, apsr}962; CHECK-MVE-NEXT: blxns r0963; CHECK-MVE-NEXT: vldr fpcxts, [sp], #8964; CHECK-MVE-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}965; CHECK-MVE-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}966; CHECK-MVE-NEXT: pop {r7, pc}967entry:968 %call = call half %hptr(half 10.0) "cmse_nonsecure_call" nounwind969 ret half %call970}971 972define half @h3(ptr nocapture %hptr) nounwind {973; CHECK-8M-LABEL: h3:974; CHECK-8M: @ %bb.0: @ %entry975; CHECK-8M-NEXT: push {r7, lr}976; CHECK-8M-NEXT: vldr s0, .LCPI13_0977; CHECK-8M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}978; CHECK-8M-NEXT: bic r0, r0, #1979; CHECK-8M-NEXT: sub sp, #136980; CHECK-8M-NEXT: vmov r12, s0981; CHECK-8M-NEXT: vlstm sp, {d0 - d15}982; CHECK-8M-NEXT: vmov s0, r12983; CHECK-8M-NEXT: ldr r1, [sp, #64]984; CHECK-8M-NEXT: bic r1, r1, #159985; CHECK-8M-NEXT: bic r1, r1, #4026531840986; CHECK-8M-NEXT: vmsr fpscr, r1987; CHECK-8M-NEXT: mov r1, r0988; CHECK-8M-NEXT: mov r2, r0989; CHECK-8M-NEXT: mov r3, r0990; CHECK-8M-NEXT: mov r4, r0991; CHECK-8M-NEXT: mov r5, r0992; CHECK-8M-NEXT: mov r6, r0993; CHECK-8M-NEXT: mov r7, r0994; CHECK-8M-NEXT: mov r8, r0995; CHECK-8M-NEXT: mov r9, r0996; CHECK-8M-NEXT: mov r10, r0997; CHECK-8M-NEXT: mov r11, r0998; CHECK-8M-NEXT: msr apsr_nzcvqg, r0999; CHECK-8M-NEXT: blxns r01000; CHECK-8M-NEXT: vmov r12, s01001; CHECK-8M-NEXT: vlldm sp, {d0 - d15}1002; CHECK-8M-NEXT: vmov s0, r121003; CHECK-8M-NEXT: add sp, #1361004; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}1005; CHECK-8M-NEXT: pop {r7, pc}1006; CHECK-8M-NEXT: .p2align 21007; CHECK-8M-NEXT: @ %bb.1:1008; CHECK-8M-NEXT: .LCPI13_0:1009; CHECK-8M-NEXT: .long 0x00004900 @ float 2.61874657E-411010;1011; CHECK-NO-MVE-LABEL: h3:1012; CHECK-NO-MVE: @ %bb.0: @ %entry1013; CHECK-NO-MVE-NEXT: push {r7, lr}1014; CHECK-NO-MVE-NEXT: vldr s0, .LCPI13_01015; CHECK-NO-MVE-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}1016; CHECK-NO-MVE-NEXT: bic r0, r0, #11017; CHECK-NO-MVE-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}1018; CHECK-NO-MVE-NEXT: vscclrm {s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31, vpr}1019; CHECK-NO-MVE-NEXT: vstr fpcxts, [sp, #-8]!1020; CHECK-NO-MVE-NEXT: clrm {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, apsr}1021; CHECK-NO-MVE-NEXT: blxns r01022; CHECK-NO-MVE-NEXT: vldr fpcxts, [sp], #81023; CHECK-NO-MVE-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}1024; CHECK-NO-MVE-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}1025; CHECK-NO-MVE-NEXT: pop {r7, pc}1026; CHECK-NO-MVE-NEXT: .p2align 21027; CHECK-NO-MVE-NEXT: @ %bb.1:1028; CHECK-NO-MVE-NEXT: .LCPI13_0:1029; CHECK-NO-MVE-NEXT: .long 0x00004900 @ float 2.61874657E-411030;1031; CHECK-MVE-LABEL: h3:1032; CHECK-MVE: @ %bb.0: @ %entry1033; CHECK-MVE-NEXT: push {r7, lr}1034; CHECK-MVE-NEXT: vmov.f16 s0, #1.000000e+011035; CHECK-MVE-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}1036; CHECK-MVE-NEXT: bic r0, r0, #11037; CHECK-MVE-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}1038; CHECK-MVE-NEXT: vscclrm {s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31, vpr}1039; CHECK-MVE-NEXT: vstr fpcxts, [sp, #-8]!1040; CHECK-MVE-NEXT: clrm {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, apsr}1041; CHECK-MVE-NEXT: blxns r01042; CHECK-MVE-NEXT: vldr fpcxts, [sp], #81043; CHECK-MVE-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}1044; CHECK-MVE-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}1045; CHECK-MVE-NEXT: pop {r7, pc}1046entry:1047 %call = tail call half %hptr(half 10.0) "cmse_nonsecure_call" nounwind1048 ret half %call1049}1050 1051define half @h4(ptr nocapture %hptr) nounwind {1052; CHECK-8M-LABEL: h4:1053; CHECK-8M: @ %bb.0: @ %entry1054; CHECK-8M-NEXT: push {r7, lr}1055; CHECK-8M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}1056; CHECK-8M-NEXT: bic r0, r0, #11057; CHECK-8M-NEXT: sub sp, #1361058; CHECK-8M-NEXT: vmov.f32 s0, s01059; CHECK-8M-NEXT: mov r1, r01060; CHECK-8M-NEXT: vlstm sp, {d0 - d15}1061; CHECK-8M-NEXT: mov r2, r01062; CHECK-8M-NEXT: mov r3, r01063; CHECK-8M-NEXT: mov r4, r01064; CHECK-8M-NEXT: mov r5, r01065; CHECK-8M-NEXT: mov r6, r01066; CHECK-8M-NEXT: mov r7, r01067; CHECK-8M-NEXT: mov r8, r01068; CHECK-8M-NEXT: mov r9, r01069; CHECK-8M-NEXT: mov r10, r01070; CHECK-8M-NEXT: mov r11, r01071; CHECK-8M-NEXT: mov r12, r01072; CHECK-8M-NEXT: msr apsr_nzcvqg, r01073; CHECK-8M-NEXT: blxns r01074; CHECK-8M-NEXT: vmov r12, s01075; CHECK-8M-NEXT: vlldm sp, {d0 - d15}1076; CHECK-8M-NEXT: vmov s0, r121077; CHECK-8M-NEXT: add sp, #1361078; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}1079; CHECK-8M-NEXT: pop {r7, pc}1080;1081; CHECK-81M-LABEL: h4:1082; CHECK-81M: @ %bb.0: @ %entry1083; CHECK-81M-NEXT: push {r7, lr}1084; CHECK-81M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}1085; CHECK-81M-NEXT: bic r0, r0, #11086; CHECK-81M-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}1087; CHECK-81M-NEXT: vscclrm {s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31, vpr}1088; CHECK-81M-NEXT: vstr fpcxts, [sp, #-8]!1089; CHECK-81M-NEXT: clrm {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, apsr}1090; CHECK-81M-NEXT: blxns r01091; CHECK-81M-NEXT: vldr fpcxts, [sp], #81092; CHECK-81M-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}1093; CHECK-81M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}1094; CHECK-81M-NEXT: pop {r7, pc}1095entry:1096 %call = call half %hptr() "cmse_nonsecure_call" nounwind1097 ret half %call1098}1099 1100define half @h1_minsize(ptr nocapture %hptr) "cmse_nonsecure_entry" minsize nounwind {1101; CHECK-8M-LABEL: h1_minsize:1102; CHECK-8M: @ %bb.0: @ %entry1103; CHECK-8M-NEXT: push {r7, lr}1104; CHECK-8M-NEXT: vldr s0, .LCPI15_01105; CHECK-8M-NEXT: blx r01106; CHECK-8M-NEXT: vmov r0, s01107; CHECK-8M-NEXT: uxth r0, r01108; CHECK-8M-NEXT: vmov s0, r01109; CHECK-8M-NEXT: pop.w {r7, lr}1110; CHECK-8M-NEXT: vmrs r12, fpscr1111; CHECK-8M-NEXT: vmov s1, lr1112; CHECK-8M-NEXT: vmov d1, lr, lr1113; CHECK-8M-NEXT: mov r0, lr1114; CHECK-8M-NEXT: vmov d2, lr, lr1115; CHECK-8M-NEXT: mov r1, lr1116; CHECK-8M-NEXT: vmov d3, lr, lr1117; CHECK-8M-NEXT: mov r2, lr1118; CHECK-8M-NEXT: vmov d4, lr, lr1119; CHECK-8M-NEXT: mov r3, lr1120; CHECK-8M-NEXT: vmov d5, lr, lr1121; CHECK-8M-NEXT: vmov d6, lr, lr1122; CHECK-8M-NEXT: vmov d7, lr, lr1123; CHECK-8M-NEXT: bic r12, r12, #1591124; CHECK-8M-NEXT: bic r12, r12, #40265318401125; CHECK-8M-NEXT: vmsr fpscr, r121126; CHECK-8M-NEXT: mov r12, lr1127; CHECK-8M-NEXT: msr apsr_nzcvqg, lr1128; CHECK-8M-NEXT: bxns lr1129; CHECK-8M-NEXT: .p2align 21130; CHECK-8M-NEXT: @ %bb.1:1131; CHECK-8M-NEXT: .LCPI15_0:1132; CHECK-8M-NEXT: .long 0x00004900 @ float 2.61874657E-411133;1134; CHECK-NO-MVE-LABEL: h1_minsize:1135; CHECK-NO-MVE: @ %bb.0: @ %entry1136; CHECK-NO-MVE-NEXT: vstr fpcxtns, [sp, #-4]!1137; CHECK-NO-MVE-NEXT: push {r6, r7, lr}1138; CHECK-NO-MVE-NEXT: vldr s0, .LCPI15_01139; CHECK-NO-MVE-NEXT: blx r01140; CHECK-NO-MVE-NEXT: vmov r0, s01141; CHECK-NO-MVE-NEXT: uxth r0, r01142; CHECK-NO-MVE-NEXT: vmov s0, r01143; CHECK-NO-MVE-NEXT: pop.w {r3, r7, lr}1144; CHECK-NO-MVE-NEXT: vscclrm {s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, vpr}1145; CHECK-NO-MVE-NEXT: vldr fpcxtns, [sp], #41146; CHECK-NO-MVE-NEXT: clrm {r0, r1, r2, r3, r12, apsr}1147; CHECK-NO-MVE-NEXT: bxns lr1148; CHECK-NO-MVE-NEXT: .p2align 21149; CHECK-NO-MVE-NEXT: @ %bb.1:1150; CHECK-NO-MVE-NEXT: .LCPI15_0:1151; CHECK-NO-MVE-NEXT: .long 0x00004900 @ float 2.61874657E-411152;1153; CHECK-MVE-LABEL: h1_minsize:1154; CHECK-MVE: @ %bb.0: @ %entry1155; CHECK-MVE-NEXT: vstr fpcxtns, [sp, #-4]!1156; CHECK-MVE-NEXT: push {r6, r7, lr}1157; CHECK-MVE-NEXT: vmov.f16 s0, #1.000000e+011158; CHECK-MVE-NEXT: blx r01159; CHECK-MVE-NEXT: vmov.f16 r0, s01160; CHECK-MVE-NEXT: vmov s0, r01161; CHECK-MVE-NEXT: pop.w {r3, r7, lr}1162; CHECK-MVE-NEXT: vscclrm {s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, vpr}1163; CHECK-MVE-NEXT: vldr fpcxtns, [sp], #41164; CHECK-MVE-NEXT: clrm {r0, r1, r2, r3, r12, apsr}1165; CHECK-MVE-NEXT: bxns lr1166entry:1167 %call = call half %hptr(half 10.0) nounwind1168 ret half %call1169}1170 1171define half @h1_arg(ptr nocapture %hptr, half %harg) nounwind {1172; CHECK-8M-LABEL: h1_arg:1173; CHECK-8M: @ %bb.0: @ %entry1174; CHECK-8M-NEXT: push {r7, lr}1175; CHECK-8M-NEXT: vmov r1, s01176; CHECK-8M-NEXT: uxth r1, r11177; CHECK-8M-NEXT: vmov s0, r11178; CHECK-8M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}1179; CHECK-8M-NEXT: bic r0, r0, #11180; CHECK-8M-NEXT: sub sp, #1361181; CHECK-8M-NEXT: vmov r12, s01182; CHECK-8M-NEXT: vlstm sp, {d0 - d15}1183; CHECK-8M-NEXT: vmov s0, r121184; CHECK-8M-NEXT: ldr r1, [sp, #64]1185; CHECK-8M-NEXT: bic r1, r1, #1591186; CHECK-8M-NEXT: bic r1, r1, #40265318401187; CHECK-8M-NEXT: vmsr fpscr, r11188; CHECK-8M-NEXT: mov r1, r01189; CHECK-8M-NEXT: mov r2, r01190; CHECK-8M-NEXT: mov r3, r01191; CHECK-8M-NEXT: mov r4, r01192; CHECK-8M-NEXT: mov r5, r01193; CHECK-8M-NEXT: mov r6, r01194; CHECK-8M-NEXT: mov r7, r01195; CHECK-8M-NEXT: mov r8, r01196; CHECK-8M-NEXT: mov r9, r01197; CHECK-8M-NEXT: mov r10, r01198; CHECK-8M-NEXT: mov r11, r01199; CHECK-8M-NEXT: msr apsr_nzcvqg, r01200; CHECK-8M-NEXT: blxns r01201; CHECK-8M-NEXT: vmov r12, s01202; CHECK-8M-NEXT: vlldm sp, {d0 - d15}1203; CHECK-8M-NEXT: vmov s0, r121204; CHECK-8M-NEXT: add sp, #1361205; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}1206; CHECK-8M-NEXT: pop {r7, pc}1207;1208; CHECK-NO-MVE-LABEL: h1_arg:1209; CHECK-NO-MVE: @ %bb.0: @ %entry1210; CHECK-NO-MVE-NEXT: push {r7, lr}1211; CHECK-NO-MVE-NEXT: vmov r1, s01212; CHECK-NO-MVE-NEXT: uxth r1, r11213; CHECK-NO-MVE-NEXT: vmov s0, r11214; CHECK-NO-MVE-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}1215; CHECK-NO-MVE-NEXT: bic r0, r0, #11216; CHECK-NO-MVE-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}1217; CHECK-NO-MVE-NEXT: vscclrm {s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31, vpr}1218; CHECK-NO-MVE-NEXT: vstr fpcxts, [sp, #-8]!1219; CHECK-NO-MVE-NEXT: clrm {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, apsr}1220; CHECK-NO-MVE-NEXT: blxns r01221; CHECK-NO-MVE-NEXT: vldr fpcxts, [sp], #81222; CHECK-NO-MVE-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}1223; CHECK-NO-MVE-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}1224; CHECK-NO-MVE-NEXT: pop {r7, pc}1225;1226; CHECK-MVE-LABEL: h1_arg:1227; CHECK-MVE: @ %bb.0: @ %entry1228; CHECK-MVE-NEXT: push {r7, lr}1229; CHECK-MVE-NEXT: vmov.f16 r1, s01230; CHECK-MVE-NEXT: vmov s0, r11231; CHECK-MVE-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}1232; CHECK-MVE-NEXT: bic r0, r0, #11233; CHECK-MVE-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}1234; CHECK-MVE-NEXT: vscclrm {s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31, vpr}1235; CHECK-MVE-NEXT: vstr fpcxts, [sp, #-8]!1236; CHECK-MVE-NEXT: clrm {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, apsr}1237; CHECK-MVE-NEXT: blxns r01238; CHECK-MVE-NEXT: vldr fpcxts, [sp], #81239; CHECK-MVE-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}1240; CHECK-MVE-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}1241; CHECK-MVE-NEXT: pop {r7, pc}1242entry:1243 %call = call half %hptr(half %harg) "cmse_nonsecure_call" nounwind1244 ret half %call1245}1246 1247define float @float_return_undef_arg(ptr nocapture %fptr) #6 {1248; CHECK-8M-LABEL: float_return_undef_arg:1249; CHECK-8M: @ %bb.0: @ %entry1250; CHECK-8M-NEXT: push {r7, lr}1251; CHECK-8M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}1252; CHECK-8M-NEXT: bic r0, r0, #11253; CHECK-8M-NEXT: sub sp, #1361254; CHECK-8M-NEXT: vmov.f32 s0, s01255; CHECK-8M-NEXT: mov r1, r01256; CHECK-8M-NEXT: vlstm sp, {d0 - d15}1257; CHECK-8M-NEXT: mov r2, r01258; CHECK-8M-NEXT: mov r3, r01259; CHECK-8M-NEXT: mov r4, r01260; CHECK-8M-NEXT: mov r5, r01261; CHECK-8M-NEXT: mov r6, r01262; CHECK-8M-NEXT: mov r7, r01263; CHECK-8M-NEXT: mov r8, r01264; CHECK-8M-NEXT: mov r9, r01265; CHECK-8M-NEXT: mov r10, r01266; CHECK-8M-NEXT: mov r11, r01267; CHECK-8M-NEXT: mov r12, r01268; CHECK-8M-NEXT: msr apsr_nzcvqg, r01269; CHECK-8M-NEXT: blxns r01270; CHECK-8M-NEXT: vmov r12, s01271; CHECK-8M-NEXT: vlldm sp, {d0 - d15}1272; CHECK-8M-NEXT: vmov s0, r121273; CHECK-8M-NEXT: add sp, #1361274; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}1275; CHECK-8M-NEXT: pop {r7, pc}1276;1277; CHECK-81M-LABEL: float_return_undef_arg:1278; CHECK-81M: @ %bb.0: @ %entry1279; CHECK-81M-NEXT: push {r7, lr}1280; CHECK-81M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}1281; CHECK-81M-NEXT: bic r0, r0, #11282; CHECK-81M-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}1283; CHECK-81M-NEXT: vscclrm {s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31, vpr}1284; CHECK-81M-NEXT: vstr fpcxts, [sp, #-8]!1285; CHECK-81M-NEXT: clrm {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, apsr}1286; CHECK-81M-NEXT: blxns r01287; CHECK-81M-NEXT: vldr fpcxts, [sp], #81288; CHECK-81M-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}1289; CHECK-81M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}1290; CHECK-81M-NEXT: pop {r7, pc}1291entry:1292 %call = call float %fptr(i32 undef) #71293 ret float %call1294}1295 1296define float @float_return_poison_arg(ptr nocapture %fptr) #6 {1297; CHECK-8M-LABEL: float_return_poison_arg:1298; CHECK-8M: @ %bb.0: @ %entry1299; CHECK-8M-NEXT: push {r7, lr}1300; CHECK-8M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}1301; CHECK-8M-NEXT: bic r0, r0, #11302; CHECK-8M-NEXT: sub sp, #1361303; CHECK-8M-NEXT: vmov.f32 s0, s01304; CHECK-8M-NEXT: mov r1, r01305; CHECK-8M-NEXT: vlstm sp, {d0 - d15}1306; CHECK-8M-NEXT: mov r2, r01307; CHECK-8M-NEXT: mov r3, r01308; CHECK-8M-NEXT: mov r4, r01309; CHECK-8M-NEXT: mov r5, r01310; CHECK-8M-NEXT: mov r6, r01311; CHECK-8M-NEXT: mov r7, r01312; CHECK-8M-NEXT: mov r8, r01313; CHECK-8M-NEXT: mov r9, r01314; CHECK-8M-NEXT: mov r10, r01315; CHECK-8M-NEXT: mov r11, r01316; CHECK-8M-NEXT: mov r12, r01317; CHECK-8M-NEXT: msr apsr_nzcvqg, r01318; CHECK-8M-NEXT: blxns r01319; CHECK-8M-NEXT: vmov r12, s01320; CHECK-8M-NEXT: vlldm sp, {d0 - d15}1321; CHECK-8M-NEXT: vmov s0, r121322; CHECK-8M-NEXT: add sp, #1361323; CHECK-8M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}1324; CHECK-8M-NEXT: pop {r7, pc}1325;1326; CHECK-81M-LABEL: float_return_poison_arg:1327; CHECK-81M: @ %bb.0: @ %entry1328; CHECK-81M-NEXT: push {r7, lr}1329; CHECK-81M-NEXT: push.w {r4, r5, r6, r7, r8, r9, r10, r11}1330; CHECK-81M-NEXT: bic r0, r0, #11331; CHECK-81M-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}1332; CHECK-81M-NEXT: vscclrm {s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31, vpr}1333; CHECK-81M-NEXT: vstr fpcxts, [sp, #-8]!1334; CHECK-81M-NEXT: clrm {r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, apsr}1335; CHECK-81M-NEXT: blxns r01336; CHECK-81M-NEXT: vldr fpcxts, [sp], #81337; CHECK-81M-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}1338; CHECK-81M-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11}1339; CHECK-81M-NEXT: pop {r7, pc}1340entry:1341 %call = call float %fptr(i32 poison) #71342 ret float %call1343}1344