113 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=thumbv7m-none-eabi -mattr=v7 | FileCheck %s --check-prefixes=CHECK3 4declare i16 @llvm.bswap.i16(i16) readnone5declare i32 @llvm.bswap.i32(i32) readnone6declare i32 @llvm.bitreverse.i32(i32) readnone7 8define i32 @brev_and_lhs_brev32(i32 %a, i32 %b) #0 {9; CHECK-LABEL: brev_and_lhs_brev32:10; CHECK: @ %bb.0:11; CHECK-NEXT: rbit r0, r012; CHECK-NEXT: ands r0, r113; CHECK-NEXT: rbit r0, r014; CHECK-NEXT: bx lr15 %1 = tail call i32 @llvm.bitreverse.i32(i32 %a)16 %2 = and i32 %1, %b17 %3 = tail call i32 @llvm.bitreverse.i32(i32 %2)18 ret i32 %319}20 21define i32 @brev_or_lhs_brev32(i32 %a, i32 %b) #0 {22; CHECK-LABEL: brev_or_lhs_brev32:23; CHECK: @ %bb.0:24; CHECK-NEXT: rbit r0, r025; CHECK-NEXT: orrs r0, r126; CHECK-NEXT: rbit r0, r027; CHECK-NEXT: bx lr28 %1 = tail call i32 @llvm.bitreverse.i32(i32 %a)29 %2 = or i32 %1, %b30 %3 = tail call i32 @llvm.bitreverse.i32(i32 %2)31 ret i32 %332}33 34define i32 @brev_xor_rhs_brev32(i32 %a, i32 %b) #0 {35; CHECK-LABEL: brev_xor_rhs_brev32:36; CHECK: @ %bb.0:37; CHECK-NEXT: rbit r1, r138; CHECK-NEXT: eors r0, r139; CHECK-NEXT: rbit r0, r040; CHECK-NEXT: bx lr41 %1 = tail call i32 @llvm.bitreverse.i32(i32 %b)42 %2 = xor i32 %a, %143 %3 = tail call i32 @llvm.bitreverse.i32(i32 %2)44 ret i32 %345}46 47define i32 @brev_and_all_operand_multiuse(i32 %a, i32 %b) #0 {48; CHECK-LABEL: brev_and_all_operand_multiuse:49; CHECK: @ %bb.0:50; CHECK-NEXT: rbit r1, r151; CHECK-NEXT: rbit r0, r052; CHECK-NEXT: and.w r2, r0, r153; CHECK-NEXT: rbit r2, r254; CHECK-NEXT: muls r0, r2, r055; CHECK-NEXT: muls r0, r1, r056; CHECK-NEXT: bx lr57 %1 = tail call i32 @llvm.bitreverse.i32(i32 %a)58 %2 = tail call i32 @llvm.bitreverse.i32(i32 %b)59 %3 = and i32 %1, %260 %4 = tail call i32 @llvm.bitreverse.i32(i32 %3)61 %5 = mul i32 %1, %4 ;increase use of left bitreverse62 %6 = mul i32 %2, %5 ;increase use of right bitreverse63 64 ret i32 %665}66 67; negative test68define i32 @brev_and_rhs_brev32_multiuse1(i32 %a, i32 %b) #0 {69; CHECK-LABEL: brev_and_rhs_brev32_multiuse1:70; CHECK: @ %bb.0:71; CHECK-NEXT: rbit r1, r172; CHECK-NEXT: ands r0, r173; CHECK-NEXT: rbit r1, r074; CHECK-NEXT: muls r0, r1, r075; CHECK-NEXT: bx lr76 %1 = tail call i32 @llvm.bitreverse.i32(i32 %b)77 %2 = and i32 %1, %a78 %3 = tail call i32 @llvm.bitreverse.i32(i32 %2)79 %4 = mul i32 %2, %3 ;increase use of logical op80 ret i32 %481}82 83; negative test84define i32 @brev_and_rhs_brev32_multiuse2(i32 %a, i32 %b) #0 {85; CHECK-LABEL: brev_and_rhs_brev32_multiuse2:86; CHECK: @ %bb.0:87; CHECK-NEXT: rbit r1, r188; CHECK-NEXT: ands r0, r189; CHECK-NEXT: rbit r0, r090; CHECK-NEXT: muls r0, r1, r091; CHECK-NEXT: bx lr92 %1 = tail call i32 @llvm.bitreverse.i32(i32 %b)93 %2 = and i32 %1, %a94 %3 = tail call i32 @llvm.bitreverse.i32(i32 %2)95 %4 = mul i32 %1, %3 ;increase use of inner bitreverse96 ret i32 %497}98 99; negative test100define i32 @brev_xor_rhs_bs32(i32 %a, i32 %b) #0 {101; CHECK-LABEL: brev_xor_rhs_bs32:102; CHECK: @ %bb.0:103; CHECK-NEXT: rev r1, r1104; CHECK-NEXT: eors r0, r1105; CHECK-NEXT: rbit r0, r0106; CHECK-NEXT: bx lr107 %1 = tail call i32 @llvm.bswap.i32(i32 %b)108 %2 = xor i32 %a, %1109 %3 = tail call i32 @llvm.bitreverse.i32(i32 %2)110 ret i32 %3111}112 113