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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=armv7-unknown-linux < %s -stop-before=finalize-isel | FileCheck --check-prefix=BEFORE-EXPAND %s3; RUN: llc -mtriple=armv7-unknown-linux < %s | FileCheck --check-prefix=ASSEMBLY %s4 5; Check COPY_STRUCT_BYVAL_I32 has CPSR as operand.6; BEFORE-EXPAND: COPY_STRUCT_BYVAL_I32 {{.*}} implicit-def dead $cpsr7; BEFORE-EXPAND: COPY_STRUCT_BYVAL_I32 {{.*}} implicit-def dead $cpsr8 9%struct.anon = type { i32, i32, i32, i32, i32, i32, i32, %struct.f, i32, i64, i32 }10%struct.f = type { i32, i32, i32, i32, i32 }11 12define arm_aapcscc void @s(ptr %q, ptr %p) {13; ASSEMBLY-LABEL: s:14; ASSEMBLY: @ %bb.0: @ %entry15; ASSEMBLY-NEXT: push {r4, r5, r11, lr}16; ASSEMBLY-NEXT: sub sp, sp, #13617; ASSEMBLY-NEXT: ldrd r4, r5, [r0]18; ASSEMBLY-NEXT: add lr, sp, #5619; ASSEMBLY-NEXT: ldm r1, {r0, r12}20; ASSEMBLY-NEXT: subs r4, r4, #121; ASSEMBLY-NEXT: sbc r5, r5, #022; ASSEMBLY-NEXT: ldr r2, [r1, #8]23; ASSEMBLY-NEXT: ldr r3, [r1, #12]24; ASSEMBLY-NEXT: strd r4, r5, [sp, #128]25; ASSEMBLY-NEXT: add r5, r1, #1626; ASSEMBLY-NEXT: mov r4, sp27; ASSEMBLY-NEXT: vld1.32 {d16}, [r5]!28; ASSEMBLY-NEXT: vst1.32 {d16}, [r4]!29; ASSEMBLY-NEXT: vld1.32 {d16}, [r5]!30; ASSEMBLY-NEXT: vst1.32 {d16}, [r4]!31; ASSEMBLY-NEXT: vld1.32 {d16}, [r5]!32; ASSEMBLY-NEXT: vst1.32 {d16}, [r4]!33; ASSEMBLY-NEXT: vld1.32 {d16}, [r5]!34; ASSEMBLY-NEXT: vst1.32 {d16}, [r4]!35; ASSEMBLY-NEXT: vld1.32 {d16}, [r5]!36; ASSEMBLY-NEXT: vst1.32 {d16}, [r4]!37; ASSEMBLY-NEXT: vld1.32 {d16}, [r5]!38; ASSEMBLY-NEXT: vst1.32 {d16}, [r4]!39; ASSEMBLY-NEXT: vld1.32 {d16}, [r5]!40; ASSEMBLY-NEXT: vst1.32 {d16}, [r4]!41; ASSEMBLY-NEXT: movw r4, #7242; ASSEMBLY-NEXT: .LBB0_1: @ %entry43; ASSEMBLY-NEXT: @ =>This Inner Loop Header: Depth=144; ASSEMBLY-NEXT: vld1.32 {d16}, [r1]!45; ASSEMBLY-NEXT: subs r4, r4, #846; ASSEMBLY-NEXT: vst1.32 {d16}, [lr]!47; ASSEMBLY-NEXT: bne .LBB0_148; ASSEMBLY-NEXT: @ %bb.2: @ %entry49; ASSEMBLY-NEXT: mov r1, r1250; ASSEMBLY-NEXT: bl r51; ASSEMBLY-NEXT: add sp, sp, #13652; ASSEMBLY-NEXT: pop {r4, r5, r11, pc}53entry:54 %0 = load i64, ptr %q, align 855 %sub = add nsw i64 %0, -156 tail call arm_aapcscc void @r(ptr byval(%struct.anon) nonnull align 8 %p, ptr byval(%struct.anon) nonnull align 8 %p, i64 %sub)57 ret void58}59 60declare arm_aapcscc void @r(...)61