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1; RUN: llc < %s -regalloc=greedy -mcpu=cortex-a8 -relocation-model=pic -frame-pointer=all -verify-machineinstrs | FileCheck %s2;3; ARM tests that crash or fail with the greedy register allocator.4 5target triple = "thumbv7-apple-darwin"6 7declare double @exp(double)8 9; CHECK: remat_subreg10define void @remat_subreg(ptr nocapture %x, ptr %y, i32 %n, i32 %z, float %c, float %lambda, ptr nocapture %ret_f, ptr nocapture %ret_df, i1 %cond) nounwind {11entry:12 %conv16 = fpext float %lambda to double13 %mul17 = fmul double %conv16, -1.000000e+0014 br i1 %cond, label %cond.end.us, label %cond.end15 16cond.end.us: ; preds = %entry17 unreachable18 19cond.end: ; preds = %cond.end, %entry20 %mul = fmul double undef, 0.000000e+0021 %add = fadd double undef, %mul22 %add46 = fadd double undef, undef23 %add75 = fadd double 0.000000e+00, undef24 br i1 undef, label %for.end, label %cond.end25 26for.end: ; preds = %cond.end27 %conv78 = sitofp i32 %z to double28 %conv83 = fpext float %c to double29 %mul84 = fmul double %mul17, %conv8330 %call85 = tail call double @exp(double %mul84) nounwind31 %mul86 = fmul double %conv78, %call8532 %add88 = fadd double 0.000000e+00, %mul8633; CHECK: bl _exp34 %call100 = tail call double @exp(double %mul84) nounwind35 %mul101 = fmul double undef, %call10036 %add103 = fadd double %add46, %mul10137 %mul111 = fmul double undef, %conv8338 %mul119 = fmul double %mul111, undef39 %add121 = fadd double undef, %mul11940 %div = fdiv double 1.000000e+00, %conv1641 %div126 = fdiv double %add, %add7542 %sub = fsub double %div, %div12643 %div129 = fdiv double %add103, %add8844 %add130 = fadd double %sub, %div12945 %conv131 = fptrunc double %add130 to float46 store float %conv131, ptr %ret_f, align 447 %mul139 = fmul double %div129, %div12948 %div142 = fdiv double %add121, %add8849 %sub143 = fsub double %mul139, %div14250; %lambda is passed on the stack, and the stack slot load is rematerialized.51; The rematted load of a float constrains the D register used for the mul.52; CHECK: vldr53 %mul146 = fmul float %lambda, %lambda54 %conv147 = fpext float %mul146 to double55 %div148 = fdiv double 1.000000e+00, %conv14756 %sub149 = fsub double %sub143, %div14857 %conv150 = fptrunc double %sub149 to float58 store float %conv150, ptr %ret_df, align 459 ret void60}61 62; CHECK: insert_elem63; This test has a sub-register copy with a kill flag:64; %6:ssub_3 = COPY killed %6:ssub_2; QPR_VFP2:%665; The rewriter must do something sensible with that, or the scavenger crashes.66define void @insert_elem() nounwind {67entry:68 br i1 undef, label %if.end251, label %if.then8469 70if.then84: ; preds = %entry71 br i1 undef, label %if.end251, label %if.then19572 73if.then195: ; preds = %if.then8474 %div = fdiv float 1.000000e+00, undef75 %vecinit207 = insertelement <4 x float> undef, float %div, i32 176 %vecinit208 = insertelement <4 x float> %vecinit207, float 1.000000e+00, i32 277 %vecinit209 = insertelement <4 x float> %vecinit208, float 1.000000e+00, i32 378 %mul216 = fmul <4 x float> zeroinitializer, %vecinit20979 store <4 x float> %mul216, ptr undef, align 1680 br label %if.end25181 82if.end251: ; preds = %if.then195, %if.then84, %entry83 ret void84}85 86; Coalescer failure: removeCopyByCommutingDef leaves a bad kill flag87; behind.88define void @rdar11950722() nounwind readonly optsize ssp align 2 {89entry:90 br i1 undef, label %land.lhs.true7, label %lor.lhs.false.i91 92lor.lhs.false.i:93 br i1 undef, label %if.then10.i, label %land.lhs.true794 95if.then10.i:96 %xFlags.1.i = select i1 undef, i32 0, i32 undef97 br i1 undef, label %land.lhs.true33.i, label %f.exit98 99land.lhs.true33.i:100 %and26.i = and i32 %xFlags.1.i, 8101 %cmp27.i = icmp eq i32 %and26.i, 0102 %and29.i = and i32 %xFlags.1.i, 2147483645103 %xFlags.1.and29.i = select i1 %cmp27.i, i32 %xFlags.1.i, i32 %and29.i104 %and34.i = and i32 %xFlags.1.i, 8105 %cmp35.i = icmp eq i32 %and34.i, 0106 %and37.i = and i32 %xFlags.1.i, 2147483645107 %yFlags.1.and37.i = select i1 %cmp35.i, i32 %xFlags.1.i, i32 %and37.i108 br label %f.exit109 110f.exit:111 %xFlags.3.i = phi i32 [ %xFlags.1.and29.i, %land.lhs.true33.i ], [ %xFlags.1.i, %if.then10.i ]112 %yFlags.2.i = phi i32 [ %yFlags.1.and37.i, %land.lhs.true33.i ], [ %xFlags.1.i, %if.then10.i ]113 %cmp40.i = icmp eq i32 %xFlags.3.i, %yFlags.2.i114 br i1 %cmp40.i, label %land.lhs.true7, label %land.end115 116land.lhs.true7:117 br i1 undef, label %land.lhs.true34, label %lor.lhs.false27118 119lor.lhs.false27:120 br i1 undef, label %land.lhs.true34, label %land.end121 122land.lhs.true34:123 br i1 undef, label %land.end, label %lor.lhs.false44124 125lor.lhs.false44:126 ret void127 128land.end:129 ret void130}131