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1; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -verify-arm-pseudo-expand2 3; <rdar://problem/8529919>4%struct.foo = type { i32, i32 }5 6define void @func() nounwind {7entry:8 %tmp = load i32, ptr undef, align 49 br label %bb110 11bb1:12 %tmp1 = and i32 %tmp, 1613 %tmp2 = icmp eq i32 %tmp1, 014 %invok.1.i = select i1 %tmp2, i32 undef, i32 015 %tmp119 = add i32 %invok.1.i, 016 br i1 undef, label %bb2, label %exit17 18bb2:19 %tmp120 = add i32 %tmp119, 020 %scevgep810.i = getelementptr %struct.foo, ptr null, i32 %tmp120, i32 121 store i32 undef, ptr %scevgep810.i, align 422 br i1 undef, label %bb2, label %bb323 24bb3:25 br i1 %tmp2, label %bb2, label %bb226 27exit:28 ret void29}30 31; PR10520 - REG_SEQUENCE with implicit-def operands.32define arm_aapcs_vfpcc void @foo() nounwind align 2 {33bb:34 %tmp = shufflevector <2 x i64> undef, <2 x i64> undef, <1 x i32> <i32 1>35 %tmp8 = bitcast <1 x i64> %tmp to <2 x float>36 %tmp9 = shufflevector <2 x float> %tmp8, <2 x float> %tmp8, <4 x i32> <i32 1, i32 1, i32 1, i32 1>37 %tmp10 = fmul <4 x float> undef, %tmp938 %tmp11 = fadd <4 x float> %tmp10, undef39 %tmp12 = fadd <4 x float> undef, %tmp1140 %tmp13 = bitcast <4 x float> %tmp12 to i12841 %tmp14 = bitcast i128 %tmp13 to <4 x float>42 %tmp15 = bitcast <4 x float> %tmp14 to i12843 %tmp16 = bitcast i128 %tmp15 to <4 x float>44 %tmp17 = bitcast <4 x float> %tmp16 to i12845 %tmp18 = bitcast i128 %tmp17 to <4 x float>46 %tmp19 = bitcast <4 x float> %tmp18 to i12847 %tmp20 = bitcast i128 %tmp19 to <4 x float>48 store <4 x float> %tmp20, ptr undef, align 1649 ret void50}51 52; PR10520, second bug. NEONMoveFixPass needs to preserve implicit operands.53define arm_aapcs_vfpcc void @pr10520_2() nounwind align 2 {54bb:55 %tmp76 = shufflevector <2 x i64> zeroinitializer, <2 x i64> zeroinitializer, <1 x i32> <i32 1>56 %tmp77 = bitcast <1 x i64> %tmp76 to <2 x float>57 %tmp78 = shufflevector <2 x float> %tmp77, <2 x float> %tmp77, <4 x i32> zeroinitializer58 %tmp81 = fmul <4 x float> undef, %tmp7859 %tmp82 = fadd <4 x float> %tmp81, undef60 %tmp85 = fadd <4 x float> %tmp82, undef61 %tmp86 = bitcast <4 x float> %tmp85 to i12862 %tmp136 = bitcast i128 %tmp86 to <4 x float>63 %tmp137 = bitcast <4 x float> %tmp136 to i12864 %tmp138 = bitcast i128 %tmp137 to <4 x float>65 %tmp139 = bitcast <4 x float> %tmp138 to i12866 %tmp152 = bitcast i128 %tmp139 to <4 x float>67 %tmp153 = bitcast <4 x float> %tmp152 to i12868 %tmp154 = bitcast i128 %tmp153 to <4 x float>69 store <4 x float> %tmp154, ptr undef, align 1670 ret void71}72 73; <rdar://problem/12721258>74%A = type { %B }75%B = type { i32 }76 77define void @_Z3Foov() ssp personality ptr @__gxx_personality_sj0 {78entry:79 br i1 true, label %exit, label %false80 81false:82 invoke void undef(ptr undef)83 to label %exit unwind label %lpad84 85lpad:86 %0 = landingpad { ptr, i32 }87 catch ptr null88 unreachable89 90exit:91 ret void92}93 94declare i32 @__gxx_personality_sj0(...)95