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1; RUN: llc -mtriple=thumbv7-netbsd-eabi -o - %s | FileCheck %s2declare void @bar()3 4; ARM's frame lowering attempts to tack another callee-saved register onto the5; list when it detects a potential misaligned VFP store. However, if there are6; none available it used to just vpush anyway and misreport the location of the7; registers in unwind info. Since there are benefits to aligned stores, it's8; better to correct the code than the .cfi_offset directive.9 10define void @test_dpr_align(i8 %l, i8 %r) {11; CHECK-LABEL: test_dpr_align:12; CHECK: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}13; CHECK: .cfi_def_cfa_offset 3614; CHECK: sub sp, #415; CHECK: .cfi_def_cfa_offset 4016; CHECK: vpush {d8}17; CHECK: .cfi_offset d8, -4818; CHECK-NOT: sub sp19; [...]20; CHECK: bl bar21; CHECK-NOT: add sp22; CHECK: vpop {d8}23; CHECK: add sp, #424; CHECK: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}25 call void asm sideeffect "", "~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{d8}"()26 call void @bar()27 ret void28}29 30; The prologue (but not the epilogue) can be made more space efficient by31; chucking an argument register into the list. Not worth it in general though,32; "sub sp, #4" is likely faster.33define void @test_dpr_align_tiny(i8 %l, i8 %r) minsize {34; CHECK-LABEL: test_dpr_align_tiny:35; CHECK: push.w {r3, r4, r5, r6, r7, r8, r9, r10, r11, lr}36; CHECK-NOT: sub sp37; CHECK: vpush {d8}38; CHECK: .cfi_offset d8, -4839; CHECK-NOT: sub sp40; [...]41; CHECK: bl bar42; CHECK-NOT: add sp43; CHECK: vpop {d8}44; CHECK: add sp, #445; CHECK: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}46 call void asm sideeffect "", "~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{d8}"()47 call void @bar()48 ret void49}50 51 52; However, we shouldn't do a 2-step align/adjust if there are no DPRs to be53; saved.54define void @test_nodpr_noalign(i8 %l, i8 %r) {55; CHECK-LABEL: test_nodpr_noalign:56; CHECK: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}57; CHECK-NOT: sub sp58; CHECK: sub sp, #1259; CHECK-NOT: sub sp60; [...]61; CHECK: bl bar62; CHECK-NOT: add sp63; CHECK: add sp, #1264; CHECK-NOT: add sp65; CHECK: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}66 alloca i6467 call void asm sideeffect "", "~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11}"()68 call void @bar()69 ret void70}71 72define void @test_frame_pointer_offset() minsize "frame-pointer"="all" {73; CHECK-LABEL: test_frame_pointer_offset:74; CHECK: push {r4, r5, r6, r7, lr}75; CHECK: .cfi_def_cfa_offset 2076; CHECK: add r7, sp, #1277; CHECK: .cfi_def_cfa r7, 878; CHECK-NOT: .cfi_def_cfa_offset79; CHECK: push.w {r7, r8, r9, r10, r11}80; CHECK-NOT: .cfi_def_cfa_offset81 call void asm sideeffect "", "~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{d8}"()82 call void @bar()83 ret void84}85