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1; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-darwin | FileCheck %s --check-prefix=ARM2; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM3; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=THUMB4 5%struct.A = type { i32, [2 x [2 x i32]], i8, [3 x [3 x [3 x i32]]] }6%struct.B = type { i32, [2 x [2 x [2 x %struct.A]]] }7 8@arr = common global [2 x [2 x [2 x [2 x [2 x i32]]]]] zeroinitializer, align 49@A = common global [3 x [3 x %struct.A]] zeroinitializer, align 410@B = common global [2 x [2 x [2 x %struct.B]]] zeroinitializer, align 411 12define ptr @t1() nounwind {13entry:14; ARM: t115; THUMB: t116 %addr = alloca ptr, align 417 store ptr getelementptr inbounds ([2 x [2 x [2 x [2 x [2 x i32]]]]], ptr @arr, i32 0, i32 1, i32 1, i32 1, i32 1, i32 1), ptr %addr, align 418; ARM: add r0, r0, #12419; THUMB: adds r0, #12420 %0 = load ptr, ptr %addr, align 421 ret ptr %022}23 24define ptr @t2() nounwind {25entry:26; ARM: t227; THUMB: t228 %addr = alloca ptr, align 429 store ptr getelementptr inbounds ([3 x [3 x %struct.A]], ptr @A, i32 0, i32 2, i32 2, i32 3, i32 1, i32 2, i32 2), ptr %addr, align 430; ARM: movw [[R:r[0-9]+]], #114831; ARM: add r0, r{{[0-9]+}}, [[R]]32; THUMB: addw r0, r0, #114833 %0 = load ptr, ptr %addr, align 434 ret ptr %035}36 37define ptr @t3() nounwind {38entry:39; ARM: t340; THUMB: t341 %addr = alloca ptr, align 442 store ptr getelementptr inbounds ([3 x [3 x %struct.A]], ptr @A, i32 0, i32 0, i32 1, i32 1, i32 0, i32 1), ptr %addr, align 443; ARM: add r0, r0, #14044; THUMB: adds r0, #14045 %0 = load ptr, ptr %addr, align 446 ret ptr %047}48 49define ptr @t4() nounwind {50entry:51; ARM: t452; THUMB: t453 %addr = alloca ptr, align 454 store ptr getelementptr inbounds ([2 x [2 x [2 x %struct.B]]], ptr @B, i32 0, i32 0, i32 0, i32 1, i32 1, i32 0, i32 0, i32 1, i32 3, i32 1, i32 2, i32 1), ptr %addr, align 455; ARM-NOT: movw r{{[0-9]}}, #106056; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #457; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #13258; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #2459; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #3660; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #2461; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #462; ARM: movw r{{[0-9]}}, #128463; THUMB: addw r{{[0-9]}}, r{{[0-9]}}, #128464 %0 = load ptr, ptr %addr, align 465 ret ptr %066}67