101 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=thumbv7m-arm-none-eabi -mattr=+execute-only,+fp-armv8 | FileCheck %s --check-prefixes=CHECK,VMOVSR3; RUN: llc < %s -mtriple=thumbv7m-arm-none-eabi -mattr=+execute-only,+fp-armv8,+neon,+neonfp | FileCheck %s --check-prefixes=CHECK,NEON4 5define arm_aapcs_vfpcc float @foo0(float %a0) local_unnamed_addr {6; CHECK-LABEL: foo0:7; CHECK: @ %bb.0:8; CHECK-NEXT: vcmp.f32 s0, #09; CHECK-NEXT: vmov.f32 s2, #5.000000e-0110; CHECK-NEXT: vmrs APSR_nzcv, fpscr11; CHECK-NEXT: vmov.f32 s4, #-5.000000e-0112; CHECK-NEXT: it mi13; CHECK-NEXT: vmovmi.f32 s2, s414; CHECK-NEXT: vmov.f32 s0, s215; CHECK-NEXT: bx lr16 %1 = fcmp nsz olt float %a0, 0.000000e+0017 %2 = select i1 %1, float -5.000000e-01, float 5.000000e-0118 ret float %219}20 21define arm_aapcs_vfpcc float @float1(float %a0) local_unnamed_addr {22; CHECK-LABEL: float1:23; CHECK: @ %bb.0: @ %.end24; CHECK-NEXT: vmov.f32 s2, #1.000000e+0025; CHECK-NEXT: vmov.f32 s4, #5.000000e-0126; CHECK-NEXT: vmov.f32 s6, #-5.000000e-0127; CHECK-NEXT: vcmp.f32 s2, s028; CHECK-NEXT: vmrs APSR_nzcv, fpscr29; CHECK-NEXT: vselgt.f32 s0, s6, s430; CHECK-NEXT: bx lr31 br i1 undef, label %.end, label %132 33 %2 = fcmp nsz olt float %a0, 1.000000e+0034 %3 = select i1 %2, float -5.000000e-01, float 5.000000e-0135 br label %.end36 37.end:38 %4 = phi float [ undef, %0 ], [ %3, %1]39 ret float %440}41 42define arm_aapcs_vfpcc float @float128(float %a0) local_unnamed_addr {43; VMOVSR-LABEL: float128:44; VMOVSR: @ %bb.0:45; VMOVSR-NEXT: mov.w r0, #112407347246; VMOVSR-NEXT: vmov.f32 s4, #5.000000e-0147; VMOVSR-NEXT: vmov s2, r048; VMOVSR-NEXT: vmov.f32 s6, #-5.000000e-0149; VMOVSR-NEXT: vcmp.f32 s2, s050; VMOVSR-NEXT: vmrs APSR_nzcv, fpscr51; VMOVSR-NEXT: vselgt.f32 s0, s6, s452; VMOVSR-NEXT: bx lr53;54; NEON-LABEL: float128:55; NEON: @ %bb.0:56; NEON-NEXT: mov.w r0, #112407347257; NEON-NEXT: vmov.f32 s4, #5.000000e-0158; NEON-NEXT: vmov d1, r0, r059; NEON-NEXT: vmov.f32 s6, #-5.000000e-0160; NEON-NEXT: vcmp.f32 s2, s061; NEON-NEXT: vmrs APSR_nzcv, fpscr62; NEON-NEXT: vselgt.f32 s0, s6, s463; NEON-NEXT: bx lr64 %1 = fcmp nsz olt float %a0, 128.000000e+0065 %2 = select i1 %1, float -5.000000e-01, float 5.000000e-0166 ret float %267}68 69define arm_aapcs_vfpcc double @double1(double %a0) local_unnamed_addr {70; CHECK-LABEL: double1:71; CHECK: @ %bb.0:72; CHECK-NEXT: vmov.f64 d16, #1.000000e+0073; CHECK-NEXT: vcmp.f64 d16, d074; CHECK-NEXT: vmrs APSR_nzcv, fpscr75; CHECK-NEXT: vmov.f64 d17, #5.000000e-0176; CHECK-NEXT: vmov.f64 d18, #-5.000000e-0177; CHECK-NEXT: vselgt.f64 d0, d18, d1778; CHECK-NEXT: bx lr79 %1 = fcmp nsz olt double %a0, 1.000000e+0080 %2 = select i1 %1, double -5.000000e-01, double 5.000000e-0181 ret double %282}83 84define arm_aapcs_vfpcc double @double128(double %a0) local_unnamed_addr {85; CHECK-LABEL: double128:86; CHECK: @ %bb.0:87; CHECK-NEXT: movs r0, #088; CHECK-NEXT: movs r1, #089; CHECK-NEXT: movt r0, #1648090; CHECK-NEXT: vmov.f64 d17, #5.000000e-0191; CHECK-NEXT: vmov d16, r1, r092; CHECK-NEXT: vcmp.f64 d16, d093; CHECK-NEXT: vmrs APSR_nzcv, fpscr94; CHECK-NEXT: vmov.f64 d18, #-5.000000e-0195; CHECK-NEXT: vselgt.f64 d0, d18, d1796; CHECK-NEXT: bx lr97 %1 = fcmp nsz olt double %a0, 128.000000e+0098 %2 = select i1 %1, double -5.000000e-01, double 5.000000e-0199 ret double %2100}101