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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -asm-verbose=false -mattr=-vfp2 -mtriple=arm-eabi < %s | FileCheck %s -check-prefix=CHECK-SOFT3; RUN: llc -asm-verbose=false -mattr=-vfp2 -mtriple=arm-eabi -meabi=gnu < %s | FileCheck %s -check-prefix=CHECK-SOFT4; RUN: llc -asm-verbose=false -mattr=+vfp3 -mtriple=arm-eabi < %s | FileCheck %s -check-prefix=CHECK-SOFTFP5; RUN: llc -asm-verbose=false -mattr=+vfp3 -meabi=gnu -mtriple=arm-eabi < %s | FileCheck %s -check-prefix=CHECK-SOFTFP6; RUN: llc -asm-verbose=false -mattr=+vfp3 -float-abi=hard -mtriple=arm-eabi < %s | FileCheck %s -check-prefix=CHECK-HARDFP-SP -check-prefix=CHECK-HARDFP-DP7; RUN: llc -asm-verbose=false -mattr=+vfp3 -float-abi=hard -meabi=gnu -mtriple=arm-eabi < %s | FileCheck %s -check-prefix=CHECK-HARDFP-SP -check-prefix=CHECK-HARDFP-DP8; RUN: llc -asm-verbose=false -mattr=+vfp3,-fp64 -float-abi=hard -mtriple=arm-eabi < %s | FileCheck %s -check-prefix=CHECK-HARDFP-SP -check-prefix=CHECK-HARDFP-SPONLY9; RUN: llc -asm-verbose=false -mattr=+vfp3,-fp64 -float-abi=hard -mtriple=arm-eabi -meabi=gnu < %s | FileCheck %s -check-prefix=CHECK-HARDFP-SP -check-prefix=CHECK-HARDFP-SPONLY10 11; The Runtime ABI for the ARM Architecture IHI0043 section 4.1.2 The12; floating-point helper functions to always use the base AAPCS (soft-float)13; calling convention.14 15; In this test we cover the following configurations:16; CHECK-SOFT -mfloat-abi=soft17;     * expect no use of floating point instructions18;     * expect to use __aeabi_ helper function in each function19; CHECK-SOFTFP -mfloat-abi=softfp20;     * all functions use base AAPCS21;     * floating point instructions permitted, so __aeabi_ helpers only22;       expected when there is no available instruction.23; CHECK-HARDFP-SP -mfloat-abi=hardfp (single precision instructions)24;     * all non Runtime ABI helper functions use AAPCS VFP25;     * floating point instructions permitted, so __aeabi_ helpers only26;       expected when there is no available instruction.27; CHECK-HARDFP-DP -mfloat-abi=hardfp (double precision instructions)28; CHECK-HARDFP-SPONLY -mfloat-abi=hardfp (double precision but single29;                      precision only FPU)30;     * as CHECK-HARDFP-SP, but we split up the double precision helper31;       functions so we can test a single precision only FPU, which has to use32;       helper function for all double precision operations.33 34; In all cases we must use base AAPCS when calling a helper function from35; section 4.1.2.36 37target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"38target triple = "arm-eabi"39 40define float @fadd(float %a, float %b) #0 {41; CHECK-SOFT-LABEL: fadd:42; CHECK-SOFT:         .save {r11, lr}43; CHECK-SOFT-NEXT:    push {r11, lr}44; CHECK-SOFT-NEXT:    bl __aeabi_fadd45; CHECK-SOFT-NEXT:    pop {r11, lr}46; CHECK-SOFT-NEXT:    mov pc, lr47;48; CHECK-SOFTFP-LABEL: fadd:49; CHECK-SOFTFP:         vmov s0, r150; CHECK-SOFTFP-NEXT:    vmov s2, r051; CHECK-SOFTFP-NEXT:    vadd.f32 s0, s2, s052; CHECK-SOFTFP-NEXT:    vmov r0, s053; CHECK-SOFTFP-NEXT:    mov pc, lr54;55; CHECK-HARDFP-SP-LABEL: fadd:56; CHECK-HARDFP-SP:         vadd.f32 s0, s0, s157; CHECK-HARDFP-SP-NEXT:    mov pc, lr58entry:59  %add = fadd float %a, %b60  ret float %add61}62 63define float @fdiv(float %a, float %b) #0 {64; CHECK-SOFT-LABEL: fdiv:65; CHECK-SOFT:         .save {r11, lr}66; CHECK-SOFT-NEXT:    push {r11, lr}67; CHECK-SOFT-NEXT:    bl __aeabi_fdiv68; CHECK-SOFT-NEXT:    pop {r11, lr}69; CHECK-SOFT-NEXT:    mov pc, lr70;71; CHECK-SOFTFP-LABEL: fdiv:72; CHECK-SOFTFP:         vmov s0, r173; CHECK-SOFTFP-NEXT:    vmov s2, r074; CHECK-SOFTFP-NEXT:    vdiv.f32 s0, s2, s075; CHECK-SOFTFP-NEXT:    vmov r0, s076; CHECK-SOFTFP-NEXT:    mov pc, lr77;78; CHECK-HARDFP-SP-LABEL: fdiv:79; CHECK-HARDFP-SP:         vdiv.f32 s0, s0, s180; CHECK-HARDFP-SP-NEXT:    mov pc, lr81entry:82  %div = fdiv float %a, %b83  ret float %div84}85 86define float @fmul(float %a, float %b) #0 {87; CHECK-SOFT-LABEL: fmul:88; CHECK-SOFT:         .save {r11, lr}89; CHECK-SOFT-NEXT:    push {r11, lr}90; CHECK-SOFT-NEXT:    bl __aeabi_fmul91; CHECK-SOFT-NEXT:    pop {r11, lr}92; CHECK-SOFT-NEXT:    mov pc, lr93;94; CHECK-SOFTFP-LABEL: fmul:95; CHECK-SOFTFP:         vmov s0, r196; CHECK-SOFTFP-NEXT:    vmov s2, r097; CHECK-SOFTFP-NEXT:    vmul.f32 s0, s2, s098; CHECK-SOFTFP-NEXT:    vmov r0, s099; CHECK-SOFTFP-NEXT:    mov pc, lr100;101; CHECK-HARDFP-SP-LABEL: fmul:102; CHECK-HARDFP-SP:         vmul.f32 s0, s0, s1103; CHECK-HARDFP-SP-NEXT:    mov pc, lr104entry:105  %mul = fmul float %a, %b106  ret float %mul107}108 109define float @fsub(float %a, float %b) #0 {110; CHECK-SOFT-LABEL: fsub:111; CHECK-SOFT:         .save {r11, lr}112; CHECK-SOFT-NEXT:    push {r11, lr}113; CHECK-SOFT-NEXT:    bl __aeabi_fsub114; CHECK-SOFT-NEXT:    pop {r11, lr}115; CHECK-SOFT-NEXT:    mov pc, lr116;117; CHECK-SOFTFP-LABEL: fsub:118; CHECK-SOFTFP:         vmov s0, r1119; CHECK-SOFTFP-NEXT:    vmov s2, r0120; CHECK-SOFTFP-NEXT:    vsub.f32 s0, s2, s0121; CHECK-SOFTFP-NEXT:    vmov r0, s0122; CHECK-SOFTFP-NEXT:    mov pc, lr123;124; CHECK-HARDFP-SP-LABEL: fsub:125; CHECK-HARDFP-SP:         vsub.f32 s0, s0, s1126; CHECK-HARDFP-SP-NEXT:    mov pc, lr127entry:128  %sub = fsub float %a, %b129  ret float %sub130}131 132define i32 @fcmpeq(float %a, float %b) #0 {133; CHECK-SOFT-LABEL: fcmpeq:134; CHECK-SOFT:         .save {r11, lr}135; CHECK-SOFT-NEXT:    push {r11, lr}136; CHECK-SOFT-NEXT:    bl __aeabi_fcmpeq137; CHECK-SOFT-NEXT:    cmp r0, #0138; CHECK-SOFT-NEXT:    movne r0, #1139; CHECK-SOFT-NEXT:    pop {r11, lr}140; CHECK-SOFT-NEXT:    mov pc, lr141;142; CHECK-SOFTFP-LABEL: fcmpeq:143; CHECK-SOFTFP:         vmov s2, r0144; CHECK-SOFTFP-NEXT:    mov r0, #0145; CHECK-SOFTFP-NEXT:    vmov s0, r1146; CHECK-SOFTFP-NEXT:    vcmp.f32 s2, s0147; CHECK-SOFTFP-NEXT:    vmrs APSR_nzcv, fpscr148; CHECK-SOFTFP-NEXT:    moveq r0, #1149; CHECK-SOFTFP-NEXT:    mov pc, lr150;151; CHECK-HARDFP-SP-LABEL: fcmpeq:152; CHECK-HARDFP-SP:         vcmp.f32 s0, s1153; CHECK-HARDFP-SP-NEXT:    mov r0, #0154; CHECK-HARDFP-SP-NEXT:    vmrs APSR_nzcv, fpscr155; CHECK-HARDFP-SP-NEXT:    moveq r0, #1156; CHECK-HARDFP-SP-NEXT:    mov pc, lr157entry:158  %cmp = fcmp oeq float %a, %b159  %conv = zext i1 %cmp to i32160  ret i32 %conv161}162 163define i32 @fcmplt(float %a, float %b) #0 {164; CHECK-SOFT-LABEL: fcmplt:165; CHECK-SOFT:         .save {r11, lr}166; CHECK-SOFT-NEXT:    push {r11, lr}167; CHECK-SOFT-NEXT:    bl __aeabi_fcmplt168; CHECK-SOFT-NEXT:    cmp r0, #0169; CHECK-SOFT-NEXT:    movne r0, #1170; CHECK-SOFT-NEXT:    pop {r11, lr}171; CHECK-SOFT-NEXT:    mov pc, lr172;173; CHECK-SOFTFP-LABEL: fcmplt:174; CHECK-SOFTFP:         vmov s2, r0175; CHECK-SOFTFP-NEXT:    mov r0, #0176; CHECK-SOFTFP-NEXT:    vmov s0, r1177; CHECK-SOFTFP-NEXT:    vcmp.f32 s2, s0178; CHECK-SOFTFP-NEXT:    vmrs APSR_nzcv, fpscr179; CHECK-SOFTFP-NEXT:    movmi r0, #1180; CHECK-SOFTFP-NEXT:    mov pc, lr181;182; CHECK-HARDFP-SP-LABEL: fcmplt:183; CHECK-HARDFP-SP:         vcmp.f32 s0, s1184; CHECK-HARDFP-SP-NEXT:    mov r0, #0185; CHECK-HARDFP-SP-NEXT:    vmrs APSR_nzcv, fpscr186; CHECK-HARDFP-SP-NEXT:    movmi r0, #1187; CHECK-HARDFP-SP-NEXT:    mov pc, lr188entry:189  %cmp = fcmp olt float %a, %b190  %conv = zext i1 %cmp to i32191  ret i32 %conv192}193 194define i32 @fcmple(float %a, float %b) #0 {195; CHECK-SOFT-LABEL: fcmple:196; CHECK-SOFT:         .save {r11, lr}197; CHECK-SOFT-NEXT:    push {r11, lr}198; CHECK-SOFT-NEXT:    bl __aeabi_fcmple199; CHECK-SOFT-NEXT:    cmp r0, #0200; CHECK-SOFT-NEXT:    movne r0, #1201; CHECK-SOFT-NEXT:    pop {r11, lr}202; CHECK-SOFT-NEXT:    mov pc, lr203;204; CHECK-SOFTFP-LABEL: fcmple:205; CHECK-SOFTFP:         vmov s2, r0206; CHECK-SOFTFP-NEXT:    mov r0, #0207; CHECK-SOFTFP-NEXT:    vmov s0, r1208; CHECK-SOFTFP-NEXT:    vcmp.f32 s2, s0209; CHECK-SOFTFP-NEXT:    vmrs APSR_nzcv, fpscr210; CHECK-SOFTFP-NEXT:    movls r0, #1211; CHECK-SOFTFP-NEXT:    mov pc, lr212;213; CHECK-HARDFP-SP-LABEL: fcmple:214; CHECK-HARDFP-SP:         vcmp.f32 s0, s1215; CHECK-HARDFP-SP-NEXT:    mov r0, #0216; CHECK-HARDFP-SP-NEXT:    vmrs APSR_nzcv, fpscr217; CHECK-HARDFP-SP-NEXT:    movls r0, #1218; CHECK-HARDFP-SP-NEXT:    mov pc, lr219entry:220  %cmp = fcmp ole float %a, %b221  %conv = zext i1 %cmp to i32222  ret i32 %conv223}224 225define i32 @fcmpge(float %a, float %b) #0 {226; CHECK-SOFT-LABEL: fcmpge:227; CHECK-SOFT:         .save {r11, lr}228; CHECK-SOFT-NEXT:    push {r11, lr}229; CHECK-SOFT-NEXT:    bl __aeabi_fcmpge230; CHECK-SOFT-NEXT:    cmp r0, #0231; CHECK-SOFT-NEXT:    movne r0, #1232; CHECK-SOFT-NEXT:    pop {r11, lr}233; CHECK-SOFT-NEXT:    mov pc, lr234;235; CHECK-SOFTFP-LABEL: fcmpge:236; CHECK-SOFTFP:         vmov s2, r0237; CHECK-SOFTFP-NEXT:    mov r0, #0238; CHECK-SOFTFP-NEXT:    vmov s0, r1239; CHECK-SOFTFP-NEXT:    vcmp.f32 s2, s0240; CHECK-SOFTFP-NEXT:    vmrs APSR_nzcv, fpscr241; CHECK-SOFTFP-NEXT:    movge r0, #1242; CHECK-SOFTFP-NEXT:    mov pc, lr243;244; CHECK-HARDFP-SP-LABEL: fcmpge:245; CHECK-HARDFP-SP:         vcmp.f32 s0, s1246; CHECK-HARDFP-SP-NEXT:    mov r0, #0247; CHECK-HARDFP-SP-NEXT:    vmrs APSR_nzcv, fpscr248; CHECK-HARDFP-SP-NEXT:    movge r0, #1249; CHECK-HARDFP-SP-NEXT:    mov pc, lr250entry:251  %cmp = fcmp oge float %a, %b252  %conv = zext i1 %cmp to i32253  ret i32 %conv254}255 256define i32 @fcmpgt(float %a, float %b) #0 {257; CHECK-SOFT-LABEL: fcmpgt:258; CHECK-SOFT:         .save {r11, lr}259; CHECK-SOFT-NEXT:    push {r11, lr}260; CHECK-SOFT-NEXT:    bl __aeabi_fcmpgt261; CHECK-SOFT-NEXT:    cmp r0, #0262; CHECK-SOFT-NEXT:    movne r0, #1263; CHECK-SOFT-NEXT:    pop {r11, lr}264; CHECK-SOFT-NEXT:    mov pc, lr265;266; CHECK-SOFTFP-LABEL: fcmpgt:267; CHECK-SOFTFP:         vmov s2, r0268; CHECK-SOFTFP-NEXT:    mov r0, #0269; CHECK-SOFTFP-NEXT:    vmov s0, r1270; CHECK-SOFTFP-NEXT:    vcmp.f32 s2, s0271; CHECK-SOFTFP-NEXT:    vmrs APSR_nzcv, fpscr272; CHECK-SOFTFP-NEXT:    movgt r0, #1273; CHECK-SOFTFP-NEXT:    mov pc, lr274;275; CHECK-HARDFP-SP-LABEL: fcmpgt:276; CHECK-HARDFP-SP:         vcmp.f32 s0, s1277; CHECK-HARDFP-SP-NEXT:    mov r0, #0278; CHECK-HARDFP-SP-NEXT:    vmrs APSR_nzcv, fpscr279; CHECK-HARDFP-SP-NEXT:    movgt r0, #1280; CHECK-HARDFP-SP-NEXT:    mov pc, lr281entry:282  %cmp = fcmp ogt float %a, %b283  %conv = zext i1 %cmp to i32284  ret i32 %conv285}286 287define i32 @fcmpun(float %a, float %b) #0 {288; CHECK-SOFT-LABEL: fcmpun:289; CHECK-SOFT:         .save {r11, lr}290; CHECK-SOFT-NEXT:    push {r11, lr}291; CHECK-SOFT-NEXT:    bl __aeabi_fcmpun292; CHECK-SOFT-NEXT:    cmp r0, #0293; CHECK-SOFT-NEXT:    movne r0, #1294; CHECK-SOFT-NEXT:    pop {r11, lr}295; CHECK-SOFT-NEXT:    mov pc, lr296;297; CHECK-SOFTFP-LABEL: fcmpun:298; CHECK-SOFTFP:         vmov s2, r0299; CHECK-SOFTFP-NEXT:    mov r0, #0300; CHECK-SOFTFP-NEXT:    vmov s0, r1301; CHECK-SOFTFP-NEXT:    vcmp.f32 s2, s0302; CHECK-SOFTFP-NEXT:    vmrs APSR_nzcv, fpscr303; CHECK-SOFTFP-NEXT:    movvs r0, #1304; CHECK-SOFTFP-NEXT:    mov pc, lr305;306; CHECK-HARDFP-SP-LABEL: fcmpun:307; CHECK-HARDFP-SP:         vcmp.f32 s0, s1308; CHECK-HARDFP-SP-NEXT:    mov r0, #0309; CHECK-HARDFP-SP-NEXT:    vmrs APSR_nzcv, fpscr310; CHECK-HARDFP-SP-NEXT:    movvs r0, #1311; CHECK-HARDFP-SP-NEXT:    mov pc, lr312entry:313  %cmp = fcmp uno float %a, %b314  %0 = zext i1 %cmp to i32315  ret i32 %0316}317 318define double @dadd(double %a, double %b) #0 {319; CHECK-SOFT-LABEL: dadd:320; CHECK-SOFT:         .save {r11, lr}321; CHECK-SOFT-NEXT:    push {r11, lr}322; CHECK-SOFT-NEXT:    bl __aeabi_dadd323; CHECK-SOFT-NEXT:    pop {r11, lr}324; CHECK-SOFT-NEXT:    mov pc, lr325;326; CHECK-SOFTFP-LABEL: dadd:327; CHECK-SOFTFP:         vmov d16, r2, r3328; CHECK-SOFTFP-NEXT:    vmov d17, r0, r1329; CHECK-SOFTFP-NEXT:    vadd.f64 d16, d17, d16330; CHECK-SOFTFP-NEXT:    vmov r0, r1, d16331; CHECK-SOFTFP-NEXT:    mov pc, lr332;333; CHECK-HARDFP-DP-LABEL: dadd:334; CHECK-HARDFP-DP:         vadd.f64 d0, d0, d1335; CHECK-HARDFP-DP-NEXT:    mov pc, lr336;337; CHECK-HARDFP-SPONLY-LABEL: dadd:338; CHECK-HARDFP-SPONLY:         .save {r11, lr}339; CHECK-HARDFP-SPONLY-NEXT:    push {r11, lr}340; CHECK-HARDFP-SPONLY-NEXT:    vmov r0, r1, d0341; CHECK-HARDFP-SPONLY-NEXT:    vmov r2, r3, d1342; CHECK-HARDFP-SPONLY-NEXT:    bl __aeabi_dadd343; CHECK-HARDFP-SPONLY-NEXT:    vmov d0, r0, r1344; CHECK-HARDFP-SPONLY-NEXT:    pop {r11, lr}345; CHECK-HARDFP-SPONLY-NEXT:    mov pc, lr346entry:347  %add = fadd double %a, %b348  ret double %add349}350 351define double @ddiv(double %a, double %b) #0 {352; CHECK-SOFT-LABEL: ddiv:353; CHECK-SOFT:         .save {r11, lr}354; CHECK-SOFT-NEXT:    push {r11, lr}355; CHECK-SOFT-NEXT:    bl __aeabi_ddiv356; CHECK-SOFT-NEXT:    pop {r11, lr}357; CHECK-SOFT-NEXT:    mov pc, lr358;359; CHECK-SOFTFP-LABEL: ddiv:360; CHECK-SOFTFP:         vmov d16, r2, r3361; CHECK-SOFTFP-NEXT:    vmov d17, r0, r1362; CHECK-SOFTFP-NEXT:    vdiv.f64 d16, d17, d16363; CHECK-SOFTFP-NEXT:    vmov r0, r1, d16364; CHECK-SOFTFP-NEXT:    mov pc, lr365;366; CHECK-HARDFP-DP-LABEL: ddiv:367; CHECK-HARDFP-DP:         vdiv.f64 d0, d0, d1368; CHECK-HARDFP-DP-NEXT:    mov pc, lr369;370; CHECK-HARDFP-SPONLY-LABEL: ddiv:371; CHECK-HARDFP-SPONLY:         .save {r11, lr}372; CHECK-HARDFP-SPONLY-NEXT:    push {r11, lr}373; CHECK-HARDFP-SPONLY-NEXT:    vmov r0, r1, d0374; CHECK-HARDFP-SPONLY-NEXT:    vmov r2, r3, d1375; CHECK-HARDFP-SPONLY-NEXT:    bl __aeabi_ddiv376; CHECK-HARDFP-SPONLY-NEXT:    vmov d0, r0, r1377; CHECK-HARDFP-SPONLY-NEXT:    pop {r11, lr}378; CHECK-HARDFP-SPONLY-NEXT:    mov pc, lr379entry:380  %div = fdiv double %a, %b381  ret double %div382}383 384define double @dmul(double %a, double %b) #0 {385; CHECK-SOFT-LABEL: dmul:386; CHECK-SOFT:         .save {r11, lr}387; CHECK-SOFT-NEXT:    push {r11, lr}388; CHECK-SOFT-NEXT:    bl __aeabi_dmul389; CHECK-SOFT-NEXT:    pop {r11, lr}390; CHECK-SOFT-NEXT:    mov pc, lr391;392; CHECK-SOFTFP-LABEL: dmul:393; CHECK-SOFTFP:         vmov d16, r2, r3394; CHECK-SOFTFP-NEXT:    vmov d17, r0, r1395; CHECK-SOFTFP-NEXT:    vmul.f64 d16, d17, d16396; CHECK-SOFTFP-NEXT:    vmov r0, r1, d16397; CHECK-SOFTFP-NEXT:    mov pc, lr398;399; CHECK-HARDFP-DP-LABEL: dmul:400; CHECK-HARDFP-DP:         vmul.f64 d0, d0, d1401; CHECK-HARDFP-DP-NEXT:    mov pc, lr402;403; CHECK-HARDFP-SPONLY-LABEL: dmul:404; CHECK-HARDFP-SPONLY:         .save {r11, lr}405; CHECK-HARDFP-SPONLY-NEXT:    push {r11, lr}406; CHECK-HARDFP-SPONLY-NEXT:    vmov r0, r1, d0407; CHECK-HARDFP-SPONLY-NEXT:    vmov r2, r3, d1408; CHECK-HARDFP-SPONLY-NEXT:    bl __aeabi_dmul409; CHECK-HARDFP-SPONLY-NEXT:    vmov d0, r0, r1410; CHECK-HARDFP-SPONLY-NEXT:    pop {r11, lr}411; CHECK-HARDFP-SPONLY-NEXT:    mov pc, lr412entry:413  %mul = fmul double %a, %b414  ret double %mul415}416 417define double @dsub(double %a, double %b) #0 {418; CHECK-SOFT-LABEL: dsub:419; CHECK-SOFT:         .save {r11, lr}420; CHECK-SOFT-NEXT:    push {r11, lr}421; CHECK-SOFT-NEXT:    bl __aeabi_dsub422; CHECK-SOFT-NEXT:    pop {r11, lr}423; CHECK-SOFT-NEXT:    mov pc, lr424;425; CHECK-SOFTFP-LABEL: dsub:426; CHECK-SOFTFP:         vmov d16, r2, r3427; CHECK-SOFTFP-NEXT:    vmov d17, r0, r1428; CHECK-SOFTFP-NEXT:    vsub.f64 d16, d17, d16429; CHECK-SOFTFP-NEXT:    vmov r0, r1, d16430; CHECK-SOFTFP-NEXT:    mov pc, lr431;432; CHECK-HARDFP-DP-LABEL: dsub:433; CHECK-HARDFP-DP:         vsub.f64 d0, d0, d1434; CHECK-HARDFP-DP-NEXT:    mov pc, lr435;436; CHECK-HARDFP-SPONLY-LABEL: dsub:437; CHECK-HARDFP-SPONLY:         .save {r11, lr}438; CHECK-HARDFP-SPONLY-NEXT:    push {r11, lr}439; CHECK-HARDFP-SPONLY-NEXT:    vmov r0, r1, d0440; CHECK-HARDFP-SPONLY-NEXT:    vmov r2, r3, d1441; CHECK-HARDFP-SPONLY-NEXT:    bl __aeabi_dsub442; CHECK-HARDFP-SPONLY-NEXT:    vmov d0, r0, r1443; CHECK-HARDFP-SPONLY-NEXT:    pop {r11, lr}444; CHECK-HARDFP-SPONLY-NEXT:    mov pc, lr445entry:446  %sub = fsub double %a, %b447  ret double %sub448}449 450define i32 @dcmpeq(double %a, double %b) #0 {451; CHECK-SOFT-LABEL: dcmpeq:452; CHECK-SOFT:         .save {r11, lr}453; CHECK-SOFT-NEXT:    push {r11, lr}454; CHECK-SOFT-NEXT:    bl __aeabi_dcmpeq455; CHECK-SOFT-NEXT:    cmp r0, #0456; CHECK-SOFT-NEXT:    movne r0, #1457; CHECK-SOFT-NEXT:    pop {r11, lr}458; CHECK-SOFT-NEXT:    mov pc, lr459;460; CHECK-SOFTFP-LABEL: dcmpeq:461; CHECK-SOFTFP:         vmov d16, r2, r3462; CHECK-SOFTFP-NEXT:    vmov d17, r0, r1463; CHECK-SOFTFP-NEXT:    mov r0, #0464; CHECK-SOFTFP-NEXT:    vcmp.f64 d17, d16465; CHECK-SOFTFP-NEXT:    vmrs APSR_nzcv, fpscr466; CHECK-SOFTFP-NEXT:    moveq r0, #1467; CHECK-SOFTFP-NEXT:    mov pc, lr468;469; CHECK-HARDFP-DP-LABEL: dcmpeq:470; CHECK-HARDFP-DP:         vcmp.f64 d0, d1471; CHECK-HARDFP-DP-NEXT:    mov r0, #0472; CHECK-HARDFP-DP-NEXT:    vmrs APSR_nzcv, fpscr473; CHECK-HARDFP-DP-NEXT:    moveq r0, #1474; CHECK-HARDFP-DP-NEXT:    mov pc, lr475;476; CHECK-HARDFP-SPONLY-LABEL: dcmpeq:477; CHECK-HARDFP-SPONLY:         .save {r11, lr}478; CHECK-HARDFP-SPONLY-NEXT:    push {r11, lr}479; CHECK-HARDFP-SPONLY-NEXT:    vmov r0, r1, d0480; CHECK-HARDFP-SPONLY-NEXT:    vmov r2, r3, d1481; CHECK-HARDFP-SPONLY-NEXT:    bl __aeabi_dcmpeq482; CHECK-HARDFP-SPONLY-NEXT:    cmp r0, #0483; CHECK-HARDFP-SPONLY-NEXT:    movne r0, #1484; CHECK-HARDFP-SPONLY-NEXT:    pop {r11, lr}485; CHECK-HARDFP-SPONLY-NEXT:    mov pc, lr486entry:487  %cmp = fcmp oeq double %a, %b488  %conv = zext i1 %cmp to i32489  ret i32 %conv490}491 492define i32 @dcmplt(double %a, double %b) #0 {493; CHECK-SOFT-LABEL: dcmplt:494; CHECK-SOFT:         .save {r11, lr}495; CHECK-SOFT-NEXT:    push {r11, lr}496; CHECK-SOFT-NEXT:    bl __aeabi_dcmplt497; CHECK-SOFT-NEXT:    cmp r0, #0498; CHECK-SOFT-NEXT:    movne r0, #1499; CHECK-SOFT-NEXT:    pop {r11, lr}500; CHECK-SOFT-NEXT:    mov pc, lr501;502; CHECK-SOFTFP-LABEL: dcmplt:503; CHECK-SOFTFP:         vmov d16, r2, r3504; CHECK-SOFTFP-NEXT:    vmov d17, r0, r1505; CHECK-SOFTFP-NEXT:    mov r0, #0506; CHECK-SOFTFP-NEXT:    vcmp.f64 d17, d16507; CHECK-SOFTFP-NEXT:    vmrs APSR_nzcv, fpscr508; CHECK-SOFTFP-NEXT:    movmi r0, #1509; CHECK-SOFTFP-NEXT:    mov pc, lr510;511; CHECK-HARDFP-DP-LABEL: dcmplt:512; CHECK-HARDFP-DP:         vcmp.f64 d0, d1513; CHECK-HARDFP-DP-NEXT:    mov r0, #0514; CHECK-HARDFP-DP-NEXT:    vmrs APSR_nzcv, fpscr515; CHECK-HARDFP-DP-NEXT:    movmi r0, #1516; CHECK-HARDFP-DP-NEXT:    mov pc, lr517;518; CHECK-HARDFP-SPONLY-LABEL: dcmplt:519; CHECK-HARDFP-SPONLY:         .save {r11, lr}520; CHECK-HARDFP-SPONLY-NEXT:    push {r11, lr}521; CHECK-HARDFP-SPONLY-NEXT:    vmov r0, r1, d0522; CHECK-HARDFP-SPONLY-NEXT:    vmov r2, r3, d1523; CHECK-HARDFP-SPONLY-NEXT:    bl __aeabi_dcmplt524; CHECK-HARDFP-SPONLY-NEXT:    cmp r0, #0525; CHECK-HARDFP-SPONLY-NEXT:    movne r0, #1526; CHECK-HARDFP-SPONLY-NEXT:    pop {r11, lr}527; CHECK-HARDFP-SPONLY-NEXT:    mov pc, lr528entry:529  %cmp = fcmp olt double %a, %b530  %conv = zext i1 %cmp to i32531  ret i32 %conv532}533 534define i32 @dcmple(double %a, double %b) #0 {535; CHECK-SOFT-LABEL: dcmple:536; CHECK-SOFT:         .save {r11, lr}537; CHECK-SOFT-NEXT:    push {r11, lr}538; CHECK-SOFT-NEXT:    bl __aeabi_dcmple539; CHECK-SOFT-NEXT:    cmp r0, #0540; CHECK-SOFT-NEXT:    movne r0, #1541; CHECK-SOFT-NEXT:    pop {r11, lr}542; CHECK-SOFT-NEXT:    mov pc, lr543;544; CHECK-SOFTFP-LABEL: dcmple:545; CHECK-SOFTFP:         vmov d16, r2, r3546; CHECK-SOFTFP-NEXT:    vmov d17, r0, r1547; CHECK-SOFTFP-NEXT:    mov r0, #0548; CHECK-SOFTFP-NEXT:    vcmp.f64 d17, d16549; CHECK-SOFTFP-NEXT:    vmrs APSR_nzcv, fpscr550; CHECK-SOFTFP-NEXT:    movls r0, #1551; CHECK-SOFTFP-NEXT:    mov pc, lr552;553; CHECK-HARDFP-DP-LABEL: dcmple:554; CHECK-HARDFP-DP:         vcmp.f64 d0, d1555; CHECK-HARDFP-DP-NEXT:    mov r0, #0556; CHECK-HARDFP-DP-NEXT:    vmrs APSR_nzcv, fpscr557; CHECK-HARDFP-DP-NEXT:    movls r0, #1558; CHECK-HARDFP-DP-NEXT:    mov pc, lr559;560; CHECK-HARDFP-SPONLY-LABEL: dcmple:561; CHECK-HARDFP-SPONLY:         .save {r11, lr}562; CHECK-HARDFP-SPONLY-NEXT:    push {r11, lr}563; CHECK-HARDFP-SPONLY-NEXT:    vmov r0, r1, d0564; CHECK-HARDFP-SPONLY-NEXT:    vmov r2, r3, d1565; CHECK-HARDFP-SPONLY-NEXT:    bl __aeabi_dcmple566; CHECK-HARDFP-SPONLY-NEXT:    cmp r0, #0567; CHECK-HARDFP-SPONLY-NEXT:    movne r0, #1568; CHECK-HARDFP-SPONLY-NEXT:    pop {r11, lr}569; CHECK-HARDFP-SPONLY-NEXT:    mov pc, lr570entry:571  %cmp = fcmp ole double %a, %b572  %conv = zext i1 %cmp to i32573  ret i32 %conv574}575 576define i32 @dcmpge(double %a, double %b) #0 {577; CHECK-SOFT-LABEL: dcmpge:578; CHECK-SOFT:         .save {r11, lr}579; CHECK-SOFT-NEXT:    push {r11, lr}580; CHECK-SOFT-NEXT:    bl __aeabi_dcmpge581; CHECK-SOFT-NEXT:    cmp r0, #0582; CHECK-SOFT-NEXT:    movne r0, #1583; CHECK-SOFT-NEXT:    pop {r11, lr}584; CHECK-SOFT-NEXT:    mov pc, lr585;586; CHECK-SOFTFP-LABEL: dcmpge:587; CHECK-SOFTFP:         vmov d16, r2, r3588; CHECK-SOFTFP-NEXT:    vmov d17, r0, r1589; CHECK-SOFTFP-NEXT:    mov r0, #0590; CHECK-SOFTFP-NEXT:    vcmp.f64 d17, d16591; CHECK-SOFTFP-NEXT:    vmrs APSR_nzcv, fpscr592; CHECK-SOFTFP-NEXT:    movge r0, #1593; CHECK-SOFTFP-NEXT:    mov pc, lr594;595; CHECK-HARDFP-DP-LABEL: dcmpge:596; CHECK-HARDFP-DP:         vcmp.f64 d0, d1597; CHECK-HARDFP-DP-NEXT:    mov r0, #0598; CHECK-HARDFP-DP-NEXT:    vmrs APSR_nzcv, fpscr599; CHECK-HARDFP-DP-NEXT:    movge r0, #1600; CHECK-HARDFP-DP-NEXT:    mov pc, lr601;602; CHECK-HARDFP-SPONLY-LABEL: dcmpge:603; CHECK-HARDFP-SPONLY:         .save {r11, lr}604; CHECK-HARDFP-SPONLY-NEXT:    push {r11, lr}605; CHECK-HARDFP-SPONLY-NEXT:    vmov r0, r1, d0606; CHECK-HARDFP-SPONLY-NEXT:    vmov r2, r3, d1607; CHECK-HARDFP-SPONLY-NEXT:    bl __aeabi_dcmpge608; CHECK-HARDFP-SPONLY-NEXT:    cmp r0, #0609; CHECK-HARDFP-SPONLY-NEXT:    movne r0, #1610; CHECK-HARDFP-SPONLY-NEXT:    pop {r11, lr}611; CHECK-HARDFP-SPONLY-NEXT:    mov pc, lr612entry:613  %cmp = fcmp oge double %a, %b614  %conv = zext i1 %cmp to i32615  ret i32 %conv616}617 618define i32 @dcmpgt(double %a, double %b) #0 {619; CHECK-SOFT-LABEL: dcmpgt:620; CHECK-SOFT:         .save {r11, lr}621; CHECK-SOFT-NEXT:    push {r11, lr}622; CHECK-SOFT-NEXT:    bl __aeabi_dcmpgt623; CHECK-SOFT-NEXT:    cmp r0, #0624; CHECK-SOFT-NEXT:    movne r0, #1625; CHECK-SOFT-NEXT:    pop {r11, lr}626; CHECK-SOFT-NEXT:    mov pc, lr627;628; CHECK-SOFTFP-LABEL: dcmpgt:629; CHECK-SOFTFP:         vmov d16, r2, r3630; CHECK-SOFTFP-NEXT:    vmov d17, r0, r1631; CHECK-SOFTFP-NEXT:    mov r0, #0632; CHECK-SOFTFP-NEXT:    vcmp.f64 d17, d16633; CHECK-SOFTFP-NEXT:    vmrs APSR_nzcv, fpscr634; CHECK-SOFTFP-NEXT:    movgt r0, #1635; CHECK-SOFTFP-NEXT:    mov pc, lr636;637; CHECK-HARDFP-DP-LABEL: dcmpgt:638; CHECK-HARDFP-DP:         vcmp.f64 d0, d1639; CHECK-HARDFP-DP-NEXT:    mov r0, #0640; CHECK-HARDFP-DP-NEXT:    vmrs APSR_nzcv, fpscr641; CHECK-HARDFP-DP-NEXT:    movgt r0, #1642; CHECK-HARDFP-DP-NEXT:    mov pc, lr643;644; CHECK-HARDFP-SPONLY-LABEL: dcmpgt:645; CHECK-HARDFP-SPONLY:         .save {r11, lr}646; CHECK-HARDFP-SPONLY-NEXT:    push {r11, lr}647; CHECK-HARDFP-SPONLY-NEXT:    vmov r0, r1, d0648; CHECK-HARDFP-SPONLY-NEXT:    vmov r2, r3, d1649; CHECK-HARDFP-SPONLY-NEXT:    bl __aeabi_dcmpgt650; CHECK-HARDFP-SPONLY-NEXT:    cmp r0, #0651; CHECK-HARDFP-SPONLY-NEXT:    movne r0, #1652; CHECK-HARDFP-SPONLY-NEXT:    pop {r11, lr}653; CHECK-HARDFP-SPONLY-NEXT:    mov pc, lr654entry:655  %cmp = fcmp ogt double %a, %b656  %conv = zext i1 %cmp to i32657  ret i32 %conv658}659 660define i32 @dcmpun(double %a, double %b) #0 {661; CHECK-SOFT-LABEL: dcmpun:662; CHECK-SOFT:         .save {r11, lr}663; CHECK-SOFT-NEXT:    push {r11, lr}664; CHECK-SOFT-NEXT:    bl __aeabi_dcmpun665; CHECK-SOFT-NEXT:    cmp r0, #0666; CHECK-SOFT-NEXT:    movne r0, #1667; CHECK-SOFT-NEXT:    pop {r11, lr}668; CHECK-SOFT-NEXT:    mov pc, lr669;670; CHECK-SOFTFP-LABEL: dcmpun:671; CHECK-SOFTFP:         vmov d16, r2, r3672; CHECK-SOFTFP-NEXT:    vmov d17, r0, r1673; CHECK-SOFTFP-NEXT:    mov r0, #0674; CHECK-SOFTFP-NEXT:    vcmp.f64 d17, d16675; CHECK-SOFTFP-NEXT:    vmrs APSR_nzcv, fpscr676; CHECK-SOFTFP-NEXT:    movvs r0, #1677; CHECK-SOFTFP-NEXT:    mov pc, lr678;679; CHECK-HARDFP-DP-LABEL: dcmpun:680; CHECK-HARDFP-DP:         vcmp.f64 d0, d1681; CHECK-HARDFP-DP-NEXT:    mov r0, #0682; CHECK-HARDFP-DP-NEXT:    vmrs APSR_nzcv, fpscr683; CHECK-HARDFP-DP-NEXT:    movvs r0, #1684; CHECK-HARDFP-DP-NEXT:    mov pc, lr685;686; CHECK-HARDFP-SPONLY-LABEL: dcmpun:687; CHECK-HARDFP-SPONLY:         .save {r11, lr}688; CHECK-HARDFP-SPONLY-NEXT:    push {r11, lr}689; CHECK-HARDFP-SPONLY-NEXT:    vmov r0, r1, d0690; CHECK-HARDFP-SPONLY-NEXT:    vmov r2, r3, d1691; CHECK-HARDFP-SPONLY-NEXT:    bl __aeabi_dcmpun692; CHECK-HARDFP-SPONLY-NEXT:    cmp r0, #0693; CHECK-HARDFP-SPONLY-NEXT:    movne r0, #1694; CHECK-HARDFP-SPONLY-NEXT:    pop {r11, lr}695; CHECK-HARDFP-SPONLY-NEXT:    mov pc, lr696entry:697  %cmp = fcmp uno double %a, %b698  %0 = zext i1 %cmp to i32699  ret i32 %0700}701 702define i32 @d2iz(double %a) #0 {703; CHECK-SOFT-LABEL: d2iz:704; CHECK-SOFT:         .save {r11, lr}705; CHECK-SOFT-NEXT:    push {r11, lr}706; CHECK-SOFT-NEXT:    bl __aeabi_d2iz707; CHECK-SOFT-NEXT:    pop {r11, lr}708; CHECK-SOFT-NEXT:    mov pc, lr709;710; CHECK-SOFTFP-LABEL: d2iz:711; CHECK-SOFTFP:         vmov d16, r0, r1712; CHECK-SOFTFP-NEXT:    vcvt.s32.f64 s0, d16713; CHECK-SOFTFP-NEXT:    vmov r0, s0714; CHECK-SOFTFP-NEXT:    mov pc, lr715;716; CHECK-HARDFP-DP-LABEL: d2iz:717; CHECK-HARDFP-DP:         vcvt.s32.f64 s0, d0718; CHECK-HARDFP-DP-NEXT:    vmov r0, s0719; CHECK-HARDFP-DP-NEXT:    mov pc, lr720;721; CHECK-HARDFP-SPONLY-LABEL: d2iz:722; CHECK-HARDFP-SPONLY:         .save {r11, lr}723; CHECK-HARDFP-SPONLY-NEXT:    push {r11, lr}724; CHECK-HARDFP-SPONLY-NEXT:    vmov r0, r1, d0725; CHECK-HARDFP-SPONLY-NEXT:    bl __aeabi_d2iz726; CHECK-HARDFP-SPONLY-NEXT:    pop {r11, lr}727; CHECK-HARDFP-SPONLY-NEXT:    mov pc, lr728entry:729  %conv = fptosi double %a to i32730  ret i32 %conv731}732 733define i32 @d2uiz(double %a) #0 {734; CHECK-SOFT-LABEL: d2uiz:735; CHECK-SOFT:         .save {r11, lr}736; CHECK-SOFT-NEXT:    push {r11, lr}737; CHECK-SOFT-NEXT:    bl __aeabi_d2uiz738; CHECK-SOFT-NEXT:    pop {r11, lr}739; CHECK-SOFT-NEXT:    mov pc, lr740;741; CHECK-SOFTFP-LABEL: d2uiz:742; CHECK-SOFTFP:         vmov d16, r0, r1743; CHECK-SOFTFP-NEXT:    vcvt.u32.f64 s0, d16744; CHECK-SOFTFP-NEXT:    vmov r0, s0745; CHECK-SOFTFP-NEXT:    mov pc, lr746;747; CHECK-HARDFP-DP-LABEL: d2uiz:748; CHECK-HARDFP-DP:         vcvt.u32.f64 s0, d0749; CHECK-HARDFP-DP-NEXT:    vmov r0, s0750; CHECK-HARDFP-DP-NEXT:    mov pc, lr751;752; CHECK-HARDFP-SPONLY-LABEL: d2uiz:753; CHECK-HARDFP-SPONLY:         .save {r11, lr}754; CHECK-HARDFP-SPONLY-NEXT:    push {r11, lr}755; CHECK-HARDFP-SPONLY-NEXT:    vmov r0, r1, d0756; CHECK-HARDFP-SPONLY-NEXT:    bl __aeabi_d2uiz757; CHECK-HARDFP-SPONLY-NEXT:    pop {r11, lr}758; CHECK-HARDFP-SPONLY-NEXT:    mov pc, lr759entry:760  %conv = fptoui double %a to i32761  ret i32 %conv762}763 764define i64 @d2lz(double %a) #0 {765; CHECK-SOFT-LABEL: d2lz:766; CHECK-SOFT:         .save {r11, lr}767; CHECK-SOFT-NEXT:    push {r11, lr}768; CHECK-SOFT-NEXT:    bl __aeabi_d2lz769; CHECK-SOFT-NEXT:    pop {r11, lr}770; CHECK-SOFT-NEXT:    mov pc, lr771;772; CHECK-SOFTFP-LABEL: d2lz:773; CHECK-SOFTFP:         .save {r11, lr}774; CHECK-SOFTFP-NEXT:    push {r11, lr}775; CHECK-SOFTFP-NEXT:    bl __aeabi_d2lz776; CHECK-SOFTFP-NEXT:    pop {r11, lr}777; CHECK-SOFTFP-NEXT:    mov pc, lr778;779; CHECK-HARDFP-SP-LABEL: d2lz:780; CHECK-HARDFP-SP:         .save {r11, lr}781; CHECK-HARDFP-SP-NEXT:    push {r11, lr}782; CHECK-HARDFP-SP-NEXT:    vmov r0, r1, d0783; CHECK-HARDFP-SP-NEXT:    bl __aeabi_d2lz784; CHECK-HARDFP-SP-NEXT:    pop {r11, lr}785; CHECK-HARDFP-SP-NEXT:    mov pc, lr786entry:787  %conv = fptosi double %a to i64788  ret i64 %conv789}790 791define i64 @d2ulz(double %a) #0 {792; CHECK-SOFT-LABEL: d2ulz:793; CHECK-SOFT:         .save {r11, lr}794; CHECK-SOFT-NEXT:    push {r11, lr}795; CHECK-SOFT-NEXT:    bl __aeabi_d2ulz796; CHECK-SOFT-NEXT:    pop {r11, lr}797; CHECK-SOFT-NEXT:    mov pc, lr798;799; CHECK-SOFTFP-LABEL: d2ulz:800; CHECK-SOFTFP:         .save {r11, lr}801; CHECK-SOFTFP-NEXT:    push {r11, lr}802; CHECK-SOFTFP-NEXT:    bl __aeabi_d2ulz803; CHECK-SOFTFP-NEXT:    pop {r11, lr}804; CHECK-SOFTFP-NEXT:    mov pc, lr805;806; CHECK-HARDFP-SP-LABEL: d2ulz:807; CHECK-HARDFP-SP:         .save {r11, lr}808; CHECK-HARDFP-SP-NEXT:    push {r11, lr}809; CHECK-HARDFP-SP-NEXT:    vmov r0, r1, d0810; CHECK-HARDFP-SP-NEXT:    bl __aeabi_d2ulz811; CHECK-HARDFP-SP-NEXT:    pop {r11, lr}812; CHECK-HARDFP-SP-NEXT:    mov pc, lr813entry:814  %conv = fptoui double %a to i64815  ret i64 %conv816}817 818define i32 @f2iz(float %a) #0 {819; CHECK-SOFT-LABEL: f2iz:820; CHECK-SOFT:         .save {r11, lr}821; CHECK-SOFT-NEXT:    push {r11, lr}822; CHECK-SOFT-NEXT:    bl __aeabi_f2iz823; CHECK-SOFT-NEXT:    pop {r11, lr}824; CHECK-SOFT-NEXT:    mov pc, lr825;826; CHECK-SOFTFP-LABEL: f2iz:827; CHECK-SOFTFP:         vmov s0, r0828; CHECK-SOFTFP-NEXT:    vcvt.s32.f32 s0, s0829; CHECK-SOFTFP-NEXT:    vmov r0, s0830; CHECK-SOFTFP-NEXT:    mov pc, lr831;832; CHECK-HARDFP-SP-LABEL: f2iz:833; CHECK-HARDFP-SP:         vcvt.s32.f32 s0, s0834; CHECK-HARDFP-SP-NEXT:    vmov r0, s0835; CHECK-HARDFP-SP-NEXT:    mov pc, lr836entry:837  %conv = fptosi float %a to i32838  ret i32 %conv839}840 841define i32 @f2uiz(float %a) #0 {842; CHECK-SOFT-LABEL: f2uiz:843; CHECK-SOFT:         .save {r11, lr}844; CHECK-SOFT-NEXT:    push {r11, lr}845; CHECK-SOFT-NEXT:    bl __aeabi_f2uiz846; CHECK-SOFT-NEXT:    pop {r11, lr}847; CHECK-SOFT-NEXT:    mov pc, lr848;849; CHECK-SOFTFP-LABEL: f2uiz:850; CHECK-SOFTFP:         vmov s0, r0851; CHECK-SOFTFP-NEXT:    vcvt.u32.f32 s0, s0852; CHECK-SOFTFP-NEXT:    vmov r0, s0853; CHECK-SOFTFP-NEXT:    mov pc, lr854;855; CHECK-HARDFP-SP-LABEL: f2uiz:856; CHECK-HARDFP-SP:         vcvt.u32.f32 s0, s0857; CHECK-HARDFP-SP-NEXT:    vmov r0, s0858; CHECK-HARDFP-SP-NEXT:    mov pc, lr859entry:860  %conv = fptoui float %a to i32861  ret i32 %conv862}863 864define i64 @f2lz(float %a) #0 {865; CHECK-SOFT-LABEL: f2lz:866; CHECK-SOFT:         .save {r11, lr}867; CHECK-SOFT-NEXT:    push {r11, lr}868; CHECK-SOFT-NEXT:    bl __aeabi_f2lz869; CHECK-SOFT-NEXT:    pop {r11, lr}870; CHECK-SOFT-NEXT:    mov pc, lr871;872; CHECK-SOFTFP-LABEL: f2lz:873; CHECK-SOFTFP:         .save {r11, lr}874; CHECK-SOFTFP-NEXT:    push {r11, lr}875; CHECK-SOFTFP-NEXT:    bl __aeabi_f2lz876; CHECK-SOFTFP-NEXT:    pop {r11, lr}877; CHECK-SOFTFP-NEXT:    mov pc, lr878;879; CHECK-HARDFP-SP-LABEL: f2lz:880; CHECK-HARDFP-SP:         .save {r11, lr}881; CHECK-HARDFP-SP-NEXT:    push {r11, lr}882; CHECK-HARDFP-SP-NEXT:    vmov r0, s0883; CHECK-HARDFP-SP-NEXT:    bl __aeabi_f2lz884; CHECK-HARDFP-SP-NEXT:    pop {r11, lr}885; CHECK-HARDFP-SP-NEXT:    mov pc, lr886entry:887  %conv = fptosi float %a to i64888  ret i64 %conv889}890 891define i64 @f2ulz(float %a) #0 {892; CHECK-SOFT-LABEL: f2ulz:893; CHECK-SOFT:         .save {r11, lr}894; CHECK-SOFT-NEXT:    push {r11, lr}895; CHECK-SOFT-NEXT:    bl __aeabi_f2ulz896; CHECK-SOFT-NEXT:    pop {r11, lr}897; CHECK-SOFT-NEXT:    mov pc, lr898;899; CHECK-SOFTFP-LABEL: f2ulz:900; CHECK-SOFTFP:         .save {r11, lr}901; CHECK-SOFTFP-NEXT:    push {r11, lr}902; CHECK-SOFTFP-NEXT:    bl __aeabi_f2ulz903; CHECK-SOFTFP-NEXT:    pop {r11, lr}904; CHECK-SOFTFP-NEXT:    mov pc, lr905;906; CHECK-HARDFP-SP-LABEL: f2ulz:907; CHECK-HARDFP-SP:         .save {r11, lr}908; CHECK-HARDFP-SP-NEXT:    push {r11, lr}909; CHECK-HARDFP-SP-NEXT:    vmov r0, s0910; CHECK-HARDFP-SP-NEXT:    bl __aeabi_f2ulz911; CHECK-HARDFP-SP-NEXT:    pop {r11, lr}912; CHECK-HARDFP-SP-NEXT:    mov pc, lr913entry:914  %conv = fptoui float %a to i64915  ret i64 %conv916}917 918define float @d2f(double %a) #0 {919; CHECK-SOFT-LABEL: d2f:920; CHECK-SOFT:         .save {r11, lr}921; CHECK-SOFT-NEXT:    push {r11, lr}922; CHECK-SOFT-NEXT:    bl __aeabi_d2f923; CHECK-SOFT-NEXT:    pop {r11, lr}924; CHECK-SOFT-NEXT:    mov pc, lr925;926; CHECK-SOFTFP-LABEL: d2f:927; CHECK-SOFTFP:         vmov d16, r0, r1928; CHECK-SOFTFP-NEXT:    vcvt.f32.f64 s0, d16929; CHECK-SOFTFP-NEXT:    vmov r0, s0930; CHECK-SOFTFP-NEXT:    mov pc, lr931;932; CHECK-HARDFP-DP-LABEL: d2f:933; CHECK-HARDFP-DP:         vcvt.f32.f64 s0, d0934; CHECK-HARDFP-DP-NEXT:    mov pc, lr935;936; CHECK-HARDFP-SPONLY-LABEL: d2f:937; CHECK-HARDFP-SPONLY:         .save {r11, lr}938; CHECK-HARDFP-SPONLY-NEXT:    push {r11, lr}939; CHECK-HARDFP-SPONLY-NEXT:    vmov r0, r1, d0940; CHECK-HARDFP-SPONLY-NEXT:    bl __aeabi_d2f941; CHECK-HARDFP-SPONLY-NEXT:    vmov s0, r0942; CHECK-HARDFP-SPONLY-NEXT:    pop {r11, lr}943; CHECK-HARDFP-SPONLY-NEXT:    mov pc, lr944entry:945  %conv = fptrunc double %a to float946  ret float %conv947}948 949define double @f2d(float %a) #0 {950; CHECK-SOFT-LABEL: f2d:951; CHECK-SOFT:         .save {r11, lr}952; CHECK-SOFT-NEXT:    push {r11, lr}953; CHECK-SOFT-NEXT:    bl __aeabi_f2d954; CHECK-SOFT-NEXT:    pop {r11, lr}955; CHECK-SOFT-NEXT:    mov pc, lr956;957; CHECK-SOFTFP-LABEL: f2d:958; CHECK-SOFTFP:         vmov s0, r0959; CHECK-SOFTFP-NEXT:    vcvt.f64.f32 d16, s0960; CHECK-SOFTFP-NEXT:    vmov r0, r1, d16961; CHECK-SOFTFP-NEXT:    mov pc, lr962;963; CHECK-HARDFP-DP-LABEL: f2d:964; CHECK-HARDFP-DP:         vcvt.f64.f32 d0, s0965; CHECK-HARDFP-DP-NEXT:    mov pc, lr966;967; CHECK-HARDFP-SPONLY-LABEL: f2d:968; CHECK-HARDFP-SPONLY:         .save {r11, lr}969; CHECK-HARDFP-SPONLY-NEXT:    push {r11, lr}970; CHECK-HARDFP-SPONLY-NEXT:    vmov r0, s0971; CHECK-HARDFP-SPONLY-NEXT:    bl __aeabi_f2d972; CHECK-HARDFP-SPONLY-NEXT:    vmov d0, r0, r1973; CHECK-HARDFP-SPONLY-NEXT:    pop {r11, lr}974; CHECK-HARDFP-SPONLY-NEXT:    mov pc, lr975entry:976  %conv = fpext float %a to double977  ret double %conv978}979 980define double @i2d(i32 %a) #0 {981; CHECK-SOFT-LABEL: i2d:982; CHECK-SOFT:         .save {r11, lr}983; CHECK-SOFT-NEXT:    push {r11, lr}984; CHECK-SOFT-NEXT:    bl __aeabi_i2d985; CHECK-SOFT-NEXT:    pop {r11, lr}986; CHECK-SOFT-NEXT:    mov pc, lr987;988; CHECK-SOFTFP-LABEL: i2d:989; CHECK-SOFTFP:         vmov s0, r0990; CHECK-SOFTFP-NEXT:    vcvt.f64.s32 d16, s0991; CHECK-SOFTFP-NEXT:    vmov r0, r1, d16992; CHECK-SOFTFP-NEXT:    mov pc, lr993;994; CHECK-HARDFP-DP-LABEL: i2d:995; CHECK-HARDFP-DP:         vmov s0, r0996; CHECK-HARDFP-DP-NEXT:    vcvt.f64.s32 d0, s0997; CHECK-HARDFP-DP-NEXT:    mov pc, lr998;999; CHECK-HARDFP-SPONLY-LABEL: i2d:1000; CHECK-HARDFP-SPONLY:         .save {r11, lr}1001; CHECK-HARDFP-SPONLY-NEXT:    push {r11, lr}1002; CHECK-HARDFP-SPONLY-NEXT:    bl __aeabi_i2d1003; CHECK-HARDFP-SPONLY-NEXT:    vmov d0, r0, r11004; CHECK-HARDFP-SPONLY-NEXT:    pop {r11, lr}1005; CHECK-HARDFP-SPONLY-NEXT:    mov pc, lr1006entry:1007  %conv = sitofp i32 %a to double1008  ret double %conv1009}1010 1011define double @ui2d(i32 %a) #0 {1012; CHECK-SOFT-LABEL: ui2d:1013; CHECK-SOFT:         .save {r11, lr}1014; CHECK-SOFT-NEXT:    push {r11, lr}1015; CHECK-SOFT-NEXT:    bl __aeabi_ui2d1016; CHECK-SOFT-NEXT:    pop {r11, lr}1017; CHECK-SOFT-NEXT:    mov pc, lr1018;1019; CHECK-SOFTFP-LABEL: ui2d:1020; CHECK-SOFTFP:         vmov s0, r01021; CHECK-SOFTFP-NEXT:    vcvt.f64.u32 d16, s01022; CHECK-SOFTFP-NEXT:    vmov r0, r1, d161023; CHECK-SOFTFP-NEXT:    mov pc, lr1024;1025; CHECK-HARDFP-DP-LABEL: ui2d:1026; CHECK-HARDFP-DP:         vmov s0, r01027; CHECK-HARDFP-DP-NEXT:    vcvt.f64.u32 d0, s01028; CHECK-HARDFP-DP-NEXT:    mov pc, lr1029;1030; CHECK-HARDFP-SPONLY-LABEL: ui2d:1031; CHECK-HARDFP-SPONLY:         .save {r11, lr}1032; CHECK-HARDFP-SPONLY-NEXT:    push {r11, lr}1033; CHECK-HARDFP-SPONLY-NEXT:    bl __aeabi_ui2d1034; CHECK-HARDFP-SPONLY-NEXT:    vmov d0, r0, r11035; CHECK-HARDFP-SPONLY-NEXT:    pop {r11, lr}1036; CHECK-HARDFP-SPONLY-NEXT:    mov pc, lr1037entry:1038  %conv = uitofp i32 %a to double1039  ret double %conv1040}1041 1042define double @l2d(i64 %a) #0 {1043; CHECK-SOFT-LABEL: l2d:1044; CHECK-SOFT:         .save {r11, lr}1045; CHECK-SOFT-NEXT:    push {r11, lr}1046; CHECK-SOFT-NEXT:    bl __aeabi_l2d1047; CHECK-SOFT-NEXT:    pop {r11, lr}1048; CHECK-SOFT-NEXT:    mov pc, lr1049;1050; CHECK-SOFTFP-LABEL: l2d:1051; CHECK-SOFTFP:         .save {r11, lr}1052; CHECK-SOFTFP-NEXT:    push {r11, lr}1053; CHECK-SOFTFP-NEXT:    bl __aeabi_l2d1054; CHECK-SOFTFP-NEXT:    pop {r11, lr}1055; CHECK-SOFTFP-NEXT:    mov pc, lr1056;1057; CHECK-HARDFP-SP-LABEL: l2d:1058; CHECK-HARDFP-SP:         .save {r11, lr}1059; CHECK-HARDFP-SP-NEXT:    push {r11, lr}1060; CHECK-HARDFP-SP-NEXT:    bl __aeabi_l2d1061; CHECK-HARDFP-SP-NEXT:    vmov d0, r0, r11062; CHECK-HARDFP-SP-NEXT:    pop {r11, lr}1063; CHECK-HARDFP-SP-NEXT:    mov pc, lr1064entry:1065  %conv = sitofp i64 %a to double1066  ret double %conv1067}1068 1069define double @ul2d(i64 %a) #0 {1070; CHECK-SOFT-LABEL: ul2d:1071; CHECK-SOFT:         .save {r11, lr}1072; CHECK-SOFT-NEXT:    push {r11, lr}1073; CHECK-SOFT-NEXT:    bl __aeabi_ul2d1074; CHECK-SOFT-NEXT:    pop {r11, lr}1075; CHECK-SOFT-NEXT:    mov pc, lr1076;1077; CHECK-SOFTFP-LABEL: ul2d:1078; CHECK-SOFTFP:         .save {r11, lr}1079; CHECK-SOFTFP-NEXT:    push {r11, lr}1080; CHECK-SOFTFP-NEXT:    bl __aeabi_ul2d1081; CHECK-SOFTFP-NEXT:    pop {r11, lr}1082; CHECK-SOFTFP-NEXT:    mov pc, lr1083;1084; CHECK-HARDFP-SP-LABEL: ul2d:1085; CHECK-HARDFP-SP:         .save {r11, lr}1086; CHECK-HARDFP-SP-NEXT:    push {r11, lr}1087; CHECK-HARDFP-SP-NEXT:    bl __aeabi_ul2d1088; CHECK-HARDFP-SP-NEXT:    vmov d0, r0, r11089; CHECK-HARDFP-SP-NEXT:    pop {r11, lr}1090; CHECK-HARDFP-SP-NEXT:    mov pc, lr1091entry:1092  %conv = uitofp i64 %a to double1093  ret double %conv1094}1095 1096define float @i2f(i32 %a) #0 {1097; CHECK-SOFT-LABEL: i2f:1098; CHECK-SOFT:         .save {r11, lr}1099; CHECK-SOFT-NEXT:    push {r11, lr}1100; CHECK-SOFT-NEXT:    bl __aeabi_i2f1101; CHECK-SOFT-NEXT:    pop {r11, lr}1102; CHECK-SOFT-NEXT:    mov pc, lr1103;1104; CHECK-SOFTFP-LABEL: i2f:1105; CHECK-SOFTFP:         vmov s0, r01106; CHECK-SOFTFP-NEXT:    vcvt.f32.s32 s0, s01107; CHECK-SOFTFP-NEXT:    vmov r0, s01108; CHECK-SOFTFP-NEXT:    mov pc, lr1109;1110; CHECK-HARDFP-SP-LABEL: i2f:1111; CHECK-HARDFP-SP:         vmov s0, r01112; CHECK-HARDFP-SP-NEXT:    vcvt.f32.s32 s0, s01113; CHECK-HARDFP-SP-NEXT:    mov pc, lr1114entry:1115  %conv = sitofp i32 %a to float1116  ret float %conv1117}1118 1119define float @ui2f(i32 %a) #0 {1120; CHECK-SOFT-LABEL: ui2f:1121; CHECK-SOFT:         .save {r11, lr}1122; CHECK-SOFT-NEXT:    push {r11, lr}1123; CHECK-SOFT-NEXT:    bl __aeabi_ui2f1124; CHECK-SOFT-NEXT:    pop {r11, lr}1125; CHECK-SOFT-NEXT:    mov pc, lr1126;1127; CHECK-SOFTFP-LABEL: ui2f:1128; CHECK-SOFTFP:         vmov s0, r01129; CHECK-SOFTFP-NEXT:    vcvt.f32.u32 s0, s01130; CHECK-SOFTFP-NEXT:    vmov r0, s01131; CHECK-SOFTFP-NEXT:    mov pc, lr1132;1133; CHECK-HARDFP-SP-LABEL: ui2f:1134; CHECK-HARDFP-SP:         vmov s0, r01135; CHECK-HARDFP-SP-NEXT:    vcvt.f32.u32 s0, s01136; CHECK-HARDFP-SP-NEXT:    mov pc, lr1137entry:1138  %conv = uitofp i32 %a to float1139  ret float %conv1140}1141 1142define float @l2f(i64 %a) #0 {1143; CHECK-SOFT-LABEL: l2f:1144; CHECK-SOFT:         .save {r11, lr}1145; CHECK-SOFT-NEXT:    push {r11, lr}1146; CHECK-SOFT-NEXT:    bl __aeabi_l2f1147; CHECK-SOFT-NEXT:    pop {r11, lr}1148; CHECK-SOFT-NEXT:    mov pc, lr1149;1150; CHECK-SOFTFP-LABEL: l2f:1151; CHECK-SOFTFP:         .save {r11, lr}1152; CHECK-SOFTFP-NEXT:    push {r11, lr}1153; CHECK-SOFTFP-NEXT:    bl __aeabi_l2f1154; CHECK-SOFTFP-NEXT:    pop {r11, lr}1155; CHECK-SOFTFP-NEXT:    mov pc, lr1156;1157; CHECK-HARDFP-SP-LABEL: l2f:1158; CHECK-HARDFP-SP:         .save {r11, lr}1159; CHECK-HARDFP-SP-NEXT:    push {r11, lr}1160; CHECK-HARDFP-SP-NEXT:    bl __aeabi_l2f1161; CHECK-HARDFP-SP-NEXT:    vmov s0, r01162; CHECK-HARDFP-SP-NEXT:    pop {r11, lr}1163; CHECK-HARDFP-SP-NEXT:    mov pc, lr1164entry:1165  %conv = sitofp i64 %a to float1166  ret float %conv1167}1168 1169define float @ul2f(i64 %a) #0 {1170; CHECK-SOFT-LABEL: ul2f:1171; CHECK-SOFT:         .save {r11, lr}1172; CHECK-SOFT-NEXT:    push {r11, lr}1173; CHECK-SOFT-NEXT:    bl __aeabi_ul2f1174; CHECK-SOFT-NEXT:    pop {r11, lr}1175; CHECK-SOFT-NEXT:    mov pc, lr1176;1177; CHECK-SOFTFP-LABEL: ul2f:1178; CHECK-SOFTFP:         .save {r11, lr}1179; CHECK-SOFTFP-NEXT:    push {r11, lr}1180; CHECK-SOFTFP-NEXT:    bl __aeabi_ul2f1181; CHECK-SOFTFP-NEXT:    pop {r11, lr}1182; CHECK-SOFTFP-NEXT:    mov pc, lr1183;1184; CHECK-HARDFP-SP-LABEL: ul2f:1185; CHECK-HARDFP-SP:         .save {r11, lr}1186; CHECK-HARDFP-SP-NEXT:    push {r11, lr}1187; CHECK-HARDFP-SP-NEXT:    bl __aeabi_ul2f1188; CHECK-HARDFP-SP-NEXT:    vmov s0, r01189; CHECK-HARDFP-SP-NEXT:    pop {r11, lr}1190; CHECK-HARDFP-SP-NEXT:    mov pc, lr1191entry:1192  %conv = uitofp i64 %a to float1193  ret float %conv1194}1195attributes #0 = { nounwind }1196