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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=arm < %s | FileCheck %s -check-prefix=SOFT-FLOAT3; RUN: llc -mtriple=arm -mattr=+vfp4d16sp < %s | FileCheck %s -check-prefix=SOFT-FLOAT-VFP324; RUN: llc -mtriple=arm -mattr=+vfp4d16sp,+fp64 < %s | FileCheck %s -check-prefix=SOFT-FLOAT-VFP645 6define float @fmuladd_intrinsic_f32(float %a, float %b, float %c) #0 {7; SOFT-FLOAT-LABEL: fmuladd_intrinsic_f32:8; SOFT-FLOAT: @ %bb.0:9; SOFT-FLOAT-NEXT: push {r4, lr}10; SOFT-FLOAT-NEXT: mov r4, r211; SOFT-FLOAT-NEXT: bl __mulsf312; SOFT-FLOAT-NEXT: mov r1, r413; SOFT-FLOAT-NEXT: bl __addsf314; SOFT-FLOAT-NEXT: pop {r4, lr}15; SOFT-FLOAT-NEXT: mov pc, lr16;17; SOFT-FLOAT-VFP32-LABEL: fmuladd_intrinsic_f32:18; SOFT-FLOAT-VFP32: @ %bb.0:19; SOFT-FLOAT-VFP32-NEXT: push {r4, lr}20; SOFT-FLOAT-VFP32-NEXT: mov r4, r221; SOFT-FLOAT-VFP32-NEXT: bl __mulsf322; SOFT-FLOAT-VFP32-NEXT: mov r1, r423; SOFT-FLOAT-VFP32-NEXT: bl __addsf324; SOFT-FLOAT-VFP32-NEXT: pop {r4, lr}25; SOFT-FLOAT-VFP32-NEXT: mov pc, lr26;27; SOFT-FLOAT-VFP64-LABEL: fmuladd_intrinsic_f32:28; SOFT-FLOAT-VFP64: @ %bb.0:29; SOFT-FLOAT-VFP64-NEXT: push {r4, lr}30; SOFT-FLOAT-VFP64-NEXT: mov r4, r231; SOFT-FLOAT-VFP64-NEXT: bl __mulsf332; SOFT-FLOAT-VFP64-NEXT: mov r1, r433; SOFT-FLOAT-VFP64-NEXT: bl __addsf334; SOFT-FLOAT-VFP64-NEXT: pop {r4, lr}35; SOFT-FLOAT-VFP64-NEXT: mov pc, lr36 %result = call float @llvm.fmuladd.f32(float %a, float %b, float %c)37 ret float %result38}39 40define double @fmuladd_intrinsic_f64(double %a, double %b, double %c) #0 {41; SOFT-FLOAT-LABEL: fmuladd_intrinsic_f64:42; SOFT-FLOAT: @ %bb.0:43; SOFT-FLOAT-NEXT: push {r11, lr}44; SOFT-FLOAT-NEXT: bl __muldf345; SOFT-FLOAT-NEXT: ldr r2, [sp, #8]46; SOFT-FLOAT-NEXT: ldr r3, [sp, #12]47; SOFT-FLOAT-NEXT: bl __adddf348; SOFT-FLOAT-NEXT: pop {r11, lr}49; SOFT-FLOAT-NEXT: mov pc, lr50;51; SOFT-FLOAT-VFP32-LABEL: fmuladd_intrinsic_f64:52; SOFT-FLOAT-VFP32: @ %bb.0:53; SOFT-FLOAT-VFP32-NEXT: push {r11, lr}54; SOFT-FLOAT-VFP32-NEXT: bl __muldf355; SOFT-FLOAT-VFP32-NEXT: ldr r2, [sp, #8]56; SOFT-FLOAT-VFP32-NEXT: ldr r3, [sp, #12]57; SOFT-FLOAT-VFP32-NEXT: bl __adddf358; SOFT-FLOAT-VFP32-NEXT: pop {r11, lr}59; SOFT-FLOAT-VFP32-NEXT: mov pc, lr60;61; SOFT-FLOAT-VFP64-LABEL: fmuladd_intrinsic_f64:62; SOFT-FLOAT-VFP64: @ %bb.0:63; SOFT-FLOAT-VFP64-NEXT: push {r11, lr}64; SOFT-FLOAT-VFP64-NEXT: bl __muldf365; SOFT-FLOAT-VFP64-NEXT: ldr r2, [sp, #8]66; SOFT-FLOAT-VFP64-NEXT: ldr r3, [sp, #12]67; SOFT-FLOAT-VFP64-NEXT: bl __adddf368; SOFT-FLOAT-VFP64-NEXT: pop {r11, lr}69; SOFT-FLOAT-VFP64-NEXT: mov pc, lr70 %result = call double @llvm.fmuladd.f64(double %a, double %b, double %c)71 ret double %result72}73 74define float @fmuladd_contract_f32(float %a, float %b, float %c) #0 {75; SOFT-FLOAT-LABEL: fmuladd_contract_f32:76; SOFT-FLOAT: @ %bb.0:77; SOFT-FLOAT-NEXT: push {r4, lr}78; SOFT-FLOAT-NEXT: mov r4, r279; SOFT-FLOAT-NEXT: bl __mulsf380; SOFT-FLOAT-NEXT: mov r1, r481; SOFT-FLOAT-NEXT: bl __addsf382; SOFT-FLOAT-NEXT: pop {r4, lr}83; SOFT-FLOAT-NEXT: mov pc, lr84;85; SOFT-FLOAT-VFP32-LABEL: fmuladd_contract_f32:86; SOFT-FLOAT-VFP32: @ %bb.0:87; SOFT-FLOAT-VFP32-NEXT: push {r4, lr}88; SOFT-FLOAT-VFP32-NEXT: mov r4, r289; SOFT-FLOAT-VFP32-NEXT: bl __mulsf390; SOFT-FLOAT-VFP32-NEXT: mov r1, r491; SOFT-FLOAT-VFP32-NEXT: bl __addsf392; SOFT-FLOAT-VFP32-NEXT: pop {r4, lr}93; SOFT-FLOAT-VFP32-NEXT: mov pc, lr94;95; SOFT-FLOAT-VFP64-LABEL: fmuladd_contract_f32:96; SOFT-FLOAT-VFP64: @ %bb.0:97; SOFT-FLOAT-VFP64-NEXT: push {r4, lr}98; SOFT-FLOAT-VFP64-NEXT: mov r4, r299; SOFT-FLOAT-VFP64-NEXT: bl __mulsf3100; SOFT-FLOAT-VFP64-NEXT: mov r1, r4101; SOFT-FLOAT-VFP64-NEXT: bl __addsf3102; SOFT-FLOAT-VFP64-NEXT: pop {r4, lr}103; SOFT-FLOAT-VFP64-NEXT: mov pc, lr104 %product = fmul contract float %a, %b105 %result = fadd contract float %product, %c106 ret float %result107}108 109define double @fmuladd_contract_f64(double %a, double %b, double %c) #0 {110; SOFT-FLOAT-LABEL: fmuladd_contract_f64:111; SOFT-FLOAT: @ %bb.0:112; SOFT-FLOAT-NEXT: push {r11, lr}113; SOFT-FLOAT-NEXT: bl __muldf3114; SOFT-FLOAT-NEXT: ldr r2, [sp, #8]115; SOFT-FLOAT-NEXT: ldr r3, [sp, #12]116; SOFT-FLOAT-NEXT: bl __adddf3117; SOFT-FLOAT-NEXT: pop {r11, lr}118; SOFT-FLOAT-NEXT: mov pc, lr119;120; SOFT-FLOAT-VFP32-LABEL: fmuladd_contract_f64:121; SOFT-FLOAT-VFP32: @ %bb.0:122; SOFT-FLOAT-VFP32-NEXT: push {r11, lr}123; SOFT-FLOAT-VFP32-NEXT: bl __muldf3124; SOFT-FLOAT-VFP32-NEXT: ldr r2, [sp, #8]125; SOFT-FLOAT-VFP32-NEXT: ldr r3, [sp, #12]126; SOFT-FLOAT-VFP32-NEXT: bl __adddf3127; SOFT-FLOAT-VFP32-NEXT: pop {r11, lr}128; SOFT-FLOAT-VFP32-NEXT: mov pc, lr129;130; SOFT-FLOAT-VFP64-LABEL: fmuladd_contract_f64:131; SOFT-FLOAT-VFP64: @ %bb.0:132; SOFT-FLOAT-VFP64-NEXT: push {r11, lr}133; SOFT-FLOAT-VFP64-NEXT: bl __muldf3134; SOFT-FLOAT-VFP64-NEXT: ldr r2, [sp, #8]135; SOFT-FLOAT-VFP64-NEXT: ldr r3, [sp, #12]136; SOFT-FLOAT-VFP64-NEXT: bl __adddf3137; SOFT-FLOAT-VFP64-NEXT: pop {r11, lr}138; SOFT-FLOAT-VFP64-NEXT: mov pc, lr139 %product = fmul contract double %a, %b140 %result = fadd contract double %product, %c141 ret double %result142}143 144define <4 x float> @fmuladd_contract_v4f32(<4 x float> %a, <4 x float> %b, <4 x float> %c) #0 {145; SOFT-FLOAT-LABEL: fmuladd_contract_v4f32:146; SOFT-FLOAT: @ %bb.0:147; SOFT-FLOAT-NEXT: push {r4, r5, r6, r7, r11, lr}148; SOFT-FLOAT-NEXT: mov r7, r1149; SOFT-FLOAT-NEXT: ldr r1, [sp, #24]150; SOFT-FLOAT-NEXT: mov r4, r3151; SOFT-FLOAT-NEXT: mov r6, r2152; SOFT-FLOAT-NEXT: bl __mulsf3153; SOFT-FLOAT-NEXT: ldr r1, [sp, #40]154; SOFT-FLOAT-NEXT: bl __addsf3155; SOFT-FLOAT-NEXT: ldr r1, [sp, #28]156; SOFT-FLOAT-NEXT: mov r5, r0157; SOFT-FLOAT-NEXT: mov r0, r7158; SOFT-FLOAT-NEXT: bl __mulsf3159; SOFT-FLOAT-NEXT: ldr r1, [sp, #44]160; SOFT-FLOAT-NEXT: bl __addsf3161; SOFT-FLOAT-NEXT: ldr r1, [sp, #32]162; SOFT-FLOAT-NEXT: mov r7, r0163; SOFT-FLOAT-NEXT: mov r0, r6164; SOFT-FLOAT-NEXT: bl __mulsf3165; SOFT-FLOAT-NEXT: ldr r1, [sp, #48]166; SOFT-FLOAT-NEXT: bl __addsf3167; SOFT-FLOAT-NEXT: ldr r1, [sp, #36]168; SOFT-FLOAT-NEXT: mov r6, r0169; SOFT-FLOAT-NEXT: mov r0, r4170; SOFT-FLOAT-NEXT: bl __mulsf3171; SOFT-FLOAT-NEXT: ldr r1, [sp, #52]172; SOFT-FLOAT-NEXT: bl __addsf3173; SOFT-FLOAT-NEXT: mov r3, r0174; SOFT-FLOAT-NEXT: mov r0, r5175; SOFT-FLOAT-NEXT: mov r1, r7176; SOFT-FLOAT-NEXT: mov r2, r6177; SOFT-FLOAT-NEXT: pop {r4, r5, r6, r7, r11, lr}178; SOFT-FLOAT-NEXT: mov pc, lr179;180; SOFT-FLOAT-VFP32-LABEL: fmuladd_contract_v4f32:181; SOFT-FLOAT-VFP32: @ %bb.0:182; SOFT-FLOAT-VFP32-NEXT: push {r4, r5, r6, r7, r11, lr}183; SOFT-FLOAT-VFP32-NEXT: mov r7, r1184; SOFT-FLOAT-VFP32-NEXT: ldr r1, [sp, #24]185; SOFT-FLOAT-VFP32-NEXT: mov r4, r3186; SOFT-FLOAT-VFP32-NEXT: mov r6, r2187; SOFT-FLOAT-VFP32-NEXT: bl __mulsf3188; SOFT-FLOAT-VFP32-NEXT: ldr r1, [sp, #40]189; SOFT-FLOAT-VFP32-NEXT: bl __addsf3190; SOFT-FLOAT-VFP32-NEXT: ldr r1, [sp, #28]191; SOFT-FLOAT-VFP32-NEXT: mov r5, r0192; SOFT-FLOAT-VFP32-NEXT: mov r0, r7193; SOFT-FLOAT-VFP32-NEXT: bl __mulsf3194; SOFT-FLOAT-VFP32-NEXT: ldr r1, [sp, #44]195; SOFT-FLOAT-VFP32-NEXT: bl __addsf3196; SOFT-FLOAT-VFP32-NEXT: ldr r1, [sp, #32]197; SOFT-FLOAT-VFP32-NEXT: mov r7, r0198; SOFT-FLOAT-VFP32-NEXT: mov r0, r6199; SOFT-FLOAT-VFP32-NEXT: bl __mulsf3200; SOFT-FLOAT-VFP32-NEXT: ldr r1, [sp, #48]201; SOFT-FLOAT-VFP32-NEXT: bl __addsf3202; SOFT-FLOAT-VFP32-NEXT: ldr r1, [sp, #36]203; SOFT-FLOAT-VFP32-NEXT: mov r6, r0204; SOFT-FLOAT-VFP32-NEXT: mov r0, r4205; SOFT-FLOAT-VFP32-NEXT: bl __mulsf3206; SOFT-FLOAT-VFP32-NEXT: ldr r1, [sp, #52]207; SOFT-FLOAT-VFP32-NEXT: bl __addsf3208; SOFT-FLOAT-VFP32-NEXT: mov r3, r0209; SOFT-FLOAT-VFP32-NEXT: mov r0, r5210; SOFT-FLOAT-VFP32-NEXT: mov r1, r7211; SOFT-FLOAT-VFP32-NEXT: mov r2, r6212; SOFT-FLOAT-VFP32-NEXT: pop {r4, r5, r6, r7, r11, lr}213; SOFT-FLOAT-VFP32-NEXT: mov pc, lr214;215; SOFT-FLOAT-VFP64-LABEL: fmuladd_contract_v4f32:216; SOFT-FLOAT-VFP64: @ %bb.0:217; SOFT-FLOAT-VFP64-NEXT: push {r4, r5, r6, r7, r11, lr}218; SOFT-FLOAT-VFP64-NEXT: mov r7, r1219; SOFT-FLOAT-VFP64-NEXT: ldr r1, [sp, #24]220; SOFT-FLOAT-VFP64-NEXT: mov r4, r3221; SOFT-FLOAT-VFP64-NEXT: mov r6, r2222; SOFT-FLOAT-VFP64-NEXT: bl __mulsf3223; SOFT-FLOAT-VFP64-NEXT: ldr r1, [sp, #40]224; SOFT-FLOAT-VFP64-NEXT: bl __addsf3225; SOFT-FLOAT-VFP64-NEXT: ldr r1, [sp, #28]226; SOFT-FLOAT-VFP64-NEXT: mov r5, r0227; SOFT-FLOAT-VFP64-NEXT: mov r0, r7228; SOFT-FLOAT-VFP64-NEXT: bl __mulsf3229; SOFT-FLOAT-VFP64-NEXT: ldr r1, [sp, #44]230; SOFT-FLOAT-VFP64-NEXT: bl __addsf3231; SOFT-FLOAT-VFP64-NEXT: ldr r1, [sp, #32]232; SOFT-FLOAT-VFP64-NEXT: mov r7, r0233; SOFT-FLOAT-VFP64-NEXT: mov r0, r6234; SOFT-FLOAT-VFP64-NEXT: bl __mulsf3235; SOFT-FLOAT-VFP64-NEXT: ldr r1, [sp, #48]236; SOFT-FLOAT-VFP64-NEXT: bl __addsf3237; SOFT-FLOAT-VFP64-NEXT: ldr r1, [sp, #36]238; SOFT-FLOAT-VFP64-NEXT: mov r6, r0239; SOFT-FLOAT-VFP64-NEXT: mov r0, r4240; SOFT-FLOAT-VFP64-NEXT: bl __mulsf3241; SOFT-FLOAT-VFP64-NEXT: ldr r1, [sp, #52]242; SOFT-FLOAT-VFP64-NEXT: bl __addsf3243; SOFT-FLOAT-VFP64-NEXT: mov r3, r0244; SOFT-FLOAT-VFP64-NEXT: mov r0, r5245; SOFT-FLOAT-VFP64-NEXT: mov r1, r7246; SOFT-FLOAT-VFP64-NEXT: mov r2, r6247; SOFT-FLOAT-VFP64-NEXT: pop {r4, r5, r6, r7, r11, lr}248; SOFT-FLOAT-VFP64-NEXT: mov pc, lr249 %product = fmul contract <4 x float> %a, %b250 %result = fadd contract <4 x float> %product, %c251 ret <4 x float> %result252}253 254define <4 x double> @fmuladd_contract_v4f64(<4 x double> %a, <4 x double> %b, <4 x double> %c) #0 {255; SOFT-FLOAT-LABEL: fmuladd_contract_v4f64:256; SOFT-FLOAT: @ %bb.0:257; SOFT-FLOAT-NEXT: push {r4, r5, r6, lr}258; SOFT-FLOAT-NEXT: mov r5, r3259; SOFT-FLOAT-NEXT: mov r6, r2260; SOFT-FLOAT-NEXT: mov r4, r0261; SOFT-FLOAT-NEXT: ldr r0, [sp, #32]262; SOFT-FLOAT-NEXT: ldr r1, [sp, #36]263; SOFT-FLOAT-NEXT: ldr r2, [sp, #64]264; SOFT-FLOAT-NEXT: ldr r3, [sp, #68]265; SOFT-FLOAT-NEXT: bl __muldf3266; SOFT-FLOAT-NEXT: ldr r2, [sp, #96]267; SOFT-FLOAT-NEXT: ldr r3, [sp, #100]268; SOFT-FLOAT-NEXT: bl __adddf3269; SOFT-FLOAT-NEXT: str r0, [r4, #24]270; SOFT-FLOAT-NEXT: str r1, [r4, #28]271; SOFT-FLOAT-NEXT: ldr r0, [sp, #24]272; SOFT-FLOAT-NEXT: ldr r1, [sp, #28]273; SOFT-FLOAT-NEXT: ldr r2, [sp, #56]274; SOFT-FLOAT-NEXT: ldr r3, [sp, #60]275; SOFT-FLOAT-NEXT: bl __muldf3276; SOFT-FLOAT-NEXT: ldr r2, [sp, #88]277; SOFT-FLOAT-NEXT: ldr r3, [sp, #92]278; SOFT-FLOAT-NEXT: bl __adddf3279; SOFT-FLOAT-NEXT: str r0, [r4, #16]280; SOFT-FLOAT-NEXT: str r1, [r4, #20]281; SOFT-FLOAT-NEXT: ldr r0, [sp, #16]282; SOFT-FLOAT-NEXT: ldr r1, [sp, #20]283; SOFT-FLOAT-NEXT: ldr r2, [sp, #48]284; SOFT-FLOAT-NEXT: ldr r3, [sp, #52]285; SOFT-FLOAT-NEXT: bl __muldf3286; SOFT-FLOAT-NEXT: ldr r2, [sp, #80]287; SOFT-FLOAT-NEXT: ldr r3, [sp, #84]288; SOFT-FLOAT-NEXT: bl __adddf3289; SOFT-FLOAT-NEXT: ldr r2, [sp, #40]290; SOFT-FLOAT-NEXT: ldr r3, [sp, #44]291; SOFT-FLOAT-NEXT: str r0, [r4, #8]292; SOFT-FLOAT-NEXT: mov r0, r6293; SOFT-FLOAT-NEXT: str r1, [r4, #12]294; SOFT-FLOAT-NEXT: mov r1, r5295; SOFT-FLOAT-NEXT: bl __muldf3296; SOFT-FLOAT-NEXT: ldr r2, [sp, #72]297; SOFT-FLOAT-NEXT: ldr r3, [sp, #76]298; SOFT-FLOAT-NEXT: bl __adddf3299; SOFT-FLOAT-NEXT: stm r4, {r0, r1}300; SOFT-FLOAT-NEXT: pop {r4, r5, r6, lr}301; SOFT-FLOAT-NEXT: mov pc, lr302;303; SOFT-FLOAT-VFP32-LABEL: fmuladd_contract_v4f64:304; SOFT-FLOAT-VFP32: @ %bb.0:305; SOFT-FLOAT-VFP32-NEXT: push {r4, r5, r6, lr}306; SOFT-FLOAT-VFP32-NEXT: mov r5, r3307; SOFT-FLOAT-VFP32-NEXT: mov r6, r2308; SOFT-FLOAT-VFP32-NEXT: mov r4, r0309; SOFT-FLOAT-VFP32-NEXT: ldr r0, [sp, #32]310; SOFT-FLOAT-VFP32-NEXT: ldr r1, [sp, #36]311; SOFT-FLOAT-VFP32-NEXT: ldr r2, [sp, #64]312; SOFT-FLOAT-VFP32-NEXT: ldr r3, [sp, #68]313; SOFT-FLOAT-VFP32-NEXT: bl __muldf3314; SOFT-FLOAT-VFP32-NEXT: ldr r2, [sp, #96]315; SOFT-FLOAT-VFP32-NEXT: ldr r3, [sp, #100]316; SOFT-FLOAT-VFP32-NEXT: bl __adddf3317; SOFT-FLOAT-VFP32-NEXT: str r0, [r4, #24]318; SOFT-FLOAT-VFP32-NEXT: str r1, [r4, #28]319; SOFT-FLOAT-VFP32-NEXT: ldr r0, [sp, #24]320; SOFT-FLOAT-VFP32-NEXT: ldr r1, [sp, #28]321; SOFT-FLOAT-VFP32-NEXT: ldr r2, [sp, #56]322; SOFT-FLOAT-VFP32-NEXT: ldr r3, [sp, #60]323; SOFT-FLOAT-VFP32-NEXT: bl __muldf3324; SOFT-FLOAT-VFP32-NEXT: ldr r2, [sp, #88]325; SOFT-FLOAT-VFP32-NEXT: ldr r3, [sp, #92]326; SOFT-FLOAT-VFP32-NEXT: bl __adddf3327; SOFT-FLOAT-VFP32-NEXT: str r0, [r4, #16]328; SOFT-FLOAT-VFP32-NEXT: str r1, [r4, #20]329; SOFT-FLOAT-VFP32-NEXT: ldr r0, [sp, #16]330; SOFT-FLOAT-VFP32-NEXT: ldr r1, [sp, #20]331; SOFT-FLOAT-VFP32-NEXT: ldr r2, [sp, #48]332; SOFT-FLOAT-VFP32-NEXT: ldr r3, [sp, #52]333; SOFT-FLOAT-VFP32-NEXT: bl __muldf3334; SOFT-FLOAT-VFP32-NEXT: ldr r2, [sp, #80]335; SOFT-FLOAT-VFP32-NEXT: ldr r3, [sp, #84]336; SOFT-FLOAT-VFP32-NEXT: bl __adddf3337; SOFT-FLOAT-VFP32-NEXT: ldr r2, [sp, #40]338; SOFT-FLOAT-VFP32-NEXT: ldr r3, [sp, #44]339; SOFT-FLOAT-VFP32-NEXT: str r0, [r4, #8]340; SOFT-FLOAT-VFP32-NEXT: mov r0, r6341; SOFT-FLOAT-VFP32-NEXT: str r1, [r4, #12]342; SOFT-FLOAT-VFP32-NEXT: mov r1, r5343; SOFT-FLOAT-VFP32-NEXT: bl __muldf3344; SOFT-FLOAT-VFP32-NEXT: ldr r2, [sp, #72]345; SOFT-FLOAT-VFP32-NEXT: ldr r3, [sp, #76]346; SOFT-FLOAT-VFP32-NEXT: bl __adddf3347; SOFT-FLOAT-VFP32-NEXT: stm r4, {r0, r1}348; SOFT-FLOAT-VFP32-NEXT: pop {r4, r5, r6, lr}349; SOFT-FLOAT-VFP32-NEXT: mov pc, lr350;351; SOFT-FLOAT-VFP64-LABEL: fmuladd_contract_v4f64:352; SOFT-FLOAT-VFP64: @ %bb.0:353; SOFT-FLOAT-VFP64-NEXT: push {r4, r5, r6, lr}354; SOFT-FLOAT-VFP64-NEXT: mov r5, r3355; SOFT-FLOAT-VFP64-NEXT: mov r6, r2356; SOFT-FLOAT-VFP64-NEXT: mov r4, r0357; SOFT-FLOAT-VFP64-NEXT: ldr r0, [sp, #32]358; SOFT-FLOAT-VFP64-NEXT: ldr r1, [sp, #36]359; SOFT-FLOAT-VFP64-NEXT: ldr r2, [sp, #64]360; SOFT-FLOAT-VFP64-NEXT: ldr r3, [sp, #68]361; SOFT-FLOAT-VFP64-NEXT: bl __muldf3362; SOFT-FLOAT-VFP64-NEXT: ldr r2, [sp, #96]363; SOFT-FLOAT-VFP64-NEXT: ldr r3, [sp, #100]364; SOFT-FLOAT-VFP64-NEXT: bl __adddf3365; SOFT-FLOAT-VFP64-NEXT: str r0, [r4, #24]366; SOFT-FLOAT-VFP64-NEXT: str r1, [r4, #28]367; SOFT-FLOAT-VFP64-NEXT: ldr r0, [sp, #24]368; SOFT-FLOAT-VFP64-NEXT: ldr r1, [sp, #28]369; SOFT-FLOAT-VFP64-NEXT: ldr r2, [sp, #56]370; SOFT-FLOAT-VFP64-NEXT: ldr r3, [sp, #60]371; SOFT-FLOAT-VFP64-NEXT: bl __muldf3372; SOFT-FLOAT-VFP64-NEXT: ldr r2, [sp, #88]373; SOFT-FLOAT-VFP64-NEXT: ldr r3, [sp, #92]374; SOFT-FLOAT-VFP64-NEXT: bl __adddf3375; SOFT-FLOAT-VFP64-NEXT: str r0, [r4, #16]376; SOFT-FLOAT-VFP64-NEXT: str r1, [r4, #20]377; SOFT-FLOAT-VFP64-NEXT: ldr r0, [sp, #16]378; SOFT-FLOAT-VFP64-NEXT: ldr r1, [sp, #20]379; SOFT-FLOAT-VFP64-NEXT: ldr r2, [sp, #48]380; SOFT-FLOAT-VFP64-NEXT: ldr r3, [sp, #52]381; SOFT-FLOAT-VFP64-NEXT: bl __muldf3382; SOFT-FLOAT-VFP64-NEXT: ldr r2, [sp, #80]383; SOFT-FLOAT-VFP64-NEXT: ldr r3, [sp, #84]384; SOFT-FLOAT-VFP64-NEXT: bl __adddf3385; SOFT-FLOAT-VFP64-NEXT: ldr r2, [sp, #40]386; SOFT-FLOAT-VFP64-NEXT: ldr r3, [sp, #44]387; SOFT-FLOAT-VFP64-NEXT: str r0, [r4, #8]388; SOFT-FLOAT-VFP64-NEXT: mov r0, r6389; SOFT-FLOAT-VFP64-NEXT: str r1, [r4, #12]390; SOFT-FLOAT-VFP64-NEXT: mov r1, r5391; SOFT-FLOAT-VFP64-NEXT: bl __muldf3392; SOFT-FLOAT-VFP64-NEXT: ldr r2, [sp, #72]393; SOFT-FLOAT-VFP64-NEXT: ldr r3, [sp, #76]394; SOFT-FLOAT-VFP64-NEXT: bl __adddf3395; SOFT-FLOAT-VFP64-NEXT: stm r4, {r0, r1}396; SOFT-FLOAT-VFP64-NEXT: pop {r4, r5, r6, lr}397; SOFT-FLOAT-VFP64-NEXT: mov pc, lr398 %product = fmul contract <4 x double> %a, %b399 %result = fadd contract <4 x double> %product, %c400 ret <4 x double> %result401}402 403attributes #0 = { "use-soft-float"="true" }404 405declare float @llvm.fmuladd.f32(float %a, float %b, float %c)406declare double @llvm.fmuladd.f64(double %a, double %b, double %c)407