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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple thumbv8m.main-arm-unknown-eabi --float-abi=soft -mattr=+vfp4d16sp < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-VFPV4-SOFT3; RUN: llc -mtriple thumbv8.1m.main-arm-unknown-eabi --float-abi=soft -mattr=+fullfp16 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FP16-SOFT4; RUN: llc -mtriple thumbv8m.main-arm-unknown-eabi --float-abi=hard -mattr=+vfp4d16sp < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-VFPV4-HARD5; RUN: llc -mtriple thumbv8.1m.main-arm-unknown-eabi --float-abi=hard -mattr=+fullfp16 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FP16-HARD6 7target triple = "thumbv8.1m.main-arm-unknown-eabi"8 9define float @add(float %a, float %b) {10; CHECK-VFPV4-SOFT-LABEL: add:11; CHECK-VFPV4-SOFT: @ %bb.0: @ %entry12; CHECK-VFPV4-SOFT-NEXT: vmov s0, r113; CHECK-VFPV4-SOFT-NEXT: vmov s2, r014; CHECK-VFPV4-SOFT-NEXT: vadd.f32 s0, s2, s015; CHECK-VFPV4-SOFT-NEXT: vmov r0, s016; CHECK-VFPV4-SOFT-NEXT: bx lr17;18; CHECK-FP16-SOFT-LABEL: add:19; CHECK-FP16-SOFT: @ %bb.0: @ %entry20; CHECK-FP16-SOFT-NEXT: vmov s0, r121; CHECK-FP16-SOFT-NEXT: vmov s2, r022; CHECK-FP16-SOFT-NEXT: vadd.f32 s0, s2, s023; CHECK-FP16-SOFT-NEXT: vmov r0, s024; CHECK-FP16-SOFT-NEXT: bx lr25;26; CHECK-VFPV4-HARD-LABEL: add:27; CHECK-VFPV4-HARD: @ %bb.0: @ %entry28; CHECK-VFPV4-HARD-NEXT: vadd.f32 s0, s0, s129; CHECK-VFPV4-HARD-NEXT: bx lr30;31; CHECK-FP16-HARD-LABEL: add:32; CHECK-FP16-HARD: @ %bb.0: @ %entry33; CHECK-FP16-HARD-NEXT: vadd.f32 s0, s0, s134; CHECK-FP16-HARD-NEXT: bx lr35entry:36 %add = fadd float %a, %b37 ret float %add38}39 40define half @addf16(half %a, half %b) {41; CHECK-VFPV4-SOFT-LABEL: addf16:42; CHECK-VFPV4-SOFT: @ %bb.0: @ %entry43; CHECK-VFPV4-SOFT-NEXT: vmov s0, r044; CHECK-VFPV4-SOFT-NEXT: vmov s2, r145; CHECK-VFPV4-SOFT-NEXT: vcvtb.f32.f16 s0, s046; CHECK-VFPV4-SOFT-NEXT: vcvtb.f32.f16 s2, s247; CHECK-VFPV4-SOFT-NEXT: vadd.f32 s0, s0, s248; CHECK-VFPV4-SOFT-NEXT: vcvtb.f16.f32 s0, s049; CHECK-VFPV4-SOFT-NEXT: vmov r0, s050; CHECK-VFPV4-SOFT-NEXT: bx lr51;52; CHECK-FP16-SOFT-LABEL: addf16:53; CHECK-FP16-SOFT: @ %bb.0: @ %entry54; CHECK-FP16-SOFT-NEXT: vmov.f16 s0, r155; CHECK-FP16-SOFT-NEXT: vmov.f16 s2, r056; CHECK-FP16-SOFT-NEXT: vadd.f16 s0, s2, s057; CHECK-FP16-SOFT-NEXT: vmov r0, s058; CHECK-FP16-SOFT-NEXT: bx lr59;60; CHECK-VFPV4-HARD-LABEL: addf16:61; CHECK-VFPV4-HARD: @ %bb.0: @ %entry62; CHECK-VFPV4-HARD-NEXT: vcvtb.f32.f16 s2, s163; CHECK-VFPV4-HARD-NEXT: vcvtb.f32.f16 s0, s064; CHECK-VFPV4-HARD-NEXT: vadd.f32 s0, s0, s265; CHECK-VFPV4-HARD-NEXT: vcvtb.f16.f32 s0, s066; CHECK-VFPV4-HARD-NEXT: bx lr67;68; CHECK-FP16-HARD-LABEL: addf16:69; CHECK-FP16-HARD: @ %bb.0: @ %entry70; CHECK-FP16-HARD-NEXT: vadd.f16 s0, s0, s171; CHECK-FP16-HARD-NEXT: bx lr72entry:73 %add = fadd half %a, %b74 ret half %add75}76 77define half @load_i16(ptr %hp) {78; CHECK-VFPV4-SOFT-LABEL: load_i16:79; CHECK-VFPV4-SOFT: @ %bb.0: @ %entry80; CHECK-VFPV4-SOFT-NEXT: vmov.f32 s0, #1.000000e+0081; CHECK-VFPV4-SOFT-NEXT: ldrh r0, [r0]82; CHECK-VFPV4-SOFT-NEXT: vmov s2, r083; CHECK-VFPV4-SOFT-NEXT: vcvtb.f32.f16 s2, s284; CHECK-VFPV4-SOFT-NEXT: vadd.f32 s0, s2, s085; CHECK-VFPV4-SOFT-NEXT: vcvtb.f16.f32 s0, s086; CHECK-VFPV4-SOFT-NEXT: vmov r0, s087; CHECK-VFPV4-SOFT-NEXT: bx lr88;89; CHECK-FP16-SOFT-LABEL: load_i16:90; CHECK-FP16-SOFT: @ %bb.0: @ %entry91; CHECK-FP16-SOFT-NEXT: vldr.16 s2, [r0]92; CHECK-FP16-SOFT-NEXT: vmov.f16 s0, #1.000000e+0093; CHECK-FP16-SOFT-NEXT: vadd.f16 s0, s2, s094; CHECK-FP16-SOFT-NEXT: vmov r0, s095; CHECK-FP16-SOFT-NEXT: bx lr96;97; CHECK-VFPV4-HARD-LABEL: load_i16:98; CHECK-VFPV4-HARD: @ %bb.0: @ %entry99; CHECK-VFPV4-HARD-NEXT: vmov.f32 s0, #1.000000e+00100; CHECK-VFPV4-HARD-NEXT: ldrh r0, [r0]101; CHECK-VFPV4-HARD-NEXT: vmov s2, r0102; CHECK-VFPV4-HARD-NEXT: vcvtb.f32.f16 s2, s2103; CHECK-VFPV4-HARD-NEXT: vadd.f32 s0, s2, s0104; CHECK-VFPV4-HARD-NEXT: vcvtb.f16.f32 s0, s0105; CHECK-VFPV4-HARD-NEXT: bx lr106;107; CHECK-FP16-HARD-LABEL: load_i16:108; CHECK-FP16-HARD: @ %bb.0: @ %entry109; CHECK-FP16-HARD-NEXT: vldr.16 s2, [r0]110; CHECK-FP16-HARD-NEXT: vmov.f16 s0, #1.000000e+00111; CHECK-FP16-HARD-NEXT: vadd.f16 s0, s2, s0112; CHECK-FP16-HARD-NEXT: bx lr113entry:114 %h = load i16, ptr %hp, align 2115 %hc = bitcast i16 %h to half116 %add = fadd half %hc, 1.0117 ret half %add118}119 120define i16 @load_f16(ptr %hp) {121; CHECK-LABEL: load_f16:122; CHECK: @ %bb.0: @ %entry123; CHECK-NEXT: ldrh r0, [r0]124; CHECK-NEXT: adds r0, #1125; CHECK-NEXT: bx lr126entry:127 %h = load half, ptr %hp, align 2128 %hc = bitcast half %h to i16129 %add = add i16 %hc, 1130 ret i16 %add131}132 133define half @constcall() {134; CHECK-VFPV4-SOFT-LABEL: constcall:135; CHECK-VFPV4-SOFT: @ %bb.0: @ %entry136; CHECK-VFPV4-SOFT-NEXT: mov.w r0, #18688137; CHECK-VFPV4-SOFT-NEXT: b ccc138;139; CHECK-FP16-SOFT-LABEL: constcall:140; CHECK-FP16-SOFT: @ %bb.0: @ %entry141; CHECK-FP16-SOFT-NEXT: mov.w r0, #18688142; CHECK-FP16-SOFT-NEXT: b ccc143;144; CHECK-VFPV4-HARD-LABEL: constcall:145; CHECK-VFPV4-HARD: @ %bb.0: @ %entry146; CHECK-VFPV4-HARD-NEXT: vldr s0, .LCPI4_0147; CHECK-VFPV4-HARD-NEXT: b ccc148; CHECK-VFPV4-HARD-NEXT: .p2align 2149; CHECK-VFPV4-HARD-NEXT: @ %bb.1:150; CHECK-VFPV4-HARD-NEXT: .LCPI4_0:151; CHECK-VFPV4-HARD-NEXT: .long 0x00004900 @ float 2.61874657E-41152;153; CHECK-FP16-HARD-LABEL: constcall:154; CHECK-FP16-HARD: @ %bb.0: @ %entry155; CHECK-FP16-HARD-NEXT: vmov.f16 s0, #1.000000e+01156; CHECK-FP16-HARD-NEXT: b ccc157entry:158 %call = tail call fast half @ccc(half 0xH4900)159 ret half %call160}161 162define half @constret() {163; CHECK-VFPV4-SOFT-LABEL: constret:164; CHECK-VFPV4-SOFT: @ %bb.0: @ %entry165; CHECK-VFPV4-SOFT-NEXT: mov.w r0, #18688166; CHECK-VFPV4-SOFT-NEXT: bx lr167;168; CHECK-FP16-SOFT-LABEL: constret:169; CHECK-FP16-SOFT: @ %bb.0: @ %entry170; CHECK-FP16-SOFT-NEXT: vmov.f16 s0, #1.000000e+01171; CHECK-FP16-SOFT-NEXT: vmov r0, s0172; CHECK-FP16-SOFT-NEXT: bx lr173;174; CHECK-VFPV4-HARD-LABEL: constret:175; CHECK-VFPV4-HARD: @ %bb.0: @ %entry176; CHECK-VFPV4-HARD-NEXT: vldr s0, .LCPI5_0177; CHECK-VFPV4-HARD-NEXT: bx lr178; CHECK-VFPV4-HARD-NEXT: .p2align 2179; CHECK-VFPV4-HARD-NEXT: @ %bb.1:180; CHECK-VFPV4-HARD-NEXT: .LCPI5_0:181; CHECK-VFPV4-HARD-NEXT: .long 0x00004900 @ float 2.61874657E-41182;183; CHECK-FP16-HARD-LABEL: constret:184; CHECK-FP16-HARD: @ %bb.0: @ %entry185; CHECK-FP16-HARD-NEXT: vmov.f16 s0, #1.000000e+01186; CHECK-FP16-HARD-NEXT: bx lr187entry:188 ret half 0xH4900189}190 191declare half @ccc(half)192