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1# RUN: llc -mtriple=arm-none-eabi -run-pass=arm-cp-islands %s -o - | FileCheck %s2#3# This checks alignment of a new block when a big basic block is split up.4#5--- |6 ; ModuleID = '<stdin>'7 source_filename = "<stdin>"8 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"9 target triple = "arm-arm--eabi"10 11 declare i32 @llvm.arm.space(i32, i32) #012 13 define dso_local i32 @ARM(ptr %LL, i32 %A.coerce) local_unnamed_addr #1 {14 entry:15 %S = alloca half, align 216 %tmp.0.extract.trunc = trunc i32 %A.coerce to i1617 %0 = bitcast i16 %tmp.0.extract.trunc to half18 store volatile half 0xH3C00, ptr %S, align 219 store volatile i64 4242424242424242, ptr %LL, align 820 %1 = call i32 @llvm.arm.space(i32 8920, i32 undef)21 %S.0.S.0.570 = load volatile half, ptr %S, align 222 %add298 = fadd half %S.0.S.0.570, 0xH2E6623 store volatile half %add298, ptr %S, align 224 %2 = call i32 @llvm.arm.space(i32 1350, i32 undef)25 %3 = bitcast half %add298 to i1626 %tmp343.0.insert.ext = zext i16 %3 to i3227 ret i32 %tmp343.0.insert.ext28 }29 30 attributes #0 = { nounwind }31 attributes #1 = { minsize nounwind optsize "target-features"="+crc,+crypto,+dsp,+fp-armv8,+fullfp16,+hwdiv,+hwdiv-arm,+neon,+ras,+strict-align,-thumb-mode" }32 33...34---35name: ARM36alignment: 437tracksRegLiveness: true38liveins:39 - { reg: '$r0' }40frameInfo:41 stackSize: 442 maxAlignment: 243 maxCallFrameSize: 044stack:45 - { id: 0, name: S, offset: -2, size: 2, alignment: 2, stack-id: default, local-offset: -2 }46constants:47 - id: 048 value: i32 157632350649 alignment: 450 - id: 151 value: i32 98776652 alignment: 453 - id: 254 value: half 0xH2E6655 alignment: 256 57#CHECK: B %[[BB4:bb.[0-9]]]58#CHECK: bb.{{.}} (align 4):59#CHECK: successors:60#CHECK: CONSTPOOL_ENTRY {{.}}, %const.{{.}}, 461#CHECK: bb.{{.}} (align 4):62#CHECK: successors:63#CHECK: CONSTPOOL_ENTRY {{.}}, %const.{{.}}, 464#CHECK: bb.{{.}} (align 2):65#CHECK: successors:66#CHECK: CONSTPOOL_ENTRY {{.}}, %const.{{.}}, 267#CHECK: [[BB4]].entry (align 4):68 69body: |70 bb.0.entry:71 liveins: $r072 73 $sp = frame-setup SUBri $sp, 4, 14, $noreg, $noreg74 frame-setup CFI_INSTRUCTION def_cfa_offset 475 renamable $s0 = FCONSTH 112, 14, $noreg76 renamable $r1 = LDRcp %const.0, 0, 14, $noreg :: (load (s32) from constant-pool)77 renamable $r2 = LDRcp %const.1, 0, 14, $noreg :: (load (s32) from constant-pool)78 VSTRH killed renamable $s0, $sp, 1, 14, $noreg :: (volatile store (s16) into %ir.S)79 STRi12 killed renamable $r2, renamable $r0, 4, 14, $noreg :: (volatile store (s32) into %ir.LL + 4)80 renamable $s0 = VLDRH %const.2, 0, 14, $noreg :: (load (s16) from constant-pool)81 STRi12 killed renamable $r1, killed renamable $r0, 0, 14, $noreg :: (volatile store (s32) into %ir.LL, align 8)82 dead renamable $r0 = SPACE 8920, undef renamable $r083 renamable $s2 = VLDRH $sp, 1, 14, $noreg :: (volatile dereferenceable load (s16) from %ir.S)84 renamable $s0 = VADDH killed renamable $s2, killed renamable $s0, 14, $noreg, implicit $fpscr_rm85 VSTRH renamable $s0, $sp, 1, 14, $noreg :: (volatile store (s16) into %ir.S)86 renamable $r0 = VMOVRH killed renamable $s0, 14, $noreg87 dead renamable $r1 = SPACE 1350, undef renamable $r088 $sp = ADDri $sp, 4, 14, $noreg, $noreg89 MOVPCLR 14, $noreg, implicit killed $r090 91...92