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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=armv7-none-eabihf -mattr=+fullfp16 -enable-no-nans-fp-math | FileCheck %s3; RUN: llc < %s -mtriple=thumbv7a-none-eabihf -mattr=+fullfp16 -enable-no-nans-fp-math | FileCheck %s4 5; TODO: we can't pass half-precision arguments as "half" types yet. We do6; that for the time being by passing "float %f.coerce" and the necessary7; bitconverts/truncates. In these tests we pass i16 and use 1 bitconvert, which8; is the shortest way to get a half type. But when we can pass half types, we9; want to use that here.10 11define half @fp16_vminnm_o(i16 signext %a, i16 signext %b) {12; CHECK-LABEL: fp16_vminnm_o:13; CHECK: @ %bb.0: @ %entry14; CHECK-NEXT: vmov.f16 s0, r115; CHECK-NEXT: vmov.f16 s2, r016; CHECK-NEXT: vminnm.f16 s0, s2, s017; CHECK-NEXT: bx lr18entry:19 %0 = bitcast i16 %a to half20 %1 = bitcast i16 %b to half21 %cmp = fcmp fast olt half %0, %122 %cond = select nsz i1 %cmp, half %0, half %123 ret half %cond24}25 26define half @fp16_vminnm_o_rev(i16 signext %a, i16 signext %b) {27; CHECK-LABEL: fp16_vminnm_o_rev:28; CHECK: @ %bb.0: @ %entry29; CHECK-NEXT: vmov.f16 s0, r130; CHECK-NEXT: vmov.f16 s2, r031; CHECK-NEXT: vminnm.f16 s0, s2, s032; CHECK-NEXT: bx lr33entry:34 %0 = bitcast i16 %a to half35 %1 = bitcast i16 %b to half36 %cmp = fcmp fast ogt half %0, %137 %cond = select nsz i1 %cmp, half %1, half %038 ret half %cond39}40 41define half @fp16_vminnm_u(i16 signext %a, i16 signext %b) {42; CHECK-LABEL: fp16_vminnm_u:43; CHECK: @ %bb.0: @ %entry44; CHECK-NEXT: vmov.f16 s0, r145; CHECK-NEXT: vmov.f16 s2, r046; CHECK-NEXT: vminnm.f16 s0, s2, s047; CHECK-NEXT: bx lr48entry:49 %0 = bitcast i16 %a to half50 %1 = bitcast i16 %b to half51 %cmp = fcmp fast ult half %0, %152 %cond = select nsz i1 %cmp, half %0, half %153 ret half %cond54}55 56define half @fp16_vminnm_ule(i16 signext %a, i16 signext %b) {57; CHECK-LABEL: fp16_vminnm_ule:58; CHECK: @ %bb.0: @ %entry59; CHECK-NEXT: vmov.f16 s0, r160; CHECK-NEXT: vmov.f16 s2, r061; CHECK-NEXT: vminnm.f16 s0, s2, s062; CHECK-NEXT: bx lr63entry:64 %0 = bitcast i16 %a to half65 %1 = bitcast i16 %b to half66 %cmp = fcmp fast ule half %0, %167 %cond = select nsz i1 %cmp, half %0, half %168 ret half %cond69}70 71define half @fp16_vminnm_u_rev(i16 signext %a, i16 signext %b) {72; CHECK-LABEL: fp16_vminnm_u_rev:73; CHECK: @ %bb.0: @ %entry74; CHECK-NEXT: vmov.f16 s0, r175; CHECK-NEXT: vmov.f16 s2, r076; CHECK-NEXT: vminnm.f16 s0, s2, s077; CHECK-NEXT: bx lr78entry:79 %0 = bitcast i16 %a to half80 %1 = bitcast i16 %b to half81 %cmp = fcmp fast ugt half %0, %182 %cond = select nsz i1 %cmp, half %1, half %083 ret half %cond84}85 86define half @fp16_vmaxnm_o(i16 signext %a, i16 signext %b) {87; CHECK-LABEL: fp16_vmaxnm_o:88; CHECK: @ %bb.0: @ %entry89; CHECK-NEXT: vmov.f16 s0, r190; CHECK-NEXT: vmov.f16 s2, r091; CHECK-NEXT: vmaxnm.f16 s0, s2, s092; CHECK-NEXT: bx lr93entry:94 %0 = bitcast i16 %a to half95 %1 = bitcast i16 %b to half96 %cmp = fcmp fast ogt half %0, %197 %cond = select nsz i1 %cmp, half %0, half %198 ret half %cond99}100 101define half @fp16_vmaxnm_oge(i16 signext %a, i16 signext %b) {102; CHECK-LABEL: fp16_vmaxnm_oge:103; CHECK: @ %bb.0: @ %entry104; CHECK-NEXT: vmov.f16 s0, r1105; CHECK-NEXT: vmov.f16 s2, r0106; CHECK-NEXT: vmaxnm.f16 s0, s2, s0107; CHECK-NEXT: bx lr108entry:109 %0 = bitcast i16 %a to half110 %1 = bitcast i16 %b to half111 %cmp = fcmp fast oge half %0, %1112 %cond = select nsz i1 %cmp, half %0, half %1113 ret half %cond114}115 116define half @fp16_vmaxnm_o_rev(i16 signext %a, i16 signext %b) {117; CHECK-LABEL: fp16_vmaxnm_o_rev:118; CHECK: @ %bb.0: @ %entry119; CHECK-NEXT: vmov.f16 s0, r1120; CHECK-NEXT: vmov.f16 s2, r0121; CHECK-NEXT: vmaxnm.f16 s0, s2, s0122; CHECK-NEXT: bx lr123entry:124 %0 = bitcast i16 %a to half125 %1 = bitcast i16 %b to half126 %cmp = fcmp fast olt half %0, %1127 %cond = select nsz i1 %cmp, half %1, half %0128 ret half %cond129}130 131define half @fp16_vmaxnm_ole_rev(i16 signext %a, i16 signext %b) {132; CHECK-LABEL: fp16_vmaxnm_ole_rev:133; CHECK: @ %bb.0: @ %entry134; CHECK-NEXT: vmov.f16 s0, r1135; CHECK-NEXT: vmov.f16 s2, r0136; CHECK-NEXT: vmaxnm.f16 s0, s2, s0137; CHECK-NEXT: bx lr138entry:139 %0 = bitcast i16 %a to half140 %1 = bitcast i16 %b to half141 %cmp = fcmp fast ole half %0, %1142 %cond = select nsz i1 %cmp, half %1, half %0143 ret half %cond144}145 146define half @fp16_vmaxnm_u(i16 signext %a, i16 signext %b) {147; CHECK-LABEL: fp16_vmaxnm_u:148; CHECK: @ %bb.0: @ %entry149; CHECK-NEXT: vmov.f16 s0, r1150; CHECK-NEXT: vmov.f16 s2, r0151; CHECK-NEXT: vmaxnm.f16 s0, s2, s0152; CHECK-NEXT: bx lr153entry:154 %0 = bitcast i16 %a to half155 %1 = bitcast i16 %b to half156 %cmp = fcmp fast ugt half %0, %1157 %cond = select nsz i1 %cmp, half %0, half %1158 ret half %cond159}160 161define half @fp16_vmaxnm_uge(i16 signext %a, i16 signext %b) {162; CHECK-LABEL: fp16_vmaxnm_uge:163; CHECK: @ %bb.0: @ %entry164; CHECK-NEXT: vmov.f16 s0, r1165; CHECK-NEXT: vmov.f16 s2, r0166; CHECK-NEXT: vmaxnm.f16 s0, s2, s0167; CHECK-NEXT: bx lr168entry:169 %0 = bitcast i16 %a to half170 %1 = bitcast i16 %b to half171 %cmp = fcmp fast uge half %0, %1172 %cond = select nsz i1 %cmp, half %0, half %1173 ret half %cond174}175 176define half @fp16_vmaxnm_u_rev(i16 signext %a, i16 signext %b) {177; CHECK-LABEL: fp16_vmaxnm_u_rev:178; CHECK: @ %bb.0: @ %entry179; CHECK-NEXT: vmov.f16 s0, r1180; CHECK-NEXT: vmov.f16 s2, r0181; CHECK-NEXT: vmaxnm.f16 s0, s2, s0182; CHECK-NEXT: bx lr183entry:184 %0 = bitcast i16 %a to half185 %1 = bitcast i16 %b to half186 %cmp = fcmp fast ult half %0, %1187 %cond = select nsz i1 %cmp, half %1, half %0188 ret half %cond189}190 191; known non-NaNs192 193define half @fp16_vminnm_NNNo(i16 signext %a) {194; CHECK-LABEL: fp16_vminnm_NNNo:195; CHECK: @ %bb.0: @ %entry196; CHECK-NEXT: vmov.f16 s0, r0197; CHECK-NEXT: vmov.f16 s2, #1.200000e+01198; CHECK-NEXT: vminnm.f16 s0, s0, s2199; CHECK-NEXT: vldr.16 s2, .LCPI12_0200; CHECK-NEXT: vminnm.f16 s0, s0, s2201; CHECK-NEXT: bx lr202; CHECK-NEXT: .p2align 1203; CHECK-NEXT: @ %bb.1:204; CHECK-NEXT: .LCPI12_0:205; CHECK-NEXT: .short 0x5040 @ half 34206entry:207 %0 = bitcast i16 %a to half208 %cmp1 = fcmp fast olt half %0, 12.209 %cond1 = select nsz i1 %cmp1, half %0, half 12.210 %cmp2 = fcmp fast olt half 34., %cond1211 %cond2 = select nsz i1 %cmp2, half 34., half %cond1212 ret half %cond2213}214 215define half @fp16_vminnm_NNNo_rev(i16 signext %a) {216; CHECK-LABEL: fp16_vminnm_NNNo_rev:217; CHECK: @ %bb.0: @ %entry218; CHECK-NEXT: vldr.16 s2, .LCPI13_0219; CHECK-NEXT: vmov.f16 s0, r0220; CHECK-NEXT: vminnm.f16 s0, s0, s2221; CHECK-NEXT: vldr.16 s2, .LCPI13_1222; CHECK-NEXT: vminnm.f16 s0, s0, s2223; CHECK-NEXT: bx lr224; CHECK-NEXT: .p2align 1225; CHECK-NEXT: @ %bb.1:226; CHECK-NEXT: .LCPI13_0:227; CHECK-NEXT: .short 0x5300 @ half 56228; CHECK-NEXT: .LCPI13_1:229; CHECK-NEXT: .short 0x54e0 @ half 78230entry:231 %0 = bitcast i16 %a to half232 %cmp1 = fcmp fast ogt half %0, 56.233 %cond1 = select nsz i1 %cmp1, half 56., half %0234 %cmp2 = fcmp fast ogt half 78., %cond1235 %cond2 = select nsz i1 %cmp2, half %cond1, half 78.236 ret half %cond2237}238 239define half @fp16_vminnm_NNNu(i16 signext %b) {240; CHECK-LABEL: fp16_vminnm_NNNu:241; CHECK: @ %bb.0: @ %entry242; CHECK-NEXT: vmov.f16 s0, r0243; CHECK-NEXT: vmov.f16 s2, #1.200000e+01244; CHECK-NEXT: vminnm.f16 s0, s0, s2245; CHECK-NEXT: vldr.16 s2, .LCPI14_0246; CHECK-NEXT: vminnm.f16 s0, s0, s2247; CHECK-NEXT: bx lr248; CHECK-NEXT: .p2align 1249; CHECK-NEXT: @ %bb.1:250; CHECK-NEXT: .LCPI14_0:251; CHECK-NEXT: .short 0x5040 @ half 34252entry:253 %0 = bitcast i16 %b to half254 %cmp1 = fcmp fast ult half 12., %0255 %cond1 = select nsz i1 %cmp1, half 12., half %0256 %cmp2 = fcmp fast ult half %cond1, 34.257 %cond2 = select nsz i1 %cmp2, half %cond1, half 34.258 ret half %cond2259}260 261define half @fp16_vminnm_NNNule(i16 signext %b) {262; CHECK-LABEL: fp16_vminnm_NNNule:263; CHECK: @ %bb.0: @ %entry264; CHECK-NEXT: vldr.16 s2, .LCPI15_0265; CHECK-NEXT: vmov.f16 s0, r0266; CHECK-NEXT: vminnm.f16 s0, s0, s2267; CHECK-NEXT: vldr.16 s2, .LCPI15_1268; CHECK-NEXT: vminnm.f16 s0, s0, s2269; CHECK-NEXT: bx lr270; CHECK-NEXT: .p2align 1271; CHECK-NEXT: @ %bb.1:272; CHECK-NEXT: .LCPI15_0:273; CHECK-NEXT: .short 0x5040 @ half 34274; CHECK-NEXT: .LCPI15_1:275; CHECK-NEXT: .short 0x5300 @ half 56276entry:277 %0 = bitcast i16 %b to half278 %cmp1 = fcmp fast ule half 34., %0279 %cond1 = select nsz i1 %cmp1, half 34., half %0280 %cmp2 = fcmp fast ule half %cond1, 56.281 %cond2 = select nsz i1 %cmp2, half %cond1, half 56.282 ret half %cond2283}284 285define half @fp16_vminnm_NNNu_rev(i16 signext %b) {286; CHECK-LABEL: fp16_vminnm_NNNu_rev:287; CHECK: @ %bb.0: @ %entry288; CHECK-NEXT: vldr.16 s2, .LCPI16_0289; CHECK-NEXT: vmov.f16 s0, r0290; CHECK-NEXT: vminnm.f16 s0, s0, s2291; CHECK-NEXT: vldr.16 s2, .LCPI16_1292; CHECK-NEXT: vminnm.f16 s0, s0, s2293; CHECK-NEXT: bx lr294; CHECK-NEXT: .p2align 1295; CHECK-NEXT: @ %bb.1:296; CHECK-NEXT: .LCPI16_0:297; CHECK-NEXT: .short 0x5300 @ half 56298; CHECK-NEXT: .LCPI16_1:299; CHECK-NEXT: .short 0x54e0 @ half 78300entry:301 %0 = bitcast i16 %b to half302 %cmp1 = fcmp fast ugt half 56., %0303 %cond1 = select nsz i1 %cmp1, half %0, half 56.304 %cmp2 = fcmp fast ugt half %cond1, 78.305 %cond2 = select nsz i1 %cmp2, half 78., half %cond1306 ret half %cond2307}308 309define half @fp16_vmaxnm_NNNo(i16 signext %a) {310; CHECK-LABEL: fp16_vmaxnm_NNNo:311; CHECK: @ %bb.0: @ %entry312; CHECK-NEXT: vmov.f16 s0, r0313; CHECK-NEXT: vmov.f16 s2, #1.200000e+01314; CHECK-NEXT: vmaxnm.f16 s0, s0, s2315; CHECK-NEXT: vldr.16 s2, .LCPI17_0316; CHECK-NEXT: vmaxnm.f16 s0, s0, s2317; CHECK-NEXT: bx lr318; CHECK-NEXT: .p2align 1319; CHECK-NEXT: @ %bb.1:320; CHECK-NEXT: .LCPI17_0:321; CHECK-NEXT: .short 0x5040 @ half 34322entry:323 %0 = bitcast i16 %a to half324 %cmp1 = fcmp fast ogt half %0, 12.325 %cond1 = select nsz i1 %cmp1, half %0, half 12.326 %cmp2 = fcmp fast ogt half 34., %cond1327 %cond2 = select nsz i1 %cmp2, half 34., half %cond1328 ret half %cond2329}330 331define half @fp16_vmaxnm_NNNoge(i16 signext %a) {332; CHECK-LABEL: fp16_vmaxnm_NNNoge:333; CHECK: @ %bb.0: @ %entry334; CHECK-NEXT: vldr.16 s2, .LCPI18_0335; CHECK-NEXT: vmov.f16 s0, r0336; CHECK-NEXT: vmaxnm.f16 s0, s0, s2337; CHECK-NEXT: vldr.16 s2, .LCPI18_1338; CHECK-NEXT: vmaxnm.f16 s0, s0, s2339; CHECK-NEXT: bx lr340; CHECK-NEXT: .p2align 1341; CHECK-NEXT: @ %bb.1:342; CHECK-NEXT: .LCPI18_0:343; CHECK-NEXT: .short 0x5040 @ half 34344; CHECK-NEXT: .LCPI18_1:345; CHECK-NEXT: .short 0x5300 @ half 56346entry:347 %0 = bitcast i16 %a to half348 %cmp1 = fcmp fast oge half %0, 34.349 %cond1 = select nsz i1 %cmp1, half %0, half 34.350 %cmp2 = fcmp fast oge half 56., %cond1351 %cond2 = select nsz i1 %cmp2, half 56., half %cond1352 ret half %cond2353}354 355define half @fp16_vmaxnm_NNNo_rev(i16 signext %a) {356; CHECK-LABEL: fp16_vmaxnm_NNNo_rev:357; CHECK: @ %bb.0: @ %entry358; CHECK-NEXT: vldr.16 s2, .LCPI19_0359; CHECK-NEXT: vmov.f16 s0, r0360; CHECK-NEXT: vmaxnm.f16 s0, s0, s2361; CHECK-NEXT: vldr.16 s2, .LCPI19_1362; CHECK-NEXT: vmaxnm.f16 s0, s0, s2363; CHECK-NEXT: bx lr364; CHECK-NEXT: .p2align 1365; CHECK-NEXT: @ %bb.1:366; CHECK-NEXT: .LCPI19_0:367; CHECK-NEXT: .short 0x5300 @ half 56368; CHECK-NEXT: .LCPI19_1:369; CHECK-NEXT: .short 0x54e0 @ half 78370entry:371 %0 = bitcast i16 %a to half372 %cmp1 = fcmp fast olt half %0, 56.373 %cond1 = select nsz i1 %cmp1, half 56., half %0374 %cmp2 = fcmp fast olt half 78., %cond1375 %cond2 = select nsz i1 %cmp2, half %cond1, half 78.376 ret half %cond2377}378 379define half @fp16_vmaxnm_NNNole_rev(i16 signext %a) {380; CHECK-LABEL: fp16_vmaxnm_NNNole_rev:381; CHECK: @ %bb.0: @ %entry382; CHECK-NEXT: vldr.16 s2, .LCPI20_0383; CHECK-NEXT: vmov.f16 s0, r0384; CHECK-NEXT: vmaxnm.f16 s0, s0, s2385; CHECK-NEXT: vldr.16 s2, .LCPI20_1386; CHECK-NEXT: vmaxnm.f16 s0, s0, s2387; CHECK-NEXT: bx lr388; CHECK-NEXT: .p2align 1389; CHECK-NEXT: @ %bb.1:390; CHECK-NEXT: .LCPI20_0:391; CHECK-NEXT: .short 0x54e0 @ half 78392; CHECK-NEXT: .LCPI20_1:393; CHECK-NEXT: .short 0x55a0 @ half 90394entry:395 %0 = bitcast i16 %a to half396 %cmp1 = fcmp fast ole half %0, 78.397 %cond1 = select nsz i1 %cmp1, half 78., half %0398 %cmp2 = fcmp fast ole half 90., %cond1399 %cond2 = select nsz i1 %cmp2, half %cond1, half 90.400 ret half %cond2401}402 403define half @fp16_vmaxnm_NNNu(i16 signext %b) {404; CHECK-LABEL: fp16_vmaxnm_NNNu:405; CHECK: @ %bb.0: @ %entry406; CHECK-NEXT: vmov.f16 s0, r0407; CHECK-NEXT: vmov.f16 s2, #1.200000e+01408; CHECK-NEXT: vmaxnm.f16 s0, s0, s2409; CHECK-NEXT: vldr.16 s2, .LCPI21_0410; CHECK-NEXT: vmaxnm.f16 s0, s0, s2411; CHECK-NEXT: bx lr412; CHECK-NEXT: .p2align 1413; CHECK-NEXT: @ %bb.1:414; CHECK-NEXT: .LCPI21_0:415; CHECK-NEXT: .short 0x5040 @ half 34416entry:417 %0 = bitcast i16 %b to half418 %cmp1 = fcmp fast ugt half 12., %0419 %cond1 = select nsz i1 %cmp1, half 12., half %0420 %cmp2 = fcmp fast ugt half %cond1, 34.421 %cond2 = select nsz i1 %cmp2, half %cond1, half 34.422 ret half %cond2423}424 425define half @fp16_vmaxnm_NNNuge(i16 signext %b) {426; CHECK-LABEL: fp16_vmaxnm_NNNuge:427; CHECK: @ %bb.0: @ %entry428; CHECK-NEXT: vldr.16 s2, .LCPI22_0429; CHECK-NEXT: vmov.f16 s0, r0430; CHECK-NEXT: vmaxnm.f16 s0, s0, s2431; CHECK-NEXT: vldr.16 s2, .LCPI22_1432; CHECK-NEXT: vmaxnm.f16 s0, s0, s2433; CHECK-NEXT: bx lr434; CHECK-NEXT: .p2align 1435; CHECK-NEXT: @ %bb.1:436; CHECK-NEXT: .LCPI22_0:437; CHECK-NEXT: .short 0x5040 @ half 34438; CHECK-NEXT: .LCPI22_1:439; CHECK-NEXT: .short 0x5300 @ half 56440entry:441 %0 = bitcast i16 %b to half442 %cmp1 = fcmp fast uge half 34., %0443 %cond1 = select nsz i1 %cmp1, half 34., half %0444 %cmp2 = fcmp fast uge half %cond1, 56.445 %cond2 = select nsz i1 %cmp2, half %cond1, half 56.446 ret half %cond2447}448 449define half @fp16_vmaxnm_NNNu_rev(i16 signext %b) {450; CHECK-LABEL: fp16_vmaxnm_NNNu_rev:451; CHECK: @ %bb.0: @ %entry452; CHECK-NEXT: vldr.16 s2, .LCPI23_0453; CHECK-NEXT: vmov.f16 s0, r0454; CHECK-NEXT: vmaxnm.f16 s0, s0, s2455; CHECK-NEXT: vldr.16 s2, .LCPI23_1456; CHECK-NEXT: vmaxnm.f16 s0, s0, s2457; CHECK-NEXT: bx lr458; CHECK-NEXT: .p2align 1459; CHECK-NEXT: @ %bb.1:460; CHECK-NEXT: .LCPI23_0:461; CHECK-NEXT: .short 0x5300 @ half 56462; CHECK-NEXT: .LCPI23_1:463; CHECK-NEXT: .short 0x54e0 @ half 78464entry:465 %0 = bitcast i16 %b to half466 %cmp1 = fcmp fast ult half 56., %0467 %cond1 = select nsz i1 %cmp1, half %0, half 56.468 %cmp2 = fcmp fast ult half %cond1, 78.469 %cond2 = select nsz i1 %cmp2, half 78., half %cond1470 ret half %cond2471}472 473define half @fp16_vminmaxnm_0(i16 signext %a) {474; CHECK-LABEL: fp16_vminmaxnm_0:475; CHECK: @ %bb.0: @ %entry476; CHECK-NEXT: vldr.16 s0, .LCPI24_0477; CHECK-NEXT: vmov.f16 s2, r0478; CHECK-NEXT: vminnm.f16 s2, s2, s0479; CHECK-NEXT: vmaxnm.f16 s0, s2, s0480; CHECK-NEXT: bx lr481; CHECK-NEXT: .p2align 1482; CHECK-NEXT: @ %bb.1:483; CHECK-NEXT: .LCPI24_0:484; CHECK-NEXT: .short 0x0000 @ half 0485entry:486 %0 = bitcast i16 %a to half487 %cmp1 = fcmp fast olt half %0, 0.488 %cond1 = select nsz i1 %cmp1, half %0, half 0.489 %cmp2 = fcmp fast ogt half %cond1, 0.490 %cond2 = select nsz i1 %cmp2, half %cond1, half 0.491 ret half %cond2492}493 494define half @fp16_vminmaxnm_neg0(i16 signext %a) {495; CHECK-LABEL: fp16_vminmaxnm_neg0:496; CHECK: @ %bb.0: @ %entry497; CHECK-NEXT: vldr.16 s0, .LCPI25_0498; CHECK-NEXT: vmov.f16 s2, r0499; CHECK-NEXT: vminnm.f16 s2, s2, s0500; CHECK-NEXT: vmaxnm.f16 s0, s2, s0501; CHECK-NEXT: bx lr502; CHECK-NEXT: .p2align 1503; CHECK-NEXT: @ %bb.1:504; CHECK-NEXT: .LCPI25_0:505; CHECK-NEXT: .short 0x8000 @ half -0506entry:507 %0 = bitcast i16 %a to half508 %cmp1 = fcmp fast olt half %0, -0.509 %cond1 = select nsz i1 %cmp1, half %0, half -0.510 %cmp2 = fcmp fast ugt half %cond1, -0.511 %cond2 = select nsz i1 %cmp2, half %cond1, half -0.512 ret half %cond2513}514 515define half @fp16_vminmaxnm_e_0(i16 signext %a) {516; CHECK-LABEL: fp16_vminmaxnm_e_0:517; CHECK: @ %bb.0: @ %entry518; CHECK-NEXT: vldr.16 s0, .LCPI26_0519; CHECK-NEXT: vmov.f16 s2, r0520; CHECK-NEXT: vminnm.f16 s2, s2, s0521; CHECK-NEXT: vmaxnm.f16 s0, s2, s0522; CHECK-NEXT: bx lr523; CHECK-NEXT: .p2align 1524; CHECK-NEXT: @ %bb.1:525; CHECK-NEXT: .LCPI26_0:526; CHECK-NEXT: .short 0x0000 @ half 0527entry:528 %0 = bitcast i16 %a to half529 %cmp1 = fcmp fast ule half 0., %0530 %cond1 = select nsz i1 %cmp1, half 0., half %0531 %cmp2 = fcmp fast uge half 0., %cond1532 %cond2 = select nsz i1 %cmp2, half 0., half %cond1533 ret half %cond2534}535 536define half @fp16_vminmaxnm_e_neg0(i16 signext %a) {537; CHECK-LABEL: fp16_vminmaxnm_e_neg0:538; CHECK: @ %bb.0: @ %entry539; CHECK-NEXT: vldr.16 s0, .LCPI27_0540; CHECK-NEXT: vmov.f16 s2, r0541; CHECK-NEXT: vminnm.f16 s2, s2, s0542; CHECK-NEXT: vmaxnm.f16 s0, s2, s0543; CHECK-NEXT: bx lr544; CHECK-NEXT: .p2align 1545; CHECK-NEXT: @ %bb.1:546; CHECK-NEXT: .LCPI27_0:547; CHECK-NEXT: .short 0x8000 @ half -0548entry:549 %0 = bitcast i16 %a to half550 %cmp1 = fcmp fast ule half -0., %0551 %cond1 = select nsz i1 %cmp1, half -0., half %0552 %cmp2 = fcmp fast oge half -0., %cond1553 %cond2 = select nsz i1 %cmp2, half -0., half %cond1554 ret half %cond2555}556