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1; RUN: llc < %s -mtriple=armv7a-eabi | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-AT22; RUN: llc < %s -mtriple=thumbv7m-eabi | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-AT23; RUN: llc < %s -mtriple=thumbv6m-eabi | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-T14 5; This test checks that various kinds of getelementptr are all optimised to a6; simple multiply plus add, with the add being done by a register offset if the7; result is used in a load.8 9; CHECK-LABEL: calc_1d:10; CHECK: mov{{s?}} [[REG1:r[0-9]+]], #8411; CHECK-AT2: mla r0, r1, [[REG1]], r012; CHECK-T1: muls [[REG2:r[0-9]+]], r1, [[REG1]]13; CHECK-T1: adds r0, r0, [[REG2]]14define ptr @calc_1d(ptr %p, i32 %n) {15entry:16 %mul = mul nsw i32 %n, 2117 %add.ptr = getelementptr inbounds i32, ptr %p, i32 %mul18 ret ptr %add.ptr19}20 21; CHECK-LABEL: load_1d:22; CHECK: mov{{s?}} [[REG1:r[0-9]+]], #8423; CHECK: mul{{s?}} [[REG2:r[0-9]+]],{{( r1,)?}} [[REG1]]{{(, r1)?}}24; CHECK: ldr r0, [r0, [[REG2]]]25define i32 @load_1d(ptr %p, i32 %n) #1 {26entry:27 %mul = mul nsw i32 %n, 2128 %arrayidx = getelementptr inbounds i32, ptr %p, i32 %mul29 %0 = load i32, ptr %arrayidx, align 430 ret i32 %031}32 33; CHECK-LABEL: calc_2d_a:34; CHECK: mov{{s?}} [[REG1:r[0-9]+]], #8435; CHECK-AT2: mla r0, r1, [[REG1]], r036; CHECK-T1: muls [[REG2:r[0-9]+]], r1, [[REG1]]37; CHECK-T1: adds r0, r0, [[REG2]]38define ptr @calc_2d_a(ptr %p, i32 %n) {39entry:40 %mul = mul nsw i32 %n, 2141 %arrayidx1 = getelementptr inbounds [100 x i32], ptr %p, i32 0, i32 %mul42 ret ptr %arrayidx143}44 45; CHECK-LABEL: load_2d_a:46; CHECK: mov{{s?}} [[REG1:r[0-9]+]], #8447; CHECK: mul{{s?}} [[REG2:r[0-9]+]],{{( r1,)?}} [[REG1]]{{(, r1)?}}48; CHECK: ldr r0, [r0, [[REG2]]]49define i32 @load_2d_a(ptr %p, i32 %n) #1 {50entry:51 %mul = mul nsw i32 %n, 2152 %arrayidx1 = getelementptr inbounds [100 x i32], ptr %p, i32 0, i32 %mul53 %0 = load i32, ptr %arrayidx1, align 454 ret i32 %055}56 57; CHECK-LABEL: calc_2d_b:58; CHECK: mov{{s?}} [[REG1:r[0-9]+]], #8459; CHECK-AT2: mla r0, r1, [[REG1]], r060; CHECK-T1: muls [[REG2:r[0-9]+]], r1, [[REG1]]61; CHECK-T1: adds r0, r0, [[REG2]]62define ptr @calc_2d_b(ptr %p, i32 %n) {63entry:64 %arrayidx1 = getelementptr inbounds [21 x i32], ptr %p, i32 %n, i32 065 ret ptr %arrayidx166}67 68; CHECK-LABEL: load_2d_b:69; CHECK: mov{{s?}} [[REG1:r[0-9]+]], #8470; CHECK: mul{{s?}} [[REG2:r[0-9]+]],{{( r1,)?}} [[REG1]]{{(, r1)?}}71; CHECK: ldr r0, [r0, [[REG2]]]72define i32 @load_2d_b(ptr %p, i32 %n) {73entry:74 %arrayidx1 = getelementptr inbounds [21 x i32], ptr %p, i32 %n, i32 075 %0 = load i32, ptr %arrayidx1, align 476 ret i32 %077}78