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1; RUN: llc <%s -mtriple=arm-none-eabi 2>&1 | FileCheck %s -check-prefix=CHECK2 3; RUN: llc <%s -mtriple=arm-none-eabi -relocation-model=rwpi 2>&1 \4; RUN: | FileCheck %s -check-prefix=RWPI5 6; RUN: llc <%s -mtriple=arm-none-eabi --frame-pointer=all 2>&1 \7; RUN: | FileCheck %s -check-prefix=NO_FP_ELIM8 9; RUN: llc <%s -mtriple=armv6-apple-ios2 2>&1 | FileCheck %s -check-prefix=IOS210; RUN: llc <%s -mtriple=armv6k-apple-ios2 2>&1 | FileCheck %s -check-prefix=IOS211; RUN: llc <%s -mtriple=armv6k-apple-ios3 2>&1 | FileCheck %s -check-prefix=IOS312; RUN: llc <%s -mtriple=armv7-apple-ios2 2>&1 | FileCheck %s -check-prefix=IOS313 14; CHECK: warning: inline asm clobber list contains reserved registers: SP, PC15; CHECK: warning: inline asm clobber list contains reserved registers: R1116; RWPI: warning: inline asm clobber list contains reserved registers: R9, SP, PC17; RWPI: warning: inline asm clobber list contains reserved registers: R1118; NO_FP_ELIM: warning: inline asm clobber list contains reserved registers: R11, SP, PC19; NO_FP_ELIM: warning: inline asm clobber list contains reserved registers: R1120; IOS2: warning: inline asm clobber list contains reserved registers: R9, SP, PC21; IOS3: warning: inline asm clobber list contains reserved registers: SP, PC22 23define void @foo() nounwind {24 call void asm sideeffect "mov r7, #1",25 "~{r9},~{r11},~{r12},~{lr},~{sp},~{pc},~{r10}"()26 ret void27}28 29define i32 @bar(i32 %i) {30 %vla = alloca i32, i32 %i, align 431 tail call void asm sideeffect "mov r7, #1", "~{r11}"()32 %1 = load volatile i32, ptr %vla, align 433 ret i32 %134}35