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1; RUN: llc -mtriple armv7-arm-linux-gnueabihf -O2 -mcpu=cortex-a7 < %s | FileCheck %s2; RUN: llc -mtriple armv7-arm-linux-gnueabihf -O2 -mcpu=cortex-a7 -early-live-intervals < %s | FileCheck %s3 4%struct.twofloat = type { float, float }5%struct.twodouble = type { double, double }6 7; Check support for returning a float in GPR with soft float ABI8define arm_aapcscc float @zerobits_float_soft() #0 {9; CHECK-LABEL: zerobits_float_soft10; CHECK: mov r0, #011 %1 = tail call float asm "mov ${0}, #0", "=&r"()12 ret float %113}14 15; Check support for returning a double in GPR with soft float ABI16define arm_aapcscc double @zerobits_double_soft() #0 {17; CHECK-LABEL: zerobits_double_soft18; CHECK: mov r0, #019; CHECK-NEXT: mov r1, #020 %1 = tail call double asm "mov ${0:Q}, #0\0Amov ${0:R}, #0", "=&r"()21 ret double %122}23 24; Check support for returning a float in GPR with matching float input with25; soft float ABI26define arm_aapcscc float @flt_gpr_matching_in_op_soft(float %f) #0 {27; CHECK-LABEL: flt_gpr_matching_in_op_soft28; CHECK: mov r0, r029 %1 = call float asm "mov $0, $1", "=&r,0"(float %f)30 ret float %131}32 33; Check support for returning a double in GPR with matching double input with34; soft float ABI35define arm_aapcscc double @dbl_gpr_matching_in_op_soft(double %d) #0 {36; CHECK-LABEL: dbl_gpr_matching_in_op_soft37; CHECK: mov r1, r038 %1 = call double asm "mov ${0:R}, ${1:Q}", "=&r,0"(double %d)39 ret double %140}41 42; Check support for returning a float in specific GPR with matching float input43; with soft float ABI44define arm_aapcscc float @flt_gpr_matching_spec_reg_in_op_soft(float %f) #0 {45; CHECK-LABEL: flt_gpr_matching_spec_reg_in_op_soft46; CHECK: mov r3, r347 %1 = call float asm "mov $0, $1", "=&{r3},0"(float %f)48 ret float %149}50 51; Check support for returning a double in specific GPR with matching double52; input with soft float ABI53define arm_aapcscc double @dbl_gpr_matching_spec_reg_in_op_soft(double %d) #0 {54; CHECK-LABEL: dbl_gpr_matching_spec_reg_in_op_soft55; CHECK: mov r3, r256 %1 = call double asm "mov ${0:R}, ${1:Q}", "=&{r2},0"(double %d)57 ret double %158}59 60; Check support for returning several float in GPR61define arm_aapcscc float @zerobits_float_convoluted_soft() #0 {62; CHECK-LABEL: zerobits_float_convoluted_soft63; CHECK: mov r0, #064; CHECK-NEXT: mov r1, #065 %1 = call { float, float } asm "mov $0, #0; mov $1, #0", "=r,=r"()66 %asmresult = extractvalue { float, float } %1, 067 %asmresult1 = extractvalue { float, float } %1, 168 %add = fadd float %asmresult, %asmresult169 ret float %add70}71 72; Check support for returning several double in GPR73define double @zerobits_double_convoluted_soft() #0 {74; CHECK-LABEL: zerobits_double_convoluted_soft75; CHECK: mov r0, #076; CHECK-NEXT: mov r1, #077; CHECK-NEXT: mov r2, #078; CHECK-NEXT: mov r3, #079 %1 = call { double, double } asm "mov ${0:Q}, #0; mov ${0:R}, #0; mov ${1:Q}, #0; mov ${1:R}, #0", "=r,=r"()80 %asmresult = extractvalue { double, double } %1, 081 %asmresult1 = extractvalue { double, double } %1, 182 %add = fadd double %asmresult, %asmresult183 ret double %add84}85 86; Check support for returning several floats in GPRs with matching float inputs87; with soft float ABI88define arm_aapcscc float @flt_gprs_matching_in_op_soft(float %f1, float %f2) #0 {89; CHECK-LABEL: flt_gprs_matching_in_op_soft90; CHECK: mov r0, r091; CHECK-NEXT: mov r1, r192 %1 = call { float, float } asm "mov $0, $2; mov $1, $3", "=&r,=&r,0,1"(float %f1, float %f2)93 %asmresult1 = extractvalue { float, float } %1, 094 %asmresult2 = extractvalue { float, float } %1, 195 %add = fadd float %asmresult1, %asmresult296 ret float %add97}98 99; Check support for returning several double in GPRs with matching double input100; with soft float ABI101define arm_aapcscc double @dbl_gprs_matching_in_op_soft(double %d1, double %d2) #0 {102; CHECK-LABEL: dbl_gprs_matching_in_op_soft103; CHECK: mov r1, r0104; CHECK-NEXT: mov r3, r2105 %1 = call { double, double } asm "mov ${0:R}, ${2:Q}; mov ${1:R}, ${3:Q}", "=&r,=&r,0,1"(double %d1, double %d2)106 %asmresult1 = extractvalue { double, double } %1, 0107 %asmresult2 = extractvalue { double, double } %1, 1108 %add = fadd double %asmresult1, %asmresult2109 ret double %add110}111 112; Check support for returning several float in specific GPRs with matching113; float input with soft float ABI114define arm_aapcscc float @flt_gprs_matching_spec_reg_in_op_soft(float %f1, float %f2) #0 {115; CHECK-LABEL: flt_gprs_matching_spec_reg_in_op_soft116; CHECK: mov r3, r3117; CHECK-NEXT: mov r4, r4118 %1 = call { float, float } asm "mov $0, $2; mov $1, $3", "=&{r3},=&{r4},0,1"(float %f1, float %f2)119 %asmresult1 = extractvalue { float, float } %1, 0120 %asmresult2 = extractvalue { float, float } %1, 1121 %add = fadd float %asmresult1, %asmresult2122 ret float %add123}124 125; Check support for returning several double in specific GPRs with matching126; double input with soft float ABI127define arm_aapcscc double @dbl_gprs_matching_spec_reg_in_op_soft(double %d1, double %d2) #0 {128; CHECK-LABEL: dbl_gprs_matching_spec_reg_in_op_soft129; CHECK: mov r3, r2130; CHECK-NEXT: mov r5, r4131 %1 = call { double, double } asm "mov ${0:R}, ${2:Q}; mov ${1:R}, ${3:Q}", "=&{r2},=&{r4},0,1"(double %d1, double %d2)132 %asmresult1 = extractvalue { double, double } %1, 0133 %asmresult2 = extractvalue { double, double } %1, 1134 %add = fadd double %asmresult1, %asmresult2135 ret double %add136}137 138attributes #0 = { nounwind "target-features"="-d32,+vfp2,+vfp3" "use-soft-float"="true" }139 140 141; Check support for returning a float in GPR with hard float ABI142define float @zerobits_float_hard() #1 {143; CHECK-LABEL: zerobits_float_hard144; CHECK: mov r0, #0145; CHECK: vmov s0, r0146 %1 = tail call float asm "mov ${0}, #0", "=&r"()147 ret float %1148}149 150; Check support for returning a double in GPR with hard float ABI151define double @zerobits_double_hard() #1 {152; CHECK-LABEL: zerobits_double_hard153; CHECK: mov r0, #0154; CHECK-NEXT: mov r1, #0155; CHECK: vmov d0, r0, r1156 %1 = tail call double asm "mov ${0:Q}, #0\0Amov ${0:R}, #0", "=&r"()157 ret double %1158}159 160; Check support for returning a float in GPR with matching float input with161; hard float ABI162define float @flt_gpr_matching_in_op_hard(float %f) #1 {163; CHECK-LABEL: flt_gpr_matching_in_op_hard164; CHECK: vmov r0, s0165; CHECK: mov r0, r0166; CHECK: vmov s0, r0167 %1 = call float asm "mov $0, $1", "=&r,0"(float %f)168 ret float %1169}170 171; Check support for returning a double in GPR with matching double input with172; hard float ABI173define double @dbl_gpr_matching_in_op_hard(double %d) #1 {174; CHECK-LABEL: dbl_gpr_matching_in_op_hard175; CHECK: vmov r0, r1, d0176; CHECK: mov r1, r0177; CHECK: vmov d0, r0, r1178 %1 = call double asm "mov ${0:R}, ${1:Q}", "=&r,0"(double %d)179 ret double %1180}181 182; Check support for returning a float in specific GPR with matching float183; input with hard float ABI184define float @flt_gpr_matching_spec_reg_in_op_hard(float %f) #1 {185; CHECK-LABEL: flt_gpr_matching_spec_reg_in_op_hard186; CHECK: vmov r3, s0187; CHECK: mov r3, r3188; CHECK: vmov s0, r3189 %1 = call float asm "mov $0, $1", "=&{r3},0"(float %f)190 ret float %1191}192 193; Check support for returning a double in specific GPR with matching double194; input with hard float ABI195define double @dbl_gpr_matching_spec_reg_in_op_hard(double %d) #1 {196; CHECK-LABEL: dbl_gpr_matching_spec_reg_in_op_hard197; CHECK: vmov r2, r3, d0198; CHECK: mov r3, r2199; CHECK: vmov d0, r2, r3200 %1 = call double asm "mov ${0:R}, ${1:Q}", "=&{r2},0"(double %d)201 ret double %1202}203 204; Check support for returning several float in GPR205define %struct.twofloat @zerobits_float_convoluted_hard() #1 {206; CHECK-LABEL: zerobits_float_convoluted_hard207; CHECK: mov r0, #0208; CHECK-NEXT: mov r1, #0209; CHECK: vmov s0, r0210; CHECK-NEXT: vmov s1, r1211 %1 = call { float, float } asm "mov $0, #0; mov $1, #0", "=r,=r"()212 %asmresult1 = extractvalue { float, float } %1, 0213 %asmresult2 = extractvalue { float, float } %1, 1214 %partialres = insertvalue %struct.twofloat undef, float %asmresult1, 0215 %res = insertvalue %struct.twofloat %partialres, float %asmresult2, 1216 ret %struct.twofloat %res217}218 219; Check support for returning several double in GPR220define %struct.twodouble @zerobits_double_convoluted_hard() #1 {221; CHECK-LABEL: zerobits_double_convoluted_hard222; CHECK: mov r0, #0223; CHECK-NEXT: mov r1, #0224; CHECK-NEXT: mov r2, #0225; CHECK-NEXT: mov r3, #0226; CHECK: vmov d0, r0, r1227; CHECK-NEXT: vmov d1, r2, r3228 %1 = call { double, double } asm "mov ${0:Q}, #0; mov ${0:R}, #0; mov ${1:Q}, #0; mov ${1:R}, #0", "=r,=r"()229 %asmresult1 = extractvalue { double, double } %1, 0230 %asmresult2 = extractvalue { double, double } %1, 1231 %partialres = insertvalue %struct.twodouble undef, double %asmresult1, 0232 %res = insertvalue %struct.twodouble %partialres, double %asmresult2, 1233 ret %struct.twodouble %res234}235 236; Check support for returning several floats in GPRs with matching float inputs237; with hard float ABI238define %struct.twofloat @flt_gprs_matching_in_op_hard(float %f1, float %f2) #1 {239; CHECK-LABEL: flt_gprs_matching_in_op_hard240; CHECK: vmov r0, s0241; CHECK-NEXT: vmov r1, s1242; CHECK: mov r0, r0243; CHECK-NEXT: mov r1, r1244; CHECK: vmov s0, r0245; CHECK-NEXT: vmov s1, r1246 %1 = call { float, float } asm "mov $0, $2; mov $1, $3", "=&r,=&r,0,1"(float %f1, float %f2)247 %asmresult1 = extractvalue { float, float } %1, 0248 %asmresult2 = extractvalue { float, float } %1, 1249 %partialres = insertvalue %struct.twofloat undef, float %asmresult1, 0250 %res = insertvalue %struct.twofloat %partialres, float %asmresult2, 1251 ret %struct.twofloat %res252}253 254; Check support for returning several double in GPRs with matching double input255; with hard float ABI256define %struct.twodouble @dbl_gprs_matching_in_op_hard(double %d1, double %d2) #1 {257; CHECK-LABEL: dbl_gprs_matching_in_op_hard258; CHECK: vmov r0, r1, d0259; CHECK-NEXT: vmov r2, r3, d1260; CHECK: mov r1, r0261; CHECK-NEXT: mov r3, r2262; CHECK: vmov d0, r0, r1263; CHECK-NEXT: vmov d1, r2, r3264 %1 = call { double, double } asm "mov ${0:R}, ${2:Q}; mov ${1:R}, ${3:Q}", "=&r,=&r,0,1"(double %d1, double %d2)265 %asmresult1 = extractvalue { double, double } %1, 0266 %asmresult2 = extractvalue { double, double } %1, 1267 %partialres = insertvalue %struct.twodouble undef, double %asmresult1, 0268 %res = insertvalue %struct.twodouble %partialres, double %asmresult2, 1269 ret %struct.twodouble %res270}271 272; Check support for returning several float in specific GPRs with matching273; float input with hard float ABI274define %struct.twofloat @flt_gprs_matching_spec_reg_in_op_hard(float %f1, float %f2) #1 {275; CHECK-LABEL: flt_gprs_matching_spec_reg_in_op_hard276; CHECK: vmov r3, s0277; CHECK-NEXT: vmov r4, s1278; CHECK: mov r3, r3279; CHECK-NEXT: mov r4, r4280; CHECK: vmov s0, r3281; CHECK-NEXT: vmov s1, r4282 %1 = call { float, float } asm "mov $0, $2; mov $1, $3", "=&{r3},=&{r4},0,1"(float %f1, float %f2)283 %asmresult1 = extractvalue { float, float } %1, 0284 %asmresult2 = extractvalue { float, float } %1, 1285 %partialres = insertvalue %struct.twofloat undef, float %asmresult1, 0286 %res = insertvalue %struct.twofloat %partialres, float %asmresult2, 1287 ret %struct.twofloat %res288}289 290; Check support for returning several double in specific GPRs with matching291; double input with hard float ABI292define %struct.twodouble @dbl_gprs_matching_spec_reg_in_op_hard(double %d1, double %d2) #1 {293; CHECK-LABEL: dbl_gprs_matching_spec_reg_in_op_hard294; CHECK: vmov r2, r3, d0295; CHECK-NEXT: vmov r4, r5, d1296; CHECK: mov r3, r2297; CHECK-NEXT: mov r5, r4298; CHECK: vmov d0, r2, r3299; CHECK-NEXT: vmov d1, r4, r5300 %1 = call { double, double } asm "mov ${0:R}, ${2:Q}; mov ${1:R}, ${3:Q}", "=&{r2},=&{r4},0,1"(double %d1, double %d2)301 %asmresult1 = extractvalue { double, double } %1, 0302 %asmresult2 = extractvalue { double, double } %1, 1303 %partialres = insertvalue %struct.twodouble undef, double %asmresult1, 0304 %res = insertvalue %struct.twodouble %partialres, double %asmresult2, 1305 ret %struct.twodouble %res306}307 308attributes #1 = { nounwind "target-features"="-d32,+vfp2,+vfp3" "use-soft-float"="false" }309