135 lines · plain
1; RUN: llc -mtriple=arm-eabi -float-abi=soft -mattr=+neon,+v6t2 -no-integrated-as %s -o - \2; RUN: | FileCheck %s3 4; Radar 74490435%struct.int32x4_t = type { <4 x i32> }6 7define void @t() nounwind {8entry:9; CHECK: vmov.I64 q15, #010; CHECK: vmov.32 d30[0],11; CHECK: vmov q8, q1512 %tmp = alloca %struct.int32x4_t, align 1613 call void asm sideeffect "vmov.I64 q15, #0\0Avmov.32 d30[0], $1\0Avmov ${0:q}, q15\0A", "=*w,r,~{d31},~{d30}"(ptr elementtype(%struct.int32x4_t) %tmp, i32 8192) nounwind14 ret void15}16 17; Radar 745711018%struct.int32x2_t = type { <4 x i32> }19 20define void @t2() nounwind {21entry:22; CHECK: vmov d30, d1623; CHECK: vmov.32 r0, d30[0]24 %asmtmp2 = tail call i32 asm sideeffect "vmov d30, $1\0Avmov.32 $0, d30[0]\0A", "=r,w,~{d30}"(<2 x i32> undef) nounwind25 ret void26}27 28; Radar 930608629 30%0 = type { <8 x i8>, ptr }31 32define hidden void @conv4_8_E() nounwind {33entry:34%asmtmp31 = call %0 asm "vld1.u8 {$0}, [$1:128]!\0A", "=w,=r,1"(ptr undef) nounwind35unreachable36}37 38; Radar 9037836 & 911993939 40define i32 @t3() nounwind {41entry:42tail call void asm sideeffect "flds s15, $0 \0A", "^Uv|m,~{s15}"(float 1.000000e+00) nounwind43ret i32 044}45 46; Radar 9037836 & 911993947 48@k.2126 = internal unnamed_addr global float 1.000000e+0049define i32 @t4() nounwind {50entry:51call void asm sideeffect "flds s15, $0 \0A", "*^Uv,~{s15}"(ptr elementtype(float) @k.2126) nounwind52ret i32 053}54 55; Radar 9037836 & 911993956 57define i32 @t5() nounwind {58entry:59call void asm sideeffect "flds s15, $0 \0A", "*^Uvm,~{s15}"(ptr elementtype(float) @k.2126) nounwind60ret i32 061}62 63; Radar 9307836 & 911993964 65define float @t6(float %y) nounwind {66entry:67; CHECK: t668; CHECK: flds s15, s069 %0 = tail call float asm "flds s15, $0", "=x"() nounwind70 ret float %071}72 73; Radar 9307836 & 911993974 75define double @t7(double %y) nounwind {76entry:77; CHECK: t778; CHECK: flds s15, d079 %0 = tail call double asm "flds s15, $0", "=x"() nounwind80 ret double %081}82 83; Radar 9307836 & 911993984 85define float @t8(float %y) nounwind {86entry:87; CHECK: t888; CHECK: flds s15, s089 %0 = tail call float asm "flds s15, $0", "=t"() nounwind90 ret float %091}92 93; Radar 9307836 & 911993994 95define i32 @t9(i32 %r0) nounwind {96entry:97; CHECK: t998; CHECK: movw r0, #2718299 %0 = tail call i32 asm "movw $0, $1", "=r,j"(i32 27182) nounwind100 ret i32 %0101}102 103; Radar 9866494104 105define void @t10(ptr %f, i32 %g) nounwind {106entry:107; CHECK: t10108; CHECK: str r1, [r0]109 %f.addr = alloca ptr, align 4110 store ptr %f, ptr %f.addr, align 4111 call void asm "str $1, $0", "=*Q,r"(ptr elementtype(ptr) %f.addr, i32 %g) nounwind112 ret void113}114 115; Radar 10551006116 117define <4 x i32> @t11(ptr %p) nounwind {118entry:119; CHECK: t11120; CHECK: vld1.s32 {d16[], d17[]}, [r0]121 %0 = tail call <4 x i32> asm "vld1.s32 {${0:e}[], ${0:f}[]}, [$1]", "=w,r"(ptr %p) nounwind122 ret <4 x i32> %0123}124 125; Bugzilla PR26038126 127define i32 @fn1() local_unnamed_addr nounwind {128; CHECK-LABEL: fn1129entry:130; CHECK: mov [[addr:r[0-9]+]], #5131; CHECK: ldrh {{.*}}[[addr]]132 %0 = tail call i32 asm "ldrh $0, $1", "=r,*Q"(ptr elementtype(i8) inttoptr (i32 5 to ptr)) nounwind133 ret i32 %0134}135