56 lines · plain
1; RUN: llc < %s -mtriple=armv7 -mattr=+db | FileCheck %s2; RUN: llc < %s -mtriple=thumbv7 -mattr=+db | FileCheck %s3 4; CHECK-LABEL: test5define void @test() {6 call void @llvm.arm.dmb(i32 3) ; CHECK: dmb osh7 call void @llvm.arm.dsb(i32 7) ; CHECK: dsb nsh8 call void @llvm.arm.isb(i32 15) ; CHECK: isb sy9 ret void10}11 12; Important point is that the compiler should not reorder memory access13; instructions around DMB.14; Failure to do so, two STRs will collapse into one STRD.15; CHECK-LABEL: test_dmb_reordering16define void @test_dmb_reordering(i32 %a, i32 %b, ptr %d) {17 store i32 %a, ptr %d ; CHECK: str {{r[0-9]+}}, [{{r[0-9]+}}]18 19 call void @llvm.arm.dmb(i32 15) ; CHECK: dmb sy20 21 %d1 = getelementptr i32, ptr %d, i32 122 store i32 %b, ptr %d1 ; CHECK: str {{r[0-9]+}}, [{{r[0-9]+}}, #4]23 24 ret void25}26 27; Similarly for DSB.28; CHECK-LABEL: test_dsb_reordering29define void @test_dsb_reordering(i32 %a, i32 %b, ptr %d) {30 store i32 %a, ptr %d ; CHECK: str {{r[0-9]+}}, [{{r[0-9]+}}]31 32 call void @llvm.arm.dsb(i32 15) ; CHECK: dsb sy33 34 %d1 = getelementptr i32, ptr %d, i32 135 store i32 %b, ptr %d1 ; CHECK: str {{r[0-9]+}}, [{{r[0-9]+}}, #4]36 37 ret void38}39 40; And ISB.41; CHECK-LABEL: test_isb_reordering42define void @test_isb_reordering(i32 %a, i32 %b, ptr %d) {43 store i32 %a, ptr %d ; CHECK: str {{r[0-9]+}}, [{{r[0-9]+}}]44 45 call void @llvm.arm.isb(i32 15) ; CHECK: isb sy46 47 %d1 = getelementptr i32, ptr %d, i32 148 store i32 %b, ptr %d1 ; CHECK: str {{r[0-9]+}}, [{{r[0-9]+}}, #4]49 50 ret void51}52 53declare void @llvm.arm.dmb(i32)54declare void @llvm.arm.dsb(i32)55declare void @llvm.arm.isb(i32)56