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1; RUN: llc -mtriple=thumb-none-eabi %s -o - -mcpu=cortex-m0 -asm-print-latency=1 | FileCheck %s --match-full-lines --check-prefix=ON2; RUN: llc -mtriple=thumb-none-eabi %s -o - -mcpu=cortex-m0 -asm-print-latency=0 | FileCheck %s --match-full-lines --check-prefix=OFF3; RUN: llc -mtriple=thumb-none-eabi %s -o - -mcpu=cortex-m0                      | FileCheck %s --match-full-lines --check-prefix=OFF4 5define i64 @load_i64(ptr %ptr){6; ON:   ldr     r2, [r0]                        @  Latency: 47; ON:   ldr     r1, [r0, #4]                    @  Latency: 48; ON:   mov     r0, r2                          @  Latency: 29; ON:   bx      lr10; OFF:  ldr     r2, [r0]11; OFF:  ldr     r1, [r0, #4]12; OFF:  mov     r0, r213; OFf:  bx      lr14  %a = load i64, ptr %ptr15  ret i64 %a16}17