41 lines · plain
1; RUN: llc -mtriple=armv7--eabi -verify-machineinstrs < %s | FileCheck %s2 3; Check the way we schedule/merge a bunch of loads and stores.4; Originally test/CodeGen/ARM/2011-07-07-ScheduleDAGCrash.ll ; now5; being used as a test of optimizations related to ldm/stm.6 7; FIXME: We could merge more loads/stores with regalloc hints.8; FIXME: Fix scheduling so we don't have 16 live registers.9 10define void @f(ptr nocapture %a, ptr nocapture %b, ptr nocapture %cc, ptr nocapture %dd) nounwind uwtable noinline ssp {11entry:12 %c = load i256, ptr %cc13 %d = load i256, ptr %dd14 %add = add nsw i256 %c, %d15 store i256 %add, ptr %a, align 816 %or = or i256 %c, 160693804425899027554196209234116260252220299378279283530137617 %add6 = add nsw i256 %or, %d18 store i256 %add6, ptr %b, align 819 ret void20 ; CHECK-DAG: ldm r221 ; CHECK-DAG: ldr {{.*}}, [r3]22 ; CHECK-DAG: ldr {{.*}}, [r3, #4]23 ; CHECK-DAG: ldr {{.*}}, [r3, #8]24 ; CHECK-DAG: ldr {{.*}}, [r3, #12]25 ; CHECK-DAG: ldr {{.*}}, [r3, #16]26 ; CHECK-DAG: ldr {{.*}}, [r3, #20]27 ; CHECK-DAG: ldr {{.*}}, [r3, #24]28 ; CHECK-DAG: ldr {{.*}}, [r3, #28]29 ; CHECK-DAG: ldr {{.*}}, [r2, #20]30 ; CHECK-DAG: ldr {{.*}}, [r2, #24]31 ; CHECK-DAG: ldr {{.*}}, [r2, #28]32 ; CHECK-DAG: stm r033 ; CHECK-DAG: str {{.*}}, [r0, #20]34 ; CHECK-DAG: str {{.*}}, [r0, #24]35 ; CHECK-DAG: str {{.*}}, [r0, #28]36 ; CHECK-DAG: stm r137 ; CHECK-DAG: str {{.*}}, [r1, #20]38 ; CHECK-DAG: str {{.*}}, [r1, #24]39 ; CHECK-DAG: str {{.*}}, [r1, #28]40}41