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1; The failure is caused by ARM LDRcp/PICADD pairs. In PIC mode, the constant pool2; need a label to do address computation. This label is emitted when backend emits3; PICADD. When the target becomes dead, PICADD will be deleted. without this patch4; LDRcp is dead but not being deleted. This will cause a dead contant pool entry5; using a non existing label. This will cause an error in MC object emitting pass.6 7; RUN: llc -relocation-model=pic -mcpu=cortex-a53 %s -filetype=obj -o - | llvm-nm - | FileCheck %s8 9target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"10target triple = "armv8-unknown-linux-android"11 12@_ZN15UsecaseSelector25AllowedImplDefinedFormatsE = external dso_local unnamed_addr constant <{ i32, i32, i32, i32, [12 x i32] }>, align 413 14; Function Attrs: noinline nounwind optnone sspstrong uwtable15define dso_local fastcc void @_ZN15UsecaseSelector26IsAllowedImplDefinedFormatE15ChiBufferFormatj() unnamed_addr #1 align 2 {16 br label %117 18; <label>:1: ; preds = %13, %019 %2 = icmp ult i32 undef, 420 br i1 %2, label %3, label %1421 22; <label>:3: ; preds = %123 br i1 undef, label %4, label %1324 25; <label>:4: ; preds = %326 %5 = getelementptr inbounds [16 x i32], ptr @_ZN15UsecaseSelector25AllowedImplDefinedFormatsE, i32 0, i32 undef27 %6 = load i32, ptr %5, align 428 %7 = icmp eq i32 10, %629 br i1 %7, label %9, label %830 31; <label>:8: ; preds = %432 br i1 undef, label %9, label %1233 34; <label>:9: ; preds = %8, %435 br i1 undef, label %10, label %1336 37; <label>:10: ; preds = %938 br i1 undef, label %11, label %1339 40; <label>:11: ; preds = %1041 br label %1442 43; <label>:12: ; preds = %844 br label %1445 46; <label>:13: ; preds = %10, %9, %347 br label %148 49; <label>:14: ; preds = %12, %11, %150 ret void51}52 53attributes #1 = { noinline optnone }54 55; CHECK: _ZN15UsecaseSelector26IsAllowedImplDefinedFormatE15ChiBufferFormatj56 57