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1; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -regalloc=fast -optimize-regalloc=0 -verify-machineinstrs | FileCheck %s -check-prefix=A8 -check-prefix=CHECK -check-prefix=NORMAL2; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-m3 -regalloc=fast -optimize-regalloc=0 | FileCheck %s -check-prefix=M3 -check-prefix=CHECK -check-prefix=NORMAL3; rdar://69498354; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -regalloc=basic | FileCheck %s -check-prefix=BASIC -check-prefix=CHECK -check-prefix=NORMAL5; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -regalloc=greedy | FileCheck %s -check-prefix=GREEDY -check-prefix=CHECK -check-prefix=NORMAL6; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=swift | FileCheck %s -check-prefix=CHECK -check-prefix=NORMAL7 8; RUN: llc < %s -mtriple=thumbv7-apple-ios -arm-assume-misaligned-load-store | FileCheck %s -check-prefix=CHECK -check-prefix=CONSERVATIVE9 10; Magic ARM pair hints works best with linearscan / fast.11 12@b = external global ptr13 14; We use the following two to force values into specific registers.15declare ptr @get_ptr()16declare void @use_i64(i64 %v)17 18define void @test_ldrd(i64 %a) nounwind readonly "frame-pointer"="all" {19; CHECK-LABEL: test_ldrd:{{.*$}}20; NORMAL: bl{{x?}} _get_ptr21; A8: ldrd r0, r1, [r0]22; Cortex-M3 errata 602117: LDRD with base in list may result in incorrect base23; register when interrupted or faulted.24; M3-NOT: ldrd r[[REGNUM:[0-9]+]], {{r[0-9]+}}, [r[[REGNUM]]]25; CONSERVATIVE-NOT: ldrd26; NORMAL: bl{{x?}} _use_i6427 %ptr = call ptr @get_ptr()28 %v = load i64, ptr %ptr, align 829 call void @use_i64(i64 %v)30 ret void31}32 33; rdar://10435045 mixed LDRi8/LDRi1234;35; In this case, LSR generate a sequence of LDRi8/LDRi12. We should be36; able to generate an LDRD pair here, but this is highly sensitive to37; regalloc hinting. So, this doubles as a register allocation38; test. RABasic currently does a better job within the inner loop39; because of its *lack* of hinting ability. Whereas RAGreedy keeps40; R0/R1/R2 live as the three arguments, forcing the LDRD's odd41; destination into R3. We then sensibly split LDRD again rather then42; evict another live range or use callee saved regs. Sorry if the test43; is sensitive to Regalloc changes, but it is an interesting case.44;45; CHECK-LABEL: f:46; BASIC: %bb47; BASIC: ldrd48; BASIC: str49; GREEDY: %bb50; GREEDY: ldrd51; GREEDY: str52define void @f(ptr nocapture %a, ptr nocapture %b, i32 %n) nounwind "frame-pointer"="all" {53entry:54 %0 = add nsw i32 %n, -1 ; <i32> [#uses=2]55 %1 = icmp sgt i32 %0, 0 ; <i1> [#uses=1]56 br i1 %1, label %bb, label %return57 58bb: ; preds = %bb, %entry59 %i.03 = phi i32 [ %tmp, %bb ], [ 0, %entry ] ; <i32> [#uses=3]60 %scevgep = getelementptr i32, ptr %a, i32 %i.03 ; <ptr> [#uses=1]61 %scevgep4 = getelementptr i32, ptr %b, i32 %i.03 ; <ptr> [#uses=1]62 %tmp = add i32 %i.03, 1 ; <i32> [#uses=3]63 %scevgep5 = getelementptr i32, ptr %a, i32 %tmp ; <ptr> [#uses=1]64 %2 = load i32, ptr %scevgep, align 4 ; <i32> [#uses=1]65 %3 = load i32, ptr %scevgep5, align 4 ; <i32> [#uses=1]66 %4 = add nsw i32 %3, %2 ; <i32> [#uses=1]67 store i32 %4, ptr %scevgep4, align 468 %exitcond = icmp eq i32 %tmp, %0 ; <i1> [#uses=1]69 br i1 %exitcond, label %return, label %bb70 71return: ; preds = %bb, %entry72 ret void73}74 75; rdar://1397831776; Pair of loads not formed when lifetime markers are set.77%struct.Test = type { i32, i32, i32 }78 79@TestVar = external global %struct.Test80 81; CHECK-LABEL: Func1:82define void @Func1() nounwind ssp "frame-pointer"="all" {83entry:84; A8: movw [[BASER:r[0-9]+]], :lower16:{{.*}}TestVar{{.*}}85; A8: movt [[BASER]], :upper16:{{.*}}TestVar{{.*}}86; A8: ldr [[BASE:r[0-9]+]], [[[BASER]]]87; A8: ldrd [[FIELD1:r[0-9]+]], [[FIELD2:r[0-9]+]], [[[BASE]], #4]88; A8-NEXT: add [[FIELD2]], [[FIELD1]]89; A8-NEXT: str [[FIELD2]], [[[BASE]]]90; CONSERVATIVE-NOT: ldrd91 %orig_blocks = alloca [256 x i16], align 292 %tmp1 = load i32, ptr getelementptr inbounds (%struct.Test, ptr @TestVar, i32 0, i32 1), align 493 %tmp2 = load i32, ptr getelementptr inbounds (%struct.Test, ptr @TestVar, i32 0, i32 2), align 494 %add = add nsw i32 %tmp2, %tmp195 store i32 %add, ptr @TestVar, align 496 call void @llvm.lifetime.end.p0(i64 512, ptr %orig_blocks) nounwind97 ret void98}99 100declare void @extfunc(i32, i32, i32, i32)101 102; CHECK-LABEL: Func2:103; CONSERVATIVE-NOT: ldrd104; A8: ldrd105; CHECK: bl{{x?}} _extfunc106; A8: pop107define void @Func2(ptr %p) "frame-pointer"="all" {108entry:109 %addr1 = getelementptr i32, ptr %p, i32 1110 %v0 = load i32, ptr %p111 %v1 = load i32, ptr %addr1112 ; try to force %v0/%v1 into non-adjacent registers113 call void @extfunc(i32 %v0, i32 0, i32 0, i32 %v1)114 ret void115}116 117; CHECK-LABEL: strd_spill_ldrd_reload:118; A8: strd r1, r0, [sp, #-8]!119; M3: strd r1, r0, [sp, #-8]!120; BASIC: strd r1, r0, [sp, #-8]!121; GREEDY: strd r0, r1, [sp, #-8]!122; CONSERVATIVE: strd r0, r1, [sp, #-8]!123; NORMAL: @ InlineAsm Start124; NORMAL: @ InlineAsm End125; A8: ldrd r2, r1, [sp]126; M3: ldrd r2, r1, [sp]127; BASIC: ldrd r2, r1, [sp]128; GREEDY: ldrd r1, r2, [sp]129; CONSERVATIVE: ldrd r1, r2, [sp]130; CHECK: bl{{x?}} _extfunc131define void @strd_spill_ldrd_reload(i32 %v0, i32 %v1) "frame-pointer"="all" {132 ; force %v0 and %v1 to be spilled133 call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{lr}"()134 ; force the reloaded %v0, %v1 into different registers135 call void @extfunc(i32 0, i32 %v0, i32 %v1, i32 7)136 ret void137}138 139declare void @extfunc2(ptr, i32, i32)140 141; CHECK-LABEL: ldrd_postupdate_dec:{{.*$}}142; NORMAL: ldrd r1, r2, [r0], #-8143; CONSERVATIVE-NOT: ldrd144; CHECK: bl{{x?}} _extfunc145define void @ldrd_postupdate_dec(ptr %p0) "frame-pointer"="all" {146 %p0.1 = getelementptr i32, ptr %p0, i32 1147 %v0 = load i32, ptr %p0148 %v1 = load i32, ptr %p0.1149 %p1 = getelementptr i32, ptr %p0, i32 -2150 call void @extfunc2(ptr %p1, i32 %v0, i32 %v1)151 ret void152}153 154; CHECK-LABEL: ldrd_postupdate_inc:{{.*$}}155; NORMAL: ldrd r1, r2, [r0], #8156; CONSERVATIVE-NOT: ldrd157; CHECK: bl{{x?}} _extfunc158define void @ldrd_postupdate_inc(ptr %p0) "frame-pointer"="all" {159 %p0.1 = getelementptr i32, ptr %p0, i32 1160 %v0 = load i32, ptr %p0161 %v1 = load i32, ptr %p0.1162 %p1 = getelementptr i32, ptr %p0, i32 2163 call void @extfunc2(ptr %p1, i32 %v0, i32 %v1)164 ret void165}166 167; CHECK-LABEL: strd_postupdate_dec:{{.*$}}168; NORMAL: strd r1, r2, [r0], #-8169; CONSERVATIVE-NOT: strd170; CHECK: bx lr171define ptr @strd_postupdate_dec(ptr %p0, i32 %v0, i32 %v1) "frame-pointer"="none" {172 %p0.1 = getelementptr i32, ptr %p0, i32 1173 store i32 %v0, ptr %p0174 store i32 %v1, ptr %p0.1175 %p1 = getelementptr i32, ptr %p0, i32 -2176 ret ptr %p1177}178 179; CHECK-LABEL: strd_postupdate_inc:{{.*$}}180; NORMAL: strd r1, r2, [r0], #8181; CONSERVATIVE-NOT: strd182; CHECK: bx lr183define ptr @strd_postupdate_inc(ptr %p0, i32 %v0, i32 %v1) "frame-pointer"="none" {184 %p0.1 = getelementptr i32, ptr %p0, i32 1185 store i32 %v0, ptr %p0186 store i32 %v1, ptr %p0.1187 %p1 = getelementptr i32, ptr %p0, i32 2188 ret ptr %p1189}190 191; CHECK-LABEL: ldrd_strd_aa:{{.*$}}192; NORMAL: ldrd [[TMP1:r[0-9]]], [[TMP2:r[0-9]]],193; NORMAL: strd [[TMP1]], [[TMP2]],194; CONSERVATIVE-NOT: ldrd195; CONSERVATIVE-NOT: strd196; CHECK: bx lr197 198define void @ldrd_strd_aa(ptr noalias nocapture %x, ptr noalias nocapture readonly %y) {199entry:200 %0 = load i32, ptr %y, align 4201 store i32 %0, ptr %x, align 4202 %arrayidx2 = getelementptr inbounds i32, ptr %y, i32 1203 %1 = load i32, ptr %arrayidx2, align 4204 %arrayidx3 = getelementptr inbounds i32, ptr %x, i32 1205 store i32 %1, ptr %arrayidx3, align 4206 ret void207}208 209; CHECK-LABEL: bitcast_ptr_ldr210; CHECK-NOT: ldrd211define i32 @bitcast_ptr_ldr(ptr %In) {212entry:213 %in.addr.1 = getelementptr inbounds i32, ptr %In, i32 1214 %0 = load i32, ptr %In, align 2215 %1 = load i32, ptr %in.addr.1, align 2216 %mul = mul i32 %0, %1217 ret i32 %mul218}219 220; CHECK-LABEL: bitcast_gep_ldr221; CHECK-NOT: ldrd222define i32 @bitcast_gep_ldr(ptr %In) {223entry:224 %in.addr.1 = getelementptr inbounds i16, ptr %In, i32 2225 %0 = load i32, ptr %In, align 2226 %1 = load i32, ptr %in.addr.1, align 2227 %mul = mul i32 %0, %1228 ret i32 %mul229}230 231; CHECK-LABEL: bitcast_ptr_str232; CHECK-NOT: strd233define void @bitcast_ptr_str(i32 %arg0, i32 %arg1, ptr %out) {234entry:235 %out.addr.1 = getelementptr inbounds i32, ptr %out, i32 1236 store i32 %arg0, ptr %out, align 2237 store i32 %arg1, ptr %out.addr.1, align 2238 ret void239}240 241; CHECK-LABEL: bitcast_gep_str242; CHECK-NOT: strd243define void @bitcast_gep_str(i32 %arg0, i32 %arg1, ptr %out) {244entry:245 %out.addr.1 = getelementptr inbounds i16, ptr %out, i32 2246 store i32 %arg0, ptr %out, align 2247 store i32 %arg1, ptr %out.addr.1, align 2248 ret void249}250 251declare void @llvm.lifetime.start.p0(i64, ptr nocapture) nounwind252declare void @llvm.lifetime.end.p0(i64, ptr nocapture) nounwind253