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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -mtriple=thumbv7-unknown-linux < %s | FileCheck -check-prefixes=CHECK %s3 4define { half, i32 } @test_frexp_f16_i32(half %a) {5; CHECK-LABEL: test_frexp_f16_i32:6; CHECK: @ %bb.0:7; CHECK-NEXT: push {r7, lr}8; CHECK-NEXT: sub sp, #89; CHECK-NEXT: bl __gnu_h2f_ieee10; CHECK-NEXT: add r1, sp, #411; CHECK-NEXT: bl frexpf12; CHECK-NEXT: bl __gnu_f2h_ieee13; CHECK-NEXT: ldr r1, [sp, #4]14; CHECK-NEXT: add sp, #815; CHECK-NEXT: pop {r7, pc}16 %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)17 ret { half, i32 } %result18}19 20define half @test_frexp_f16_i32_only_use_fract(half %a) {21; CHECK-LABEL: test_frexp_f16_i32_only_use_fract:22; CHECK: @ %bb.0:23; CHECK-NEXT: push {r7, lr}24; CHECK-NEXT: sub sp, #825; CHECK-NEXT: bl __gnu_h2f_ieee26; CHECK-NEXT: add r1, sp, #427; CHECK-NEXT: bl frexpf28; CHECK-NEXT: bl __gnu_f2h_ieee29; CHECK-NEXT: add sp, #830; CHECK-NEXT: pop {r7, pc}31 %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)32 %result.0 = extractvalue { half, i32 } %result, 033 ret half %result.034}35 36define i32 @test_frexp_f16_i32_only_use_exp(half %a) {37; CHECK-LABEL: test_frexp_f16_i32_only_use_exp:38; CHECK: @ %bb.0:39; CHECK-NEXT: push {r7, lr}40; CHECK-NEXT: sub sp, #841; CHECK-NEXT: bl __gnu_h2f_ieee42; CHECK-NEXT: add r1, sp, #443; CHECK-NEXT: bl frexpf44; CHECK-NEXT: ldr r0, [sp, #4]45; CHECK-NEXT: add sp, #846; CHECK-NEXT: pop {r7, pc}47 %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)48 %result.0 = extractvalue { half, i32 } %result, 149 ret i32 %result.050}51 52define { <2 x half>, <2 x i32> } @test_frexp_v2f16_v2i32(<2 x half> %a) {53; CHECK-LABEL: test_frexp_v2f16_v2i32:54; CHECK: @ %bb.0:55; CHECK-NEXT: push {r4, r5, r6, lr}56; CHECK-NEXT: vpush {d8}57; CHECK-NEXT: sub sp, #1658; CHECK-NEXT: mov r4, r159; CHECK-NEXT: bl __gnu_h2f_ieee60; CHECK-NEXT: add r5, sp, #461; CHECK-NEXT: mov r1, r562; CHECK-NEXT: bl frexpf63; CHECK-NEXT: vld1.32 {d8[0]}, [r5:32]64; CHECK-NEXT: mov r6, r065; CHECK-NEXT: mov r0, r466; CHECK-NEXT: bl __gnu_h2f_ieee67; CHECK-NEXT: add r4, sp, #868; CHECK-NEXT: mov r1, r469; CHECK-NEXT: bl frexpf70; CHECK-NEXT: bl __gnu_f2h_ieee71; CHECK-NEXT: strh.w r0, [sp, #14]72; CHECK-NEXT: mov r0, r673; CHECK-NEXT: bl __gnu_f2h_ieee74; CHECK-NEXT: strh.w r0, [sp, #12]75; CHECK-NEXT: add r0, sp, #1276; CHECK-NEXT: vld1.32 {d8[1]}, [r4:32]77; CHECK-NEXT: vld1.32 {d16[0]}, [r0:32]78; CHECK-NEXT: vmov r2, r3, d879; CHECK-NEXT: vmovl.u16 q8, d1680; CHECK-NEXT: vmov.32 r0, d16[0]81; CHECK-NEXT: vmov.32 r1, d16[1]82; CHECK-NEXT: add sp, #1683; CHECK-NEXT: vpop {d8}84; CHECK-NEXT: pop {r4, r5, r6, pc}85 %result = call { <2 x half>, <2 x i32> } @llvm.frexp.v2f16.v2i32(<2 x half> %a)86 ret { <2 x half>, <2 x i32> } %result87}88 89define <2 x half> @test_frexp_v2f16_v2i32_only_use_fract(<2 x half> %a) {90; CHECK-LABEL: test_frexp_v2f16_v2i32_only_use_fract:91; CHECK: @ %bb.0:92; CHECK-NEXT: push {r4, lr}93; CHECK-NEXT: sub sp, #1694; CHECK-NEXT: mov r4, r095; CHECK-NEXT: mov r0, r196; CHECK-NEXT: bl __gnu_h2f_ieee97; CHECK-NEXT: add r1, sp, #898; CHECK-NEXT: bl frexpf99; CHECK-NEXT: bl __gnu_f2h_ieee100; CHECK-NEXT: strh.w r0, [sp, #14]101; CHECK-NEXT: mov r0, r4102; CHECK-NEXT: bl __gnu_h2f_ieee103; CHECK-NEXT: add r1, sp, #4104; CHECK-NEXT: bl frexpf105; CHECK-NEXT: bl __gnu_f2h_ieee106; CHECK-NEXT: strh.w r0, [sp, #12]107; CHECK-NEXT: add r0, sp, #12108; CHECK-NEXT: vld1.32 {d16[0]}, [r0:32]109; CHECK-NEXT: vmovl.u16 q8, d16110; CHECK-NEXT: vmov.32 r0, d16[0]111; CHECK-NEXT: vmov.32 r1, d16[1]112; CHECK-NEXT: add sp, #16113; CHECK-NEXT: pop {r4, pc}114 %result = call { <2 x half>, <2 x i32> } @llvm.frexp.v2f16.v2i32(<2 x half> %a)115 %result.0 = extractvalue { <2 x half>, <2 x i32> } %result, 0116 ret <2 x half> %result.0117}118 119define <2 x i32> @test_frexp_v2f16_v2i32_only_use_exp(<2 x half> %a) {120; CHECK-LABEL: test_frexp_v2f16_v2i32_only_use_exp:121; CHECK: @ %bb.0:122; CHECK-NEXT: push {r4, r5, r7, lr}123; CHECK-NEXT: sub sp, #8124; CHECK-NEXT: mov r4, r1125; CHECK-NEXT: bl __gnu_h2f_ieee126; CHECK-NEXT: mov r5, sp127; CHECK-NEXT: mov r1, r5128; CHECK-NEXT: bl frexpf129; CHECK-NEXT: mov r0, r4130; CHECK-NEXT: bl __gnu_h2f_ieee131; CHECK-NEXT: add r4, sp, #4132; CHECK-NEXT: mov r1, r4133; CHECK-NEXT: bl frexpf134; CHECK-NEXT: vld1.32 {d16[0]}, [r5:32]135; CHECK-NEXT: vld1.32 {d16[1]}, [r4:32]136; CHECK-NEXT: vmov r0, r1, d16137; CHECK-NEXT: add sp, #8138; CHECK-NEXT: pop {r4, r5, r7, pc}139 %result = call { <2 x half>, <2 x i32> } @llvm.frexp.v2f16.v2i32(<2 x half> %a)140 %result.1 = extractvalue { <2 x half>, <2 x i32> } %result, 1141 ret <2 x i32> %result.1142}143 144define { <3 x float>, <3 x i32> } @test_frexp_v3f32_v3i32(<3 x float> %a) {145; CHECK-LABEL: test_frexp_v3f32_v3i32:146; CHECK: @ %bb.0:147; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, lr}148; CHECK-NEXT: vpush {d8, d9}149; CHECK-NEXT: sub sp, #8150; CHECK-NEXT: mov r8, sp151; CHECK-NEXT: vldr d9, [sp, #48]152; CHECK-NEXT: mov r4, r0153; CHECK-NEXT: mov r0, r2154; CHECK-NEXT: mov r1, r8155; CHECK-NEXT: mov r5, r3156; CHECK-NEXT: vmov d8, r2, r3157; CHECK-NEXT: bl frexpf158; CHECK-NEXT: add r6, sp, #4159; CHECK-NEXT: mov r7, r0160; CHECK-NEXT: mov r0, r5161; CHECK-NEXT: mov r1, r6162; CHECK-NEXT: bl frexpf163; CHECK-NEXT: mov r5, r0164; CHECK-NEXT: vmov r0, s18165; CHECK-NEXT: vld1.32 {d16[0]}, [r8:32]166; CHECK-NEXT: add.w r1, r4, #16167; CHECK-NEXT: vld1.32 {d16[1]}, [r6:32]168; CHECK-NEXT: vst1.32 {d16}, [r1:64]!169; CHECK-NEXT: bl frexpf170; CHECK-NEXT: vmov s1, r5171; CHECK-NEXT: vmov s0, r7172; CHECK-NEXT: vst1.32 {d0}, [r4:64]!173; CHECK-NEXT: str r0, [r4]174; CHECK-NEXT: add sp, #8175; CHECK-NEXT: vpop {d8, d9}176; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, pc}177 %result = call { <3 x float>, <3 x i32> } @llvm.frexp.v3f32.v3i32(<3 x float> %a)178 ret { <3 x float>, <3 x i32> } %result179}180 181define { float, i32 } @test_frexp_f32_i32(float %a) {182; CHECK-LABEL: test_frexp_f32_i32:183; CHECK: @ %bb.0:184; CHECK-NEXT: push {r7, lr}185; CHECK-NEXT: sub sp, #8186; CHECK-NEXT: add r1, sp, #4187; CHECK-NEXT: bl frexpf188; CHECK-NEXT: ldr r1, [sp, #4]189; CHECK-NEXT: add sp, #8190; CHECK-NEXT: pop {r7, pc}191 %result = call { float, i32 } @llvm.frexp.f32.i32(float %a)192 ret { float, i32 } %result193}194 195define { float, i32 } @test_frexp_f32_i32_tailcall(float %a) {196; CHECK-LABEL: test_frexp_f32_i32_tailcall:197; CHECK: @ %bb.0:198; CHECK-NEXT: push {r7, lr}199; CHECK-NEXT: sub sp, #8200; CHECK-NEXT: add r1, sp, #4201; CHECK-NEXT: bl frexpf202; CHECK-NEXT: ldr r1, [sp, #4]203; CHECK-NEXT: add sp, #8204; CHECK-NEXT: pop {r7, pc}205 %result = tail call { float, i32 } @llvm.frexp.f32.i32(float %a)206 ret { float, i32 } %result207}208 209define float @test_frexp_f32_i32_only_use_fract(float %a) {210; CHECK-LABEL: test_frexp_f32_i32_only_use_fract:211; CHECK: @ %bb.0:212; CHECK-NEXT: push {r7, lr}213; CHECK-NEXT: sub sp, #8214; CHECK-NEXT: add r1, sp, #4215; CHECK-NEXT: bl frexpf216; CHECK-NEXT: add sp, #8217; CHECK-NEXT: pop {r7, pc}218 %result = call { float, i32 } @llvm.frexp.f32.i32(float %a)219 %result.0 = extractvalue { float, i32 } %result, 0220 ret float %result.0221}222 223define i32 @test_frexp_f32_i32_only_use_exp(float %a) {224; CHECK-LABEL: test_frexp_f32_i32_only_use_exp:225; CHECK: @ %bb.0:226; CHECK-NEXT: push {r7, lr}227; CHECK-NEXT: sub sp, #8228; CHECK-NEXT: add r1, sp, #4229; CHECK-NEXT: bl frexpf230; CHECK-NEXT: ldr r0, [sp, #4]231; CHECK-NEXT: add sp, #8232; CHECK-NEXT: pop {r7, pc}233 %result = call { float, i32 } @llvm.frexp.f32.i32(float %a)234 %result.0 = extractvalue { float, i32 } %result, 1235 ret i32 %result.0236}237 238define { <2 x float>, <2 x i32> } @test_frexp_v2f32_v2i32(<2 x float> %a) {239; CHECK-LABEL: test_frexp_v2f32_v2i32:240; CHECK: @ %bb.0:241; CHECK-NEXT: push {r4, r5, r7, lr}242; CHECK-NEXT: vpush {d8}243; CHECK-NEXT: sub sp, #8244; CHECK-NEXT: vmov d8, r0, r1245; CHECK-NEXT: add r4, sp, #4246; CHECK-NEXT: vmov r0, s16247; CHECK-NEXT: mov r1, r4248; CHECK-NEXT: bl frexpf249; CHECK-NEXT: mov r5, r0250; CHECK-NEXT: vmov r0, s17251; CHECK-NEXT: vld1.32 {d8[0]}, [r4:32]252; CHECK-NEXT: mov r4, sp253; CHECK-NEXT: mov r1, r4254; CHECK-NEXT: bl frexpf255; CHECK-NEXT: vld1.32 {d8[1]}, [r4:32]256; CHECK-NEXT: mov r1, r0257; CHECK-NEXT: mov r0, r5258; CHECK-NEXT: vmov r2, r3, d8259; CHECK-NEXT: add sp, #8260; CHECK-NEXT: vpop {d8}261; CHECK-NEXT: pop {r4, r5, r7, pc}262 %result = call { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float> %a)263 ret { <2 x float>, <2 x i32> } %result264}265 266define <2 x float> @test_frexp_v2f32_v2i32_only_use_fract(<2 x float> %a) {267; CHECK-LABEL: test_frexp_v2f32_v2i32_only_use_fract:268; CHECK: @ %bb.0:269; CHECK-NEXT: push {r4, lr}270; CHECK-NEXT: vpush {d8}271; CHECK-NEXT: sub sp, #8272; CHECK-NEXT: vmov d8, r0, r1273; CHECK-NEXT: mov r1, sp274; CHECK-NEXT: vmov r0, s17275; CHECK-NEXT: bl frexpf276; CHECK-NEXT: mov r4, r0277; CHECK-NEXT: vmov r0, s16278; CHECK-NEXT: add r1, sp, #4279; CHECK-NEXT: bl frexpf280; CHECK-NEXT: mov r1, r4281; CHECK-NEXT: add sp, #8282; CHECK-NEXT: vpop {d8}283; CHECK-NEXT: pop {r4, pc}284 %result = call { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float> %a)285 %result.0 = extractvalue { <2 x float>, <2 x i32> } %result, 0286 ret <2 x float> %result.0287}288 289define <2 x i32> @test_frexp_v2f32_v2i32_only_use_exp(<2 x float> %a) {290; CHECK-LABEL: test_frexp_v2f32_v2i32_only_use_exp:291; CHECK: @ %bb.0:292; CHECK-NEXT: push {r4, r5, r7, lr}293; CHECK-NEXT: vpush {d8}294; CHECK-NEXT: sub sp, #8295; CHECK-NEXT: vmov d8, r0, r1296; CHECK-NEXT: add r4, sp, #4297; CHECK-NEXT: vmov r0, s16298; CHECK-NEXT: mov r1, r4299; CHECK-NEXT: bl frexpf300; CHECK-NEXT: vmov r0, s17301; CHECK-NEXT: mov r5, sp302; CHECK-NEXT: mov r1, r5303; CHECK-NEXT: bl frexpf304; CHECK-NEXT: vld1.32 {d16[0]}, [r4:32]305; CHECK-NEXT: vld1.32 {d16[1]}, [r5:32]306; CHECK-NEXT: vmov r0, r1, d16307; CHECK-NEXT: add sp, #8308; CHECK-NEXT: vpop {d8}309; CHECK-NEXT: pop {r4, r5, r7, pc}310 %result = call { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float> %a)311 %result.1 = extractvalue { <2 x float>, <2 x i32> } %result, 1312 ret <2 x i32> %result.1313}314 315define { <4 x float>, <4 x i32> } @test_frexp_v4f32_v4i32(<4 x float> %a) {316; CHECK-LABEL: test_frexp_v4f32_v4i32:317; CHECK: @ %bb.0:318; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9, lr}319; CHECK-NEXT: sub sp, #4320; CHECK-NEXT: vpush {d8, d9, d10, d11}321; CHECK-NEXT: sub sp, #16322; CHECK-NEXT: add.w r8, sp, #12323; CHECK-NEXT: mov r4, r0324; CHECK-NEXT: mov r0, r2325; CHECK-NEXT: mov r5, r3326; CHECK-NEXT: mov r1, r8327; CHECK-NEXT: bl frexpf328; CHECK-NEXT: add r6, sp, #8329; CHECK-NEXT: mov r9, r0330; CHECK-NEXT: mov r0, r5331; CHECK-NEXT: mov r1, r6332; CHECK-NEXT: bl frexpf333; CHECK-NEXT: vldr d16, [sp, #80]334; CHECK-NEXT: mov r5, r0335; CHECK-NEXT: vld1.32 {d8[0]}, [r8:32]336; CHECK-NEXT: add.w r8, sp, #4337; CHECK-NEXT: vmov r0, r7, d16338; CHECK-NEXT: mov r1, r8339; CHECK-NEXT: vld1.32 {d8[1]}, [r6:32]340; CHECK-NEXT: bl frexpf341; CHECK-NEXT: vld1.32 {d9[0]}, [r8:32]342; CHECK-NEXT: vmov s21, r5343; CHECK-NEXT: mov r5, sp344; CHECK-NEXT: mov r6, r0345; CHECK-NEXT: mov r0, r7346; CHECK-NEXT: mov r1, r5347; CHECK-NEXT: vmov s20, r9348; CHECK-NEXT: bl frexpf349; CHECK-NEXT: vmov s23, r0350; CHECK-NEXT: vld1.32 {d9[1]}, [r5:32]351; CHECK-NEXT: vmov s22, r6352; CHECK-NEXT: vst1.32 {d10, d11}, [r4]!353; CHECK-NEXT: vst1.64 {d8, d9}, [r4]354; CHECK-NEXT: add sp, #16355; CHECK-NEXT: vpop {d8, d9, d10, d11}356; CHECK-NEXT: add sp, #4357; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, pc}358 %result = call { <4 x float>, <4 x i32> } @llvm.frexp.v4f32.v4i32(<4 x float> %a)359 ret { <4 x float>, <4 x i32> } %result360}361 362define <4 x float> @test_frexp_v4f32_v4i32_only_use_fract(<4 x float> %a) {363; CHECK-LABEL: test_frexp_v4f32_v4i32_only_use_fract:364; CHECK: @ %bb.0:365; CHECK-NEXT: push {r4, r5, r6, r7, lr}366; CHECK-NEXT: sub sp, #20367; CHECK-NEXT: mov r6, r1368; CHECK-NEXT: add r1, sp, #4369; CHECK-NEXT: mov r7, r0370; CHECK-NEXT: mov r0, r3371; CHECK-NEXT: mov r5, r2372; CHECK-NEXT: bl frexpf373; CHECK-NEXT: add r1, sp, #8374; CHECK-NEXT: mov r4, r0375; CHECK-NEXT: mov r0, r5376; CHECK-NEXT: bl frexpf377; CHECK-NEXT: add r1, sp, #12378; CHECK-NEXT: mov r5, r0379; CHECK-NEXT: mov r0, r6380; CHECK-NEXT: bl frexpf381; CHECK-NEXT: add r1, sp, #16382; CHECK-NEXT: mov r6, r0383; CHECK-NEXT: mov r0, r7384; CHECK-NEXT: bl frexpf385; CHECK-NEXT: mov r1, r6386; CHECK-NEXT: mov r2, r5387; CHECK-NEXT: mov r3, r4388; CHECK-NEXT: add sp, #20389; CHECK-NEXT: pop {r4, r5, r6, r7, pc}390 %result = call { <4 x float>, <4 x i32> } @llvm.frexp.v4f32.v4i32(<4 x float> %a)391 %result.0 = extractvalue { <4 x float>, <4 x i32> } %result, 0392 ret <4 x float> %result.0393}394 395define <4 x i32> @test_frexp_v4f32_v4i32_only_use_exp(<4 x float> %a) {396; CHECK-LABEL: test_frexp_v4f32_v4i32_only_use_exp:397; CHECK: @ %bb.0:398; CHECK-NEXT: push {r4, r5, r6, lr}399; CHECK-NEXT: sub sp, #16400; CHECK-NEXT: mov r6, r1401; CHECK-NEXT: add r1, sp, #12402; CHECK-NEXT: mov r4, r3403; CHECK-NEXT: mov r5, r2404; CHECK-NEXT: bl frexpf405; CHECK-NEXT: add r1, sp, #8406; CHECK-NEXT: mov r0, r6407; CHECK-NEXT: bl frexpf408; CHECK-NEXT: add r1, sp, #4409; CHECK-NEXT: mov r0, r5410; CHECK-NEXT: bl frexpf411; CHECK-NEXT: mov r1, sp412; CHECK-NEXT: mov r0, r4413; CHECK-NEXT: bl frexpf414; CHECK-NEXT: ldrd r1, r0, [sp, #8]415; CHECK-NEXT: ldrd r3, r2, [sp], #16416; CHECK-NEXT: pop {r4, r5, r6, pc}417 %result = call { <4 x float>, <4 x i32> } @llvm.frexp.v4f32.v4i32(<4 x float> %a)418 %result.1 = extractvalue { <4 x float>, <4 x i32> } %result, 1419 ret <4 x i32> %result.1420}421 422define { double, i32 } @test_frexp_f64_i32(double %a) {423; CHECK-LABEL: test_frexp_f64_i32:424; CHECK: @ %bb.0:425; CHECK-NEXT: push {r7, lr}426; CHECK-NEXT: sub sp, #8427; CHECK-NEXT: add r2, sp, #4428; CHECK-NEXT: bl frexp429; CHECK-NEXT: ldr r2, [sp, #4]430; CHECK-NEXT: add sp, #8431; CHECK-NEXT: pop {r7, pc}432 %result = call { double, i32 } @llvm.frexp.f64.i32(double %a)433 ret { double, i32 } %result434}435 436define double @test_frexp_f64_i32_only_use_fract(double %a) {437; CHECK-LABEL: test_frexp_f64_i32_only_use_fract:438; CHECK: @ %bb.0:439; CHECK-NEXT: push {r7, lr}440; CHECK-NEXT: sub sp, #8441; CHECK-NEXT: add r2, sp, #4442; CHECK-NEXT: bl frexp443; CHECK-NEXT: add sp, #8444; CHECK-NEXT: pop {r7, pc}445 %result = call { double, i32 } @llvm.frexp.f64.i32(double %a)446 %result.0 = extractvalue { double, i32 } %result, 0447 ret double %result.0448}449 450define i32 @test_frexp_f64_i32_only_use_exp(double %a) {451; CHECK-LABEL: test_frexp_f64_i32_only_use_exp:452; CHECK: @ %bb.0:453; CHECK-NEXT: push {r7, lr}454; CHECK-NEXT: sub sp, #8455; CHECK-NEXT: add r2, sp, #4456; CHECK-NEXT: bl frexp457; CHECK-NEXT: ldr r0, [sp, #4]458; CHECK-NEXT: add sp, #8459; CHECK-NEXT: pop {r7, pc}460 %result = call { double, i32 } @llvm.frexp.f64.i32(double %a)461 %result.0 = extractvalue { double, i32 } %result, 1462 ret i32 %result.0463}464 465define { <2 x double>, <2 x i32> } @test_frexp_v2f64_v2i32(<2 x double> %a) {466; CHECK-LABEL: test_frexp_v2f64_v2i32:467; CHECK: @ %bb.0:468; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, lr}469; CHECK-NEXT: sub sp, #8470; CHECK-NEXT: add.w r8, sp, #4471; CHECK-NEXT: mov r4, r0472; CHECK-NEXT: mov r0, r2473; CHECK-NEXT: mov r1, r3474; CHECK-NEXT: mov r2, r8475; CHECK-NEXT: bl frexp476; CHECK-NEXT: mov r6, r0477; CHECK-NEXT: mov r7, r1478; CHECK-NEXT: ldrd r0, r1, [sp, #32]479; CHECK-NEXT: mov r5, sp480; CHECK-NEXT: mov r2, r5481; CHECK-NEXT: bl frexp482; CHECK-NEXT: vld1.32 {d16[0]}, [r8:32]483; CHECK-NEXT: vmov d18, r6, r7484; CHECK-NEXT: vmov d19, r0, r1485; CHECK-NEXT: vld1.32 {d16[1]}, [r5:32]486; CHECK-NEXT: vst1.64 {d18, d19}, [r4]!487; CHECK-NEXT: vstr d16, [r4]488; CHECK-NEXT: add sp, #8489; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, pc}490 %result = call { <2 x double>, <2 x i32> } @llvm.frexp.v2f64.v2i32(<2 x double> %a)491 ret { <2 x double>, <2 x i32> } %result492}493 494define <2 x double> @test_frexp_v2f64_v2i32_only_use_fract(<2 x double> %a) {495; CHECK-LABEL: test_frexp_v2f64_v2i32_only_use_fract:496; CHECK: @ %bb.0:497; CHECK-NEXT: push {r4, r5, r6, r7, lr}498; CHECK-NEXT: sub sp, #12499; CHECK-NEXT: mov r5, r2500; CHECK-NEXT: add r2, sp, #4501; CHECK-NEXT: mov r4, r3502; CHECK-NEXT: bl frexp503; CHECK-NEXT: add r2, sp, #8504; CHECK-NEXT: mov r6, r0505; CHECK-NEXT: mov r7, r1506; CHECK-NEXT: mov r0, r5507; CHECK-NEXT: mov r1, r4508; CHECK-NEXT: bl frexp509; CHECK-NEXT: mov r2, r0510; CHECK-NEXT: mov r3, r1511; CHECK-NEXT: mov r0, r6512; CHECK-NEXT: mov r1, r7513; CHECK-NEXT: add sp, #12514; CHECK-NEXT: pop {r4, r5, r6, r7, pc}515 %result = call { <2 x double>, <2 x i32> } @llvm.frexp.v2f64.v2i32(<2 x double> %a)516 %result.0 = extractvalue { <2 x double>, <2 x i32> } %result, 0517 ret <2 x double> %result.0518}519 520define <2 x i32> @test_frexp_v2f64_v2i32_only_use_exp(<2 x double> %a) {521; CHECK-LABEL: test_frexp_v2f64_v2i32_only_use_exp:522; CHECK: @ %bb.0:523; CHECK-NEXT: push {r4, r5, r6, r7, lr}524; CHECK-NEXT: sub sp, #12525; CHECK-NEXT: add r6, sp, #4526; CHECK-NEXT: mov r5, r2527; CHECK-NEXT: mov r4, r3528; CHECK-NEXT: mov r2, r6529; CHECK-NEXT: bl frexp530; CHECK-NEXT: add r7, sp, #8531; CHECK-NEXT: mov r0, r5532; CHECK-NEXT: mov r1, r4533; CHECK-NEXT: mov r2, r7534; CHECK-NEXT: bl frexp535; CHECK-NEXT: vld1.32 {d16[0]}, [r6:32]536; CHECK-NEXT: vld1.32 {d16[1]}, [r7:32]537; CHECK-NEXT: vmov r0, r1, d16538; CHECK-NEXT: add sp, #12539; CHECK-NEXT: pop {r4, r5, r6, r7, pc}540 %result = call { <2 x double>, <2 x i32> } @llvm.frexp.v2f64.v2i32(<2 x double> %a)541 %result.1 = extractvalue { <2 x double>, <2 x i32> } %result, 1542 ret <2 x i32> %result.1543}544 545define { fp128, i32 } @test_frexp_f128_i32(fp128 %a) nounwind {546; CHECK-LABEL: test_frexp_f128_i32:547; CHECK: @ %bb.0:548; CHECK-NEXT: push {r4, lr}549; CHECK-NEXT: sub sp, #8550; CHECK-NEXT: mov r12, r3551; CHECK-NEXT: ldr r3, [sp, #16]552; CHECK-NEXT: mov r4, r0553; CHECK-NEXT: add r0, sp, #4554; CHECK-NEXT: str r0, [sp]555; CHECK-NEXT: mov r0, r1556; CHECK-NEXT: mov r1, r2557; CHECK-NEXT: mov r2, r12558; CHECK-NEXT: bl frexpl559; CHECK-NEXT: ldr.w r12, [sp, #4]560; CHECK-NEXT: stm.w r4, {r0, r1, r2, r3, r12}561; CHECK-NEXT: add sp, #8562; CHECK-NEXT: pop {r4, pc}563 %result = call { fp128, i32 } @llvm.frexp.f128.i32(fp128 %a)564 ret { fp128, i32 } %result565}566 567define fp128 @test_frexp_f128_i32_only_use_fract(fp128 %a) nounwind {568; CHECK-LABEL: test_frexp_f128_i32_only_use_fract:569; CHECK: @ %bb.0:570; CHECK-NEXT: push {r7, lr}571; CHECK-NEXT: sub sp, #8572; CHECK-NEXT: add.w r12, sp, #4573; CHECK-NEXT: str.w r12, [sp]574; CHECK-NEXT: bl frexpl575; CHECK-NEXT: add sp, #8576; CHECK-NEXT: pop {r7, pc}577 %result = call { fp128, i32 } @llvm.frexp.f128.i32(fp128 %a)578 %result.0 = extractvalue { fp128, i32 } %result, 0579 ret fp128 %result.0580}581 582define i32 @test_frexp_f128_i32_only_use_exp(fp128 %a) nounwind {583; CHECK-LABEL: test_frexp_f128_i32_only_use_exp:584; CHECK: @ %bb.0:585; CHECK-NEXT: push {r7, lr}586; CHECK-NEXT: sub sp, #8587; CHECK-NEXT: add.w r12, sp, #4588; CHECK-NEXT: str.w r12, [sp]589; CHECK-NEXT: bl frexpl590; CHECK-NEXT: ldr r0, [sp, #4]591; CHECK-NEXT: add sp, #8592; CHECK-NEXT: pop {r7, pc}593 %result = call { fp128, i32 } @llvm.frexp.f128.i32(fp128 %a)594 %result.0 = extractvalue { fp128, i32 } %result, 1595 ret i32 %result.0596}597 598declare { float, i32 } @llvm.frexp.f32.i32(float) #0599declare { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float>) #0600declare { <4 x float>, <4 x i32> } @llvm.frexp.v4f32.v4i32(<4 x float>) #0601 602declare { half, i32 } @llvm.frexp.f16.i32(half) #0603declare { <2 x half>, <2 x i32> } @llvm.frexp.v2f16.v2i32(<2 x half>) #0604 605declare { double, i32 } @llvm.frexp.f64.i32(double) #0606declare { <2 x double>, <2 x i32> } @llvm.frexp.v2f64.v2i32(<2 x double>) #0607 608declare { half, i16 } @llvm.frexp.f16.i16(half) #0609declare { <2 x half>, <2 x i16> } @llvm.frexp.v2f16.v2i16(<2 x half>) #0610 611attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }612