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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 62; RUN: llc -mtriple=thumbv7-apple-ios7.0.0 < %s | FileCheck %s3 4define { half, half } @test_sincospi_f16(half %a) #0 {5; CHECK-LABEL: test_sincospi_f16:6; CHECK: @ %bb.0:7; CHECK-NEXT: push {r4, lr}8; CHECK-NEXT: sub sp, #89; CHECK-NEXT: bl ___extendhfsf210; CHECK-NEXT: add r1, sp, #411; CHECK-NEXT: mov r2, sp12; CHECK-NEXT: bl ___sincospif13; CHECK-NEXT: ldr r0, [sp, #4]14; CHECK-NEXT: bl ___truncsfhf215; CHECK-NEXT: mov r4, r016; CHECK-NEXT: ldr r0, [sp]17; CHECK-NEXT: bl ___truncsfhf218; CHECK-NEXT: mov r1, r019; CHECK-NEXT: mov r0, r420; CHECK-NEXT: add sp, #821; CHECK-NEXT: pop {r4, pc}22 %result = call { half, half } @llvm.sincospi.f16(half %a)23 ret { half, half } %result24}25 26define half @test_sincospi_f16_only_use_sin(half %a) #0 {27; CHECK-LABEL: test_sincospi_f16_only_use_sin:28; CHECK: @ %bb.0:29; CHECK-NEXT: str lr, [sp, #-4]!30; CHECK-NEXT: sub sp, #831; CHECK-NEXT: bl ___extendhfsf232; CHECK-NEXT: add r1, sp, #433; CHECK-NEXT: mov r2, sp34; CHECK-NEXT: bl ___sincospif35; CHECK-NEXT: ldr r0, [sp, #4]36; CHECK-NEXT: bl ___truncsfhf237; CHECK-NEXT: add sp, #838; CHECK-NEXT: ldr lr, [sp], #439; CHECK-NEXT: bx lr40 %result = call { half, half } @llvm.sincospi.f16(half %a)41 %result.0 = extractvalue { half, half } %result, 042 ret half %result.043}44 45define half @test_sincospi_f16_only_use_cos(half %a) #0 {46; CHECK-LABEL: test_sincospi_f16_only_use_cos:47; CHECK: @ %bb.0:48; CHECK-NEXT: str lr, [sp, #-4]!49; CHECK-NEXT: sub sp, #850; CHECK-NEXT: bl ___extendhfsf251; CHECK-NEXT: add r1, sp, #452; CHECK-NEXT: mov r2, sp53; CHECK-NEXT: bl ___sincospif54; CHECK-NEXT: ldr r0, [sp]55; CHECK-NEXT: bl ___truncsfhf256; CHECK-NEXT: add sp, #857; CHECK-NEXT: ldr lr, [sp], #458; CHECK-NEXT: bx lr59 %result = call { half, half } @llvm.sincospi.f16(half %a)60 %result.1 = extractvalue { half, half } %result, 161 ret half %result.162}63 64define { <2 x half>, <2 x half> } @test_sincospi_v2f16(<2 x half> %a) #0 {65; CHECK-LABEL: test_sincospi_v2f16:66; CHECK: @ %bb.0:67; CHECK-NEXT: push {r4, lr}68; CHECK-NEXT: vpush {d8}69; CHECK-NEXT: sub sp, #2470; CHECK-NEXT: mov r4, r071; CHECK-NEXT: mov r0, r172; CHECK-NEXT: bl ___extendhfsf273; CHECK-NEXT: add r1, sp, #1274; CHECK-NEXT: add r2, sp, #875; CHECK-NEXT: bl ___sincospif76; CHECK-NEXT: mov r0, r477; CHECK-NEXT: bl ___extendhfsf278; CHECK-NEXT: add r1, sp, #479; CHECK-NEXT: mov r2, sp80; CHECK-NEXT: bl ___sincospif81; CHECK-NEXT: ldr r0, [sp, #12]82; CHECK-NEXT: bl ___truncsfhf283; CHECK-NEXT: ldr r1, [sp, #4]84; CHECK-NEXT: strh.w r0, [sp, #22]85; CHECK-NEXT: mov r0, r186; CHECK-NEXT: bl ___truncsfhf287; CHECK-NEXT: strh.w r0, [sp, #20]88; CHECK-NEXT: add r0, sp, #2089; CHECK-NEXT: vld1.32 {d8[0]}, [r0:32]90; CHECK-NEXT: ldr r0, [sp, #8]91; CHECK-NEXT: bl ___truncsfhf292; CHECK-NEXT: ldr r1, [sp]93; CHECK-NEXT: strh.w r0, [sp, #18]94; CHECK-NEXT: mov r0, r195; CHECK-NEXT: bl ___truncsfhf296; CHECK-NEXT: strh.w r0, [sp, #16]97; CHECK-NEXT: add r0, sp, #1698; CHECK-NEXT: vmovl.u16 q9, d899; CHECK-NEXT: vld1.32 {d16[0]}, [r0:32]100; CHECK-NEXT: vmovl.u16 q8, d16101; CHECK-NEXT: vmov.32 r0, d18[0]102; CHECK-NEXT: vmov.32 r1, d18[1]103; CHECK-NEXT: vmov.32 r2, d16[0]104; CHECK-NEXT: vmov.32 r3, d16[1]105; CHECK-NEXT: add sp, #24106; CHECK-NEXT: vpop {d8}107; CHECK-NEXT: pop {r4, pc}108 %result = call { <2 x half>, <2 x half> } @llvm.sincospi.v2f16(<2 x half> %a)109 ret { <2 x half>, <2 x half> } %result110}111 112define { float, float } @test_sincospi_f32(float %a) #0 {113; CHECK-LABEL: test_sincospi_f32:114; CHECK: @ %bb.0:115; CHECK-NEXT: str lr, [sp, #-4]!116; CHECK-NEXT: sub sp, #8117; CHECK-NEXT: add r1, sp, #4118; CHECK-NEXT: mov r2, sp119; CHECK-NEXT: bl ___sincospif120; CHECK-NEXT: ldrd r1, r0, [sp], #8121; CHECK-NEXT: ldr lr, [sp], #4122; CHECK-NEXT: bx lr123 %result = call { float, float } @llvm.sincospi.f32(float %a)124 ret { float, float } %result125}126 127define { <2 x float>, <2 x float> } @test_sincospi_v2f32(<2 x float> %a) #0 {128; CHECK-LABEL: test_sincospi_v2f32:129; CHECK: @ %bb.0:130; CHECK-NEXT: str lr, [sp, #-4]!131; CHECK-NEXT: vpush {d8}132; CHECK-NEXT: sub sp, #16133; CHECK-NEXT: vmov d8, r0, r1134; CHECK-NEXT: add r1, sp, #4135; CHECK-NEXT: mov r2, sp136; CHECK-NEXT: vmov r0, s17137; CHECK-NEXT: bl ___sincospif138; CHECK-NEXT: vmov r0, s16139; CHECK-NEXT: add r1, sp, #12140; CHECK-NEXT: add r2, sp, #8141; CHECK-NEXT: bl ___sincospif142; CHECK-NEXT: vldr s1, [sp, #4]143; CHECK-NEXT: vldr s3, [sp]144; CHECK-NEXT: vldr s0, [sp, #12]145; CHECK-NEXT: vldr s2, [sp, #8]146; CHECK-NEXT: vmov r0, r1, d0147; CHECK-NEXT: vmov r2, r3, d1148; CHECK-NEXT: add sp, #16149; CHECK-NEXT: vpop {d8}150; CHECK-NEXT: ldr lr, [sp], #4151; CHECK-NEXT: bx lr152 %result = call { <2 x float>, <2 x float> } @llvm.sincospi.v2f32(<2 x float> %a)153 ret { <2 x float>, <2 x float> } %result154}155 156define { <3 x float>, <3 x float> } @test_sincospi_v3f32(<3 x float> %a) #0 {157; CHECK-LABEL: test_sincospi_v3f32:158; CHECK: @ %bb.0:159; CHECK-NEXT: push {r4, r5, r6, r7, lr}160; CHECK-NEXT: sub sp, #16161; CHECK-NEXT: mov r6, r2162; CHECK-NEXT: mov r7, r1163; CHECK-NEXT: add r1, sp, #12164; CHECK-NEXT: add r2, sp, #8165; CHECK-NEXT: mov r4, r0166; CHECK-NEXT: mov r0, r6167; CHECK-NEXT: mov r5, r3168; CHECK-NEXT: bl ___sincospif169; CHECK-NEXT: add r1, sp, #4170; CHECK-NEXT: mov r2, sp171; CHECK-NEXT: mov r0, r7172; CHECK-NEXT: bl ___sincospif173; CHECK-NEXT: ldr r0, [sp, #36]174; CHECK-NEXT: vmov d0, r7, r6175; CHECK-NEXT: mov r1, r4176; CHECK-NEXT: add.w r2, r4, #16177; CHECK-NEXT: vmov d1, r5, r0178; CHECK-NEXT: vmov r0, s2179; CHECK-NEXT: vldr s1, [sp, #8]180; CHECK-NEXT: vldr s3, [sp, #12]181; CHECK-NEXT: vldr s2, [sp, #4]182; CHECK-NEXT: vldr s0, [sp]183; CHECK-NEXT: vst1.32 {d1}, [r1:64]!184; CHECK-NEXT: vst1.32 {d0}, [r2:64]!185; CHECK-NEXT: bl ___sincospif186; CHECK-NEXT: add sp, #16187; CHECK-NEXT: pop {r4, r5, r6, r7, pc}188 %result = call { <3 x float>, <3 x float> } @llvm.sincospi.v3f32(<3 x float> %a)189 ret { <3 x float>, <3 x float> } %result190}191 192define { double, double } @test_sincospi_f64(double %a) #0 {193; CHECK-LABEL: test_sincospi_f64:194; CHECK: @ %bb.0:195; CHECK-NEXT: push {r4, r7, lr}196; CHECK-NEXT: add r7, sp, #4197; CHECK-NEXT: sub sp, #20198; CHECK-NEXT: mov r4, sp199; CHECK-NEXT: bfc r4, #0, #3200; CHECK-NEXT: mov sp, r4201; CHECK-NEXT: add r2, sp, #8202; CHECK-NEXT: mov r3, sp203; CHECK-NEXT: bl ___sincospi204; CHECK-NEXT: subs r4, r7, #4205; CHECK-NEXT: ldrd r0, r1, [sp, #8]206; CHECK-NEXT: ldrd r2, r3, [sp]207; CHECK-NEXT: mov sp, r4208; CHECK-NEXT: pop {r4, r7, pc}209 %result = call { double, double } @llvm.sincospi.f64(double %a)210 ret { double, double } %result211}212 213define { <2 x double>, <2 x double> } @test_sincospi_v2f64(<2 x double> %a) #0 {214; CHECK-LABEL: test_sincospi_v2f64:215; CHECK: @ %bb.0:216; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, lr}217; CHECK-NEXT: add r7, sp, #16218; CHECK-NEXT: sub sp, #32219; CHECK-NEXT: mov r4, sp220; CHECK-NEXT: bfc r4, #0, #3221; CHECK-NEXT: mov sp, r4222; CHECK-NEXT: mov r6, r1223; CHECK-NEXT: ldr r1, [r7, #8]224; CHECK-NEXT: mov r5, r3225; CHECK-NEXT: mov r8, r2226; CHECK-NEXT: add r2, sp, #24227; CHECK-NEXT: add r3, sp, #16228; CHECK-NEXT: mov r4, r0229; CHECK-NEXT: mov r0, r5230; CHECK-NEXT: bl ___sincospi231; CHECK-NEXT: add r2, sp, #8232; CHECK-NEXT: mov r3, sp233; CHECK-NEXT: mov r0, r6234; CHECK-NEXT: mov r1, r8235; CHECK-NEXT: bl ___sincospi236; CHECK-NEXT: vldr d19, [sp, #24]237; CHECK-NEXT: vldr d18, [sp, #8]238; CHECK-NEXT: vldr d17, [sp, #16]239; CHECK-NEXT: vldr d16, [sp]240; CHECK-NEXT: vst1.32 {d18, d19}, [r4]!241; CHECK-NEXT: vst1.32 {d16, d17}, [r4]242; CHECK-NEXT: sub.w r4, r7, #16243; CHECK-NEXT: mov sp, r4244; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, pc}245 %result = call { <2 x double>, <2 x double> } @llvm.sincospi.v2f64(<2 x double> %a)246 ret { <2 x double>, <2 x double> } %result247}248 249attributes #0 = { nounwind }250