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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=arm-unknown | FileCheck %s3; RUN: llc < %s -mtriple=armv6-unknown | FileCheck %s --check-prefix=CHECK-ARMv64; RUN: llc < %s -mtriple=thumbv6m-none-eabi | FileCheck %s --check-prefix=CHECK-THUMBv65; RUN: llc < %s -mtriple=thumbv7m-none-eabi | FileCheck %s --check-prefix=CHECK-THUMBv76 7; ptr p; // p is 1 byte aligned8; (i32) p[0] | ((i32) p[1] << 8) | ((i32) p[2] << 16) | ((i32) p[3] << 24)9define i32 @load_i32_by_i8_unaligned(ptr %arg) {10; CHECK-LABEL: load_i32_by_i8_unaligned:11; CHECK: @ %bb.0:12; CHECK-NEXT: ldrb r2, [r0, #1]13; CHECK-NEXT: ldrb r1, [r0]14; CHECK-NEXT: ldrb r3, [r0, #2]15; CHECK-NEXT: ldrb r0, [r0, #3]16; CHECK-NEXT: orr r1, r1, r2, lsl #817; CHECK-NEXT: orr r1, r1, r3, lsl #1618; CHECK-NEXT: orr r0, r1, r0, lsl #2419; CHECK-NEXT: mov pc, lr20;21; CHECK-ARMv6-LABEL: load_i32_by_i8_unaligned:22; CHECK-ARMv6: @ %bb.0:23; CHECK-ARMv6-NEXT: ldrb r2, [r0, #1]24; CHECK-ARMv6-NEXT: ldrb r1, [r0]25; CHECK-ARMv6-NEXT: ldrb r3, [r0, #2]26; CHECK-ARMv6-NEXT: ldrb r0, [r0, #3]27; CHECK-ARMv6-NEXT: orr r1, r1, r2, lsl #828; CHECK-ARMv6-NEXT: orr r1, r1, r3, lsl #1629; CHECK-ARMv6-NEXT: orr r0, r1, r0, lsl #2430; CHECK-ARMv6-NEXT: bx lr31;32; CHECK-THUMBv6-LABEL: load_i32_by_i8_unaligned:33; CHECK-THUMBv6: @ %bb.0:34; CHECK-THUMBv6-NEXT: ldrb r1, [r0]35; CHECK-THUMBv6-NEXT: ldrb r2, [r0, #1]36; CHECK-THUMBv6-NEXT: lsls r2, r2, #837; CHECK-THUMBv6-NEXT: adds r1, r2, r138; CHECK-THUMBv6-NEXT: ldrb r2, [r0, #2]39; CHECK-THUMBv6-NEXT: lsls r2, r2, #1640; CHECK-THUMBv6-NEXT: adds r1, r1, r241; CHECK-THUMBv6-NEXT: ldrb r0, [r0, #3]42; CHECK-THUMBv6-NEXT: lsls r0, r0, #2443; CHECK-THUMBv6-NEXT: adds r0, r1, r044; CHECK-THUMBv6-NEXT: bx lr45;46; CHECK-THUMBv7-LABEL: load_i32_by_i8_unaligned:47; CHECK-THUMBv7: @ %bb.0:48; CHECK-THUMBv7-NEXT: ldr r0, [r0]49; CHECK-THUMBv7-NEXT: bx lr50 51 %tmp2 = load i8, ptr %arg, align 152 %tmp3 = zext i8 %tmp2 to i3253 %tmp4 = getelementptr inbounds i8, ptr %arg, i32 154 %tmp5 = load i8, ptr %tmp4, align 155 %tmp6 = zext i8 %tmp5 to i3256 %tmp7 = shl nuw nsw i32 %tmp6, 857 %tmp8 = or i32 %tmp7, %tmp358 %tmp9 = getelementptr inbounds i8, ptr %arg, i32 259 %tmp10 = load i8, ptr %tmp9, align 160 %tmp11 = zext i8 %tmp10 to i3261 %tmp12 = shl nuw nsw i32 %tmp11, 1662 %tmp13 = or i32 %tmp8, %tmp1263 %tmp14 = getelementptr inbounds i8, ptr %arg, i32 364 %tmp15 = load i8, ptr %tmp14, align 165 %tmp16 = zext i8 %tmp15 to i3266 %tmp17 = shl nuw nsw i32 %tmp16, 2467 %tmp18 = or i32 %tmp13, %tmp1768 ret i32 %tmp1869}70 71; ptr p; // p is 4 byte aligned72; (i32) p[0] | ((i32) p[1] << 8) | ((i32) p[2] << 16) | ((i32) p[3] << 24)73define i32 @load_i32_by_i8_aligned(ptr %arg) {74; CHECK-LABEL: load_i32_by_i8_aligned:75; CHECK: @ %bb.0:76; CHECK-NEXT: ldr r0, [r0]77; CHECK-NEXT: mov pc, lr78;79; CHECK-ARMv6-LABEL: load_i32_by_i8_aligned:80; CHECK-ARMv6: @ %bb.0:81; CHECK-ARMv6-NEXT: ldr r0, [r0]82; CHECK-ARMv6-NEXT: bx lr83;84; CHECK-THUMBv6-LABEL: load_i32_by_i8_aligned:85; CHECK-THUMBv6: @ %bb.0:86; CHECK-THUMBv6-NEXT: ldr r0, [r0]87; CHECK-THUMBv6-NEXT: bx lr88;89; CHECK-THUMBv7-LABEL: load_i32_by_i8_aligned:90; CHECK-THUMBv7: @ %bb.0:91; CHECK-THUMBv7-NEXT: ldr r0, [r0]92; CHECK-THUMBv7-NEXT: bx lr93 94 %tmp2 = load i8, ptr %arg, align 495 %tmp3 = zext i8 %tmp2 to i3296 %tmp4 = getelementptr inbounds i8, ptr %arg, i32 197 %tmp5 = load i8, ptr %tmp4, align 198 %tmp6 = zext i8 %tmp5 to i3299 %tmp7 = shl nuw nsw i32 %tmp6, 8100 %tmp8 = or i32 %tmp7, %tmp3101 %tmp9 = getelementptr inbounds i8, ptr %arg, i32 2102 %tmp10 = load i8, ptr %tmp9, align 1103 %tmp11 = zext i8 %tmp10 to i32104 %tmp12 = shl nuw nsw i32 %tmp11, 16105 %tmp13 = or i32 %tmp8, %tmp12106 %tmp14 = getelementptr inbounds i8, ptr %arg, i32 3107 %tmp15 = load i8, ptr %tmp14, align 1108 %tmp16 = zext i8 %tmp15 to i32109 %tmp17 = shl nuw nsw i32 %tmp16, 24110 %tmp18 = or i32 %tmp13, %tmp17111 ret i32 %tmp18112}113 114; ptr p; // p is 4 byte aligned115; ((i32) p[0] << 24) | ((i32) p[1] << 16) | ((i32) p[2] << 8) | (i32) p[3]116define i32 @load_i32_by_i8_bswap(ptr %arg) {117; BSWAP is not supported by 32 bit target118; CHECK-LABEL: load_i32_by_i8_bswap:119; CHECK: @ %bb.0:120; CHECK-NEXT: mov r1, #255121; CHECK-NEXT: ldr r0, [r0]122; CHECK-NEXT: orr r1, r1, #16711680123; CHECK-NEXT: and r2, r0, r1124; CHECK-NEXT: and r0, r1, r0, ror #24125; CHECK-NEXT: orr r0, r0, r2, ror #8126; CHECK-NEXT: mov pc, lr127;128; CHECK-ARMv6-LABEL: load_i32_by_i8_bswap:129; CHECK-ARMv6: @ %bb.0:130; CHECK-ARMv6-NEXT: ldr r0, [r0]131; CHECK-ARMv6-NEXT: rev r0, r0132; CHECK-ARMv6-NEXT: bx lr133;134; CHECK-THUMBv6-LABEL: load_i32_by_i8_bswap:135; CHECK-THUMBv6: @ %bb.0:136; CHECK-THUMBv6-NEXT: ldr r0, [r0]137; CHECK-THUMBv6-NEXT: rev r0, r0138; CHECK-THUMBv6-NEXT: bx lr139;140; CHECK-THUMBv7-LABEL: load_i32_by_i8_bswap:141; CHECK-THUMBv7: @ %bb.0:142; CHECK-THUMBv7-NEXT: ldr r0, [r0]143; CHECK-THUMBv7-NEXT: rev r0, r0144; CHECK-THUMBv7-NEXT: bx lr145 146 %tmp1 = load i8, ptr %arg, align 4147 %tmp2 = zext i8 %tmp1 to i32148 %tmp3 = shl nuw nsw i32 %tmp2, 24149 %tmp4 = getelementptr inbounds i8, ptr %arg, i32 1150 %tmp5 = load i8, ptr %tmp4, align 1151 %tmp6 = zext i8 %tmp5 to i32152 %tmp7 = shl nuw nsw i32 %tmp6, 16153 %tmp8 = or i32 %tmp7, %tmp3154 %tmp9 = getelementptr inbounds i8, ptr %arg, i32 2155 %tmp10 = load i8, ptr %tmp9, align 1156 %tmp11 = zext i8 %tmp10 to i32157 %tmp12 = shl nuw nsw i32 %tmp11, 8158 %tmp13 = or i32 %tmp8, %tmp12159 %tmp14 = getelementptr inbounds i8, ptr %arg, i32 3160 %tmp15 = load i8, ptr %tmp14, align 1161 %tmp16 = zext i8 %tmp15 to i32162 %tmp17 = or i32 %tmp13, %tmp16163 ret i32 %tmp17164}165 166; ptr p; // p is 8 byte aligned167; (i64) p[0] | ((i64) p[1] << 8) | ((i64) p[2] << 16) | ((i64) p[3] << 24) | ((i64) p[4] << 32) | ((i64) p[5] << 40) | ((i64) p[6] << 48) | ((i64) p[7] << 56)168define i64 @load_i64_by_i8(ptr %arg) {169; CHECK-LABEL: load_i64_by_i8:170; CHECK: @ %bb.0:171; CHECK-NEXT: ldr r2, [r0]172; CHECK-NEXT: ldr r1, [r0, #4]173; CHECK-NEXT: mov r0, r2174; CHECK-NEXT: mov pc, lr175;176; CHECK-ARMv6-LABEL: load_i64_by_i8:177; CHECK-ARMv6: @ %bb.0:178; CHECK-ARMv6-NEXT: ldrd r0, r1, [r0]179; CHECK-ARMv6-NEXT: bx lr180;181; CHECK-THUMBv6-LABEL: load_i64_by_i8:182; CHECK-THUMBv6: @ %bb.0:183; CHECK-THUMBv6-NEXT: ldr r2, [r0]184; CHECK-THUMBv6-NEXT: ldr r1, [r0, #4]185; CHECK-THUMBv6-NEXT: mov r0, r2186; CHECK-THUMBv6-NEXT: bx lr187;188; CHECK-THUMBv7-LABEL: load_i64_by_i8:189; CHECK-THUMBv7: @ %bb.0:190; CHECK-THUMBv7-NEXT: ldrd r0, r1, [r0]191; CHECK-THUMBv7-NEXT: bx lr192 193 %tmp1 = load i8, ptr %arg, align 8194 %tmp2 = zext i8 %tmp1 to i64195 %tmp3 = getelementptr inbounds i8, ptr %arg, i64 1196 %tmp4 = load i8, ptr %tmp3, align 1197 %tmp5 = zext i8 %tmp4 to i64198 %tmp6 = shl nuw nsw i64 %tmp5, 8199 %tmp7 = or i64 %tmp6, %tmp2200 %tmp8 = getelementptr inbounds i8, ptr %arg, i64 2201 %tmp9 = load i8, ptr %tmp8, align 1202 %tmp10 = zext i8 %tmp9 to i64203 %tmp11 = shl nuw nsw i64 %tmp10, 16204 %tmp12 = or i64 %tmp7, %tmp11205 %tmp13 = getelementptr inbounds i8, ptr %arg, i64 3206 %tmp14 = load i8, ptr %tmp13, align 1207 %tmp15 = zext i8 %tmp14 to i64208 %tmp16 = shl nuw nsw i64 %tmp15, 24209 %tmp17 = or i64 %tmp12, %tmp16210 %tmp18 = getelementptr inbounds i8, ptr %arg, i64 4211 %tmp19 = load i8, ptr %tmp18, align 1212 %tmp20 = zext i8 %tmp19 to i64213 %tmp21 = shl nuw nsw i64 %tmp20, 32214 %tmp22 = or i64 %tmp17, %tmp21215 %tmp23 = getelementptr inbounds i8, ptr %arg, i64 5216 %tmp24 = load i8, ptr %tmp23, align 1217 %tmp25 = zext i8 %tmp24 to i64218 %tmp26 = shl nuw nsw i64 %tmp25, 40219 %tmp27 = or i64 %tmp22, %tmp26220 %tmp28 = getelementptr inbounds i8, ptr %arg, i64 6221 %tmp29 = load i8, ptr %tmp28, align 1222 %tmp30 = zext i8 %tmp29 to i64223 %tmp31 = shl nuw nsw i64 %tmp30, 48224 %tmp32 = or i64 %tmp27, %tmp31225 %tmp33 = getelementptr inbounds i8, ptr %arg, i64 7226 %tmp34 = load i8, ptr %tmp33, align 1227 %tmp35 = zext i8 %tmp34 to i64228 %tmp36 = shl nuw i64 %tmp35, 56229 %tmp37 = or i64 %tmp32, %tmp36230 ret i64 %tmp37231}232 233; ptr p; // p is 8 byte aligned234; ((i64) p[0] << 56) | ((i64) p[1] << 48) | ((i64) p[2] << 40) | ((i64) p[3] << 32) | ((i64) p[4] << 24) | ((i64) p[5] << 16) | ((i64) p[6] << 8) | (i64) p[7]235define i64 @load_i64_by_i8_bswap(ptr %arg) {236; CHECK-LABEL: load_i64_by_i8_bswap:237; CHECK: @ %bb.0:238; CHECK-NEXT: mov r2, #255239; CHECK-NEXT: ldr r1, [r0]240; CHECK-NEXT: ldr r0, [r0, #4]241; CHECK-NEXT: orr r2, r2, #16711680242; CHECK-NEXT: and r3, r0, r2243; CHECK-NEXT: and r0, r2, r0, ror #24244; CHECK-NEXT: orr r0, r0, r3, ror #8245; CHECK-NEXT: and r3, r1, r2246; CHECK-NEXT: and r1, r2, r1, ror #24247; CHECK-NEXT: orr r1, r1, r3, ror #8248; CHECK-NEXT: mov pc, lr249;250; CHECK-ARMv6-LABEL: load_i64_by_i8_bswap:251; CHECK-ARMv6: @ %bb.0:252; CHECK-ARMv6-NEXT: ldrd r2, r3, [r0]253; CHECK-ARMv6-NEXT: rev r0, r3254; CHECK-ARMv6-NEXT: rev r1, r2255; CHECK-ARMv6-NEXT: bx lr256;257; CHECK-THUMBv6-LABEL: load_i64_by_i8_bswap:258; CHECK-THUMBv6: @ %bb.0:259; CHECK-THUMBv6-NEXT: ldr r1, [r0]260; CHECK-THUMBv6-NEXT: ldr r0, [r0, #4]261; CHECK-THUMBv6-NEXT: rev r0, r0262; CHECK-THUMBv6-NEXT: rev r1, r1263; CHECK-THUMBv6-NEXT: bx lr264;265; CHECK-THUMBv7-LABEL: load_i64_by_i8_bswap:266; CHECK-THUMBv7: @ %bb.0:267; CHECK-THUMBv7-NEXT: ldrd r1, r0, [r0]268; CHECK-THUMBv7-NEXT: rev r0, r0269; CHECK-THUMBv7-NEXT: rev r1, r1270; CHECK-THUMBv7-NEXT: bx lr271 272 %tmp1 = load i8, ptr %arg, align 8273 %tmp2 = zext i8 %tmp1 to i64274 %tmp3 = shl nuw i64 %tmp2, 56275 %tmp4 = getelementptr inbounds i8, ptr %arg, i64 1276 %tmp5 = load i8, ptr %tmp4, align 1277 %tmp6 = zext i8 %tmp5 to i64278 %tmp7 = shl nuw nsw i64 %tmp6, 48279 %tmp8 = or i64 %tmp7, %tmp3280 %tmp9 = getelementptr inbounds i8, ptr %arg, i64 2281 %tmp10 = load i8, ptr %tmp9, align 1282 %tmp11 = zext i8 %tmp10 to i64283 %tmp12 = shl nuw nsw i64 %tmp11, 40284 %tmp13 = or i64 %tmp8, %tmp12285 %tmp14 = getelementptr inbounds i8, ptr %arg, i64 3286 %tmp15 = load i8, ptr %tmp14, align 1287 %tmp16 = zext i8 %tmp15 to i64288 %tmp17 = shl nuw nsw i64 %tmp16, 32289 %tmp18 = or i64 %tmp13, %tmp17290 %tmp19 = getelementptr inbounds i8, ptr %arg, i64 4291 %tmp20 = load i8, ptr %tmp19, align 1292 %tmp21 = zext i8 %tmp20 to i64293 %tmp22 = shl nuw nsw i64 %tmp21, 24294 %tmp23 = or i64 %tmp18, %tmp22295 %tmp24 = getelementptr inbounds i8, ptr %arg, i64 5296 %tmp25 = load i8, ptr %tmp24, align 1297 %tmp26 = zext i8 %tmp25 to i64298 %tmp27 = shl nuw nsw i64 %tmp26, 16299 %tmp28 = or i64 %tmp23, %tmp27300 %tmp29 = getelementptr inbounds i8, ptr %arg, i64 6301 %tmp30 = load i8, ptr %tmp29, align 1302 %tmp31 = zext i8 %tmp30 to i64303 %tmp32 = shl nuw nsw i64 %tmp31, 8304 %tmp33 = or i64 %tmp28, %tmp32305 %tmp34 = getelementptr inbounds i8, ptr %arg, i64 7306 %tmp35 = load i8, ptr %tmp34, align 1307 %tmp36 = zext i8 %tmp35 to i64308 %tmp37 = or i64 %tmp33, %tmp36309 ret i64 %tmp37310}311 312; ptr p; // p[1] is 4 byte aligned313; (i32) p[1] | ((i32) p[2] << 8) | ((i32) p[3] << 16) | ((i32) p[4] << 24)314define i32 @load_i32_by_i8_nonzero_offset(ptr %arg) {315; CHECK-LABEL: load_i32_by_i8_nonzero_offset:316; CHECK: @ %bb.0:317; CHECK-NEXT: ldr r0, [r0, #1]318; CHECK-NEXT: mov pc, lr319;320; CHECK-ARMv6-LABEL: load_i32_by_i8_nonzero_offset:321; CHECK-ARMv6: @ %bb.0:322; CHECK-ARMv6-NEXT: ldr r0, [r0, #1]323; CHECK-ARMv6-NEXT: bx lr324;325; CHECK-THUMBv6-LABEL: load_i32_by_i8_nonzero_offset:326; CHECK-THUMBv6: @ %bb.0:327; CHECK-THUMBv6-NEXT: movs r1, #1328; CHECK-THUMBv6-NEXT: ldr r0, [r0, r1]329; CHECK-THUMBv6-NEXT: bx lr330;331; CHECK-THUMBv7-LABEL: load_i32_by_i8_nonzero_offset:332; CHECK-THUMBv7: @ %bb.0:333; CHECK-THUMBv7-NEXT: ldr.w r0, [r0, #1]334; CHECK-THUMBv7-NEXT: bx lr335 336 337 %tmp1 = getelementptr inbounds i8, ptr %arg, i32 1338 %tmp2 = load i8, ptr %tmp1, align 4339 %tmp3 = zext i8 %tmp2 to i32340 %tmp4 = getelementptr inbounds i8, ptr %arg, i32 2341 %tmp5 = load i8, ptr %tmp4, align 1342 %tmp6 = zext i8 %tmp5 to i32343 %tmp7 = shl nuw nsw i32 %tmp6, 8344 %tmp8 = or i32 %tmp7, %tmp3345 %tmp9 = getelementptr inbounds i8, ptr %arg, i32 3346 %tmp10 = load i8, ptr %tmp9, align 1347 %tmp11 = zext i8 %tmp10 to i32348 %tmp12 = shl nuw nsw i32 %tmp11, 16349 %tmp13 = or i32 %tmp8, %tmp12350 %tmp14 = getelementptr inbounds i8, ptr %arg, i32 4351 %tmp15 = load i8, ptr %tmp14, align 1352 %tmp16 = zext i8 %tmp15 to i32353 %tmp17 = shl nuw nsw i32 %tmp16, 24354 %tmp18 = or i32 %tmp13, %tmp17355 ret i32 %tmp18356}357 358; ptr p; // p[-4] is 4 byte aligned359; (i32) p[-4] | ((i32) p[-3] << 8) | ((i32) p[-2] << 16) | ((i32) p[-1] << 24)360define i32 @load_i32_by_i8_neg_offset(ptr %arg) {361; CHECK-LABEL: load_i32_by_i8_neg_offset:362; CHECK: @ %bb.0:363; CHECK-NEXT: ldr r0, [r0, #-4]364; CHECK-NEXT: mov pc, lr365;366; CHECK-ARMv6-LABEL: load_i32_by_i8_neg_offset:367; CHECK-ARMv6: @ %bb.0:368; CHECK-ARMv6-NEXT: ldr r0, [r0, #-4]369; CHECK-ARMv6-NEXT: bx lr370;371; CHECK-THUMBv6-LABEL: load_i32_by_i8_neg_offset:372; CHECK-THUMBv6: @ %bb.0:373; CHECK-THUMBv6-NEXT: subs r0, r0, #4374; CHECK-THUMBv6-NEXT: ldr r0, [r0]375; CHECK-THUMBv6-NEXT: bx lr376;377; CHECK-THUMBv7-LABEL: load_i32_by_i8_neg_offset:378; CHECK-THUMBv7: @ %bb.0:379; CHECK-THUMBv7-NEXT: ldr r0, [r0, #-4]380; CHECK-THUMBv7-NEXT: bx lr381 382 383 %tmp1 = getelementptr inbounds i8, ptr %arg, i32 -4384 %tmp2 = load i8, ptr %tmp1, align 4385 %tmp3 = zext i8 %tmp2 to i32386 %tmp4 = getelementptr inbounds i8, ptr %arg, i32 -3387 %tmp5 = load i8, ptr %tmp4, align 1388 %tmp6 = zext i8 %tmp5 to i32389 %tmp7 = shl nuw nsw i32 %tmp6, 8390 %tmp8 = or i32 %tmp7, %tmp3391 %tmp9 = getelementptr inbounds i8, ptr %arg, i32 -2392 %tmp10 = load i8, ptr %tmp9, align 1393 %tmp11 = zext i8 %tmp10 to i32394 %tmp12 = shl nuw nsw i32 %tmp11, 16395 %tmp13 = or i32 %tmp8, %tmp12396 %tmp14 = getelementptr inbounds i8, ptr %arg, i32 -1397 %tmp15 = load i8, ptr %tmp14, align 1398 %tmp16 = zext i8 %tmp15 to i32399 %tmp17 = shl nuw nsw i32 %tmp16, 24400 %tmp18 = or i32 %tmp13, %tmp17401 ret i32 %tmp18402}403 404; ptr p; // p[1] is 4 byte aligned405; (i32) p[4] | ((i32) p[3] << 8) | ((i32) p[2] << 16) | ((i32) p[1] << 24)406define i32 @load_i32_by_i8_nonzero_offset_bswap(ptr %arg) {407; CHECK-LABEL: load_i32_by_i8_nonzero_offset_bswap:408; CHECK: @ %bb.0:409; CHECK-NEXT: mov r1, #255410; CHECK-NEXT: ldr r0, [r0, #1]411; CHECK-NEXT: orr r1, r1, #16711680412; CHECK-NEXT: and r2, r0, r1413; CHECK-NEXT: and r0, r1, r0, ror #24414; CHECK-NEXT: orr r0, r0, r2, ror #8415; CHECK-NEXT: mov pc, lr416;417; CHECK-ARMv6-LABEL: load_i32_by_i8_nonzero_offset_bswap:418; CHECK-ARMv6: @ %bb.0:419; CHECK-ARMv6-NEXT: ldr r0, [r0, #1]420; CHECK-ARMv6-NEXT: rev r0, r0421; CHECK-ARMv6-NEXT: bx lr422;423; CHECK-THUMBv6-LABEL: load_i32_by_i8_nonzero_offset_bswap:424; CHECK-THUMBv6: @ %bb.0:425; CHECK-THUMBv6-NEXT: movs r1, #1426; CHECK-THUMBv6-NEXT: ldr r0, [r0, r1]427; CHECK-THUMBv6-NEXT: rev r0, r0428; CHECK-THUMBv6-NEXT: bx lr429;430; CHECK-THUMBv7-LABEL: load_i32_by_i8_nonzero_offset_bswap:431; CHECK-THUMBv7: @ %bb.0:432; CHECK-THUMBv7-NEXT: ldr.w r0, [r0, #1]433; CHECK-THUMBv7-NEXT: rev r0, r0434; CHECK-THUMBv7-NEXT: bx lr435 436 437 %tmp1 = getelementptr inbounds i8, ptr %arg, i32 4438 %tmp2 = load i8, ptr %tmp1, align 1439 %tmp3 = zext i8 %tmp2 to i32440 %tmp4 = getelementptr inbounds i8, ptr %arg, i32 3441 %tmp5 = load i8, ptr %tmp4, align 1442 %tmp6 = zext i8 %tmp5 to i32443 %tmp7 = shl nuw nsw i32 %tmp6, 8444 %tmp8 = or i32 %tmp7, %tmp3445 %tmp9 = getelementptr inbounds i8, ptr %arg, i32 2446 %tmp10 = load i8, ptr %tmp9, align 1447 %tmp11 = zext i8 %tmp10 to i32448 %tmp12 = shl nuw nsw i32 %tmp11, 16449 %tmp13 = or i32 %tmp8, %tmp12450 %tmp14 = getelementptr inbounds i8, ptr %arg, i32 1451 %tmp15 = load i8, ptr %tmp14, align 4452 %tmp16 = zext i8 %tmp15 to i32453 %tmp17 = shl nuw nsw i32 %tmp16, 24454 %tmp18 = or i32 %tmp13, %tmp17455 ret i32 %tmp18456}457 458; ptr p; // p[-4] is 4 byte aligned459; (i32) p[-1] | ((i32) p[-2] << 8) | ((i32) p[-3] << 16) | ((i32) p[-4] << 24)460define i32 @load_i32_by_i8_neg_offset_bswap(ptr %arg) {461; CHECK-LABEL: load_i32_by_i8_neg_offset_bswap:462; CHECK: @ %bb.0:463; CHECK-NEXT: mov r1, #255464; CHECK-NEXT: ldr r0, [r0, #-4]465; CHECK-NEXT: orr r1, r1, #16711680466; CHECK-NEXT: and r2, r0, r1467; CHECK-NEXT: and r0, r1, r0, ror #24468; CHECK-NEXT: orr r0, r0, r2, ror #8469; CHECK-NEXT: mov pc, lr470;471; CHECK-ARMv6-LABEL: load_i32_by_i8_neg_offset_bswap:472; CHECK-ARMv6: @ %bb.0:473; CHECK-ARMv6-NEXT: ldr r0, [r0, #-4]474; CHECK-ARMv6-NEXT: rev r0, r0475; CHECK-ARMv6-NEXT: bx lr476;477; CHECK-THUMBv6-LABEL: load_i32_by_i8_neg_offset_bswap:478; CHECK-THUMBv6: @ %bb.0:479; CHECK-THUMBv6-NEXT: subs r0, r0, #4480; CHECK-THUMBv6-NEXT: ldr r0, [r0]481; CHECK-THUMBv6-NEXT: rev r0, r0482; CHECK-THUMBv6-NEXT: bx lr483;484; CHECK-THUMBv7-LABEL: load_i32_by_i8_neg_offset_bswap:485; CHECK-THUMBv7: @ %bb.0:486; CHECK-THUMBv7-NEXT: ldr r0, [r0, #-4]487; CHECK-THUMBv7-NEXT: rev r0, r0488; CHECK-THUMBv7-NEXT: bx lr489 490 491 %tmp1 = getelementptr inbounds i8, ptr %arg, i32 -1492 %tmp2 = load i8, ptr %tmp1, align 1493 %tmp3 = zext i8 %tmp2 to i32494 %tmp4 = getelementptr inbounds i8, ptr %arg, i32 -2495 %tmp5 = load i8, ptr %tmp4, align 1496 %tmp6 = zext i8 %tmp5 to i32497 %tmp7 = shl nuw nsw i32 %tmp6, 8498 %tmp8 = or i32 %tmp7, %tmp3499 %tmp9 = getelementptr inbounds i8, ptr %arg, i32 -3500 %tmp10 = load i8, ptr %tmp9, align 1501 %tmp11 = zext i8 %tmp10 to i32502 %tmp12 = shl nuw nsw i32 %tmp11, 16503 %tmp13 = or i32 %tmp8, %tmp12504 %tmp14 = getelementptr inbounds i8, ptr %arg, i32 -4505 %tmp15 = load i8, ptr %tmp14, align 4506 %tmp16 = zext i8 %tmp15 to i32507 %tmp17 = shl nuw nsw i32 %tmp16, 24508 %tmp18 = or i32 %tmp13, %tmp17509 ret i32 %tmp18510}511 512declare i16 @llvm.bswap.i16(i16)513 514; ptr p; // p is 4 byte aligned515; (i32) bswap(p[1]) | (i32) bswap(p[0] << 16)516define i32 @load_i32_by_bswap_i16(ptr %arg) {517; CHECK-LABEL: load_i32_by_bswap_i16:518; CHECK: @ %bb.0:519; CHECK-NEXT: mov r1, #255520; CHECK-NEXT: ldr r0, [r0]521; CHECK-NEXT: orr r1, r1, #16711680522; CHECK-NEXT: and r2, r0, r1523; CHECK-NEXT: and r0, r1, r0, ror #24524; CHECK-NEXT: orr r0, r0, r2, ror #8525; CHECK-NEXT: mov pc, lr526;527; CHECK-ARMv6-LABEL: load_i32_by_bswap_i16:528; CHECK-ARMv6: @ %bb.0:529; CHECK-ARMv6-NEXT: ldr r0, [r0]530; CHECK-ARMv6-NEXT: rev r0, r0531; CHECK-ARMv6-NEXT: bx lr532;533; CHECK-THUMBv6-LABEL: load_i32_by_bswap_i16:534; CHECK-THUMBv6: @ %bb.0:535; CHECK-THUMBv6-NEXT: ldr r0, [r0]536; CHECK-THUMBv6-NEXT: rev r0, r0537; CHECK-THUMBv6-NEXT: bx lr538;539; CHECK-THUMBv7-LABEL: load_i32_by_bswap_i16:540; CHECK-THUMBv7: @ %bb.0:541; CHECK-THUMBv7-NEXT: ldr r0, [r0]542; CHECK-THUMBv7-NEXT: rev r0, r0543; CHECK-THUMBv7-NEXT: bx lr544 545 546 %tmp1 = load i16, ptr %arg, align 4547 %tmp11 = call i16 @llvm.bswap.i16(i16 %tmp1)548 %tmp2 = zext i16 %tmp11 to i32549 %tmp3 = getelementptr inbounds i16, ptr %arg, i32 1550 %tmp4 = load i16, ptr %tmp3, align 1551 %tmp41 = call i16 @llvm.bswap.i16(i16 %tmp4)552 %tmp5 = zext i16 %tmp41 to i32553 %tmp6 = shl nuw nsw i32 %tmp2, 16554 %tmp7 = or i32 %tmp6, %tmp5555 ret i32 %tmp7556}557 558; ptr p;559; (i32) p[0] | (sext(p[1] << 16) to i32)560define i32 @load_i32_by_sext_i16(ptr %arg) {561; CHECK-LABEL: load_i32_by_sext_i16:562; CHECK: @ %bb.0:563; CHECK-NEXT: ldr r0, [r0]564; CHECK-NEXT: mov pc, lr565;566; CHECK-ARMv6-LABEL: load_i32_by_sext_i16:567; CHECK-ARMv6: @ %bb.0:568; CHECK-ARMv6-NEXT: ldr r0, [r0]569; CHECK-ARMv6-NEXT: bx lr570;571; CHECK-THUMBv6-LABEL: load_i32_by_sext_i16:572; CHECK-THUMBv6: @ %bb.0:573; CHECK-THUMBv6-NEXT: ldr r0, [r0]574; CHECK-THUMBv6-NEXT: bx lr575;576; CHECK-THUMBv7-LABEL: load_i32_by_sext_i16:577; CHECK-THUMBv7: @ %bb.0:578; CHECK-THUMBv7-NEXT: ldr r0, [r0]579; CHECK-THUMBv7-NEXT: bx lr580 %tmp1 = load i16, ptr %arg, align 4581 %tmp2 = zext i16 %tmp1 to i32582 %tmp3 = getelementptr inbounds i16, ptr %arg, i32 1583 %tmp4 = load i16, ptr %tmp3, align 1584 %tmp5 = sext i16 %tmp4 to i32585 %tmp6 = shl nuw nsw i32 %tmp5, 16586 %tmp7 = or i32 %tmp6, %tmp2587 ret i32 %tmp7588}589 590; ptr arg; i32 i;591; p = arg + 12;592; (i32) p[i] | ((i32) p[i + 1] << 8) | ((i32) p[i + 2] << 16) | ((i32) p[i + 3] << 24)593define i32 @load_i32_by_i8_base_offset_index(ptr %arg, i32 %i) {594; CHECK-LABEL: load_i32_by_i8_base_offset_index:595; CHECK: @ %bb.0:596; CHECK-NEXT: add r0, r0, r1597; CHECK-NEXT: ldr r0, [r0, #12]598; CHECK-NEXT: mov pc, lr599;600; CHECK-ARMv6-LABEL: load_i32_by_i8_base_offset_index:601; CHECK-ARMv6: @ %bb.0:602; CHECK-ARMv6-NEXT: add r0, r0, r1603; CHECK-ARMv6-NEXT: ldr r0, [r0, #12]604; CHECK-ARMv6-NEXT: bx lr605;606; CHECK-THUMBv6-LABEL: load_i32_by_i8_base_offset_index:607; CHECK-THUMBv6: @ %bb.0:608; CHECK-THUMBv6-NEXT: adds r0, r0, r1609; CHECK-THUMBv6-NEXT: ldr r0, [r0, #12]610; CHECK-THUMBv6-NEXT: bx lr611;612; CHECK-THUMBv7-LABEL: load_i32_by_i8_base_offset_index:613; CHECK-THUMBv7: @ %bb.0:614; CHECK-THUMBv7-NEXT: add r0, r1615; CHECK-THUMBv7-NEXT: ldr r0, [r0, #12]616; CHECK-THUMBv7-NEXT: bx lr617 618 %tmp = add nuw nsw i32 %i, 3619 %tmp2 = add nuw nsw i32 %i, 2620 %tmp3 = add nuw nsw i32 %i, 1621 %tmp4 = getelementptr inbounds i8, ptr %arg, i64 12622 %tmp5 = zext i32 %i to i64623 %tmp6 = getelementptr inbounds i8, ptr %tmp4, i64 %tmp5624 %tmp7 = load i8, ptr %tmp6, align 4625 %tmp8 = zext i8 %tmp7 to i32626 %tmp9 = zext i32 %tmp3 to i64627 %tmp10 = getelementptr inbounds i8, ptr %tmp4, i64 %tmp9628 %tmp11 = load i8, ptr %tmp10, align 1629 %tmp12 = zext i8 %tmp11 to i32630 %tmp13 = shl nuw nsw i32 %tmp12, 8631 %tmp14 = or i32 %tmp13, %tmp8632 %tmp15 = zext i32 %tmp2 to i64633 %tmp16 = getelementptr inbounds i8, ptr %tmp4, i64 %tmp15634 %tmp17 = load i8, ptr %tmp16, align 1635 %tmp18 = zext i8 %tmp17 to i32636 %tmp19 = shl nuw nsw i32 %tmp18, 16637 %tmp20 = or i32 %tmp14, %tmp19638 %tmp21 = zext i32 %tmp to i64639 %tmp22 = getelementptr inbounds i8, ptr %tmp4, i64 %tmp21640 %tmp23 = load i8, ptr %tmp22, align 1641 %tmp24 = zext i8 %tmp23 to i32642 %tmp25 = shl nuw i32 %tmp24, 24643 %tmp26 = or i32 %tmp20, %tmp25644 ret i32 %tmp26645}646 647; ptr arg; i32 i;648; p = arg + 12;649; (i32) p[i + 1] | ((i32) p[i + 2] << 8) | ((i32) p[i + 3] << 16) | ((i32) p[i + 4] << 24)650define i32 @load_i32_by_i8_base_offset_index_2(ptr %arg, i32 %i) {651; CHECK-LABEL: load_i32_by_i8_base_offset_index_2:652; CHECK: @ %bb.0:653; CHECK-NEXT: add r0, r1, r0654; CHECK-NEXT: ldr r0, [r0, #13]655; CHECK-NEXT: mov pc, lr656;657; CHECK-ARMv6-LABEL: load_i32_by_i8_base_offset_index_2:658; CHECK-ARMv6: @ %bb.0:659; CHECK-ARMv6-NEXT: add r0, r1, r0660; CHECK-ARMv6-NEXT: ldr r0, [r0, #13]661; CHECK-ARMv6-NEXT: bx lr662;663; CHECK-THUMBv6-LABEL: load_i32_by_i8_base_offset_index_2:664; CHECK-THUMBv6: @ %bb.0:665; CHECK-THUMBv6-NEXT: adds r0, r1, r0666; CHECK-THUMBv6-NEXT: movs r1, #13667; CHECK-THUMBv6-NEXT: ldr r0, [r0, r1]668; CHECK-THUMBv6-NEXT: bx lr669;670; CHECK-THUMBv7-LABEL: load_i32_by_i8_base_offset_index_2:671; CHECK-THUMBv7: @ %bb.0:672; CHECK-THUMBv7-NEXT: add r0, r1673; CHECK-THUMBv7-NEXT: ldr.w r0, [r0, #13]674; CHECK-THUMBv7-NEXT: bx lr675 %tmp = add nuw nsw i32 %i, 4676 %tmp2 = add nuw nsw i32 %i, 3677 %tmp3 = add nuw nsw i32 %i, 2678 %tmp4 = getelementptr inbounds i8, ptr %arg, i64 12679 %tmp5 = add nuw nsw i32 %i, 1680 %tmp27 = zext i32 %tmp5 to i64681 %tmp28 = getelementptr inbounds i8, ptr %tmp4, i64 %tmp27682 %tmp29 = load i8, ptr %tmp28, align 4683 %tmp30 = zext i8 %tmp29 to i32684 %tmp31 = zext i32 %tmp3 to i64685 %tmp32 = getelementptr inbounds i8, ptr %tmp4, i64 %tmp31686 %tmp33 = load i8, ptr %tmp32, align 1687 %tmp34 = zext i8 %tmp33 to i32688 %tmp35 = shl nuw nsw i32 %tmp34, 8689 %tmp36 = or i32 %tmp35, %tmp30690 %tmp37 = zext i32 %tmp2 to i64691 %tmp38 = getelementptr inbounds i8, ptr %tmp4, i64 %tmp37692 %tmp39 = load i8, ptr %tmp38, align 1693 %tmp40 = zext i8 %tmp39 to i32694 %tmp41 = shl nuw nsw i32 %tmp40, 16695 %tmp42 = or i32 %tmp36, %tmp41696 %tmp43 = zext i32 %tmp to i64697 %tmp44 = getelementptr inbounds i8, ptr %tmp4, i64 %tmp43698 %tmp45 = load i8, ptr %tmp44, align 1699 %tmp46 = zext i8 %tmp45 to i32700 %tmp47 = shl nuw i32 %tmp46, 24701 %tmp48 = or i32 %tmp42, %tmp47702 ret i32 %tmp48703}704 705; ptr p; // p is 2 byte aligned706; (i32) p[0] | ((i32) p[1] << 8)707define i32 @zext_load_i32_by_i8(ptr %arg) {708; CHECK-LABEL: zext_load_i32_by_i8:709; CHECK: @ %bb.0:710; CHECK-NEXT: ldrh r0, [r0]711; CHECK-NEXT: mov pc, lr712;713; CHECK-ARMv6-LABEL: zext_load_i32_by_i8:714; CHECK-ARMv6: @ %bb.0:715; CHECK-ARMv6-NEXT: ldrh r0, [r0]716; CHECK-ARMv6-NEXT: bx lr717;718; CHECK-THUMBv6-LABEL: zext_load_i32_by_i8:719; CHECK-THUMBv6: @ %bb.0:720; CHECK-THUMBv6-NEXT: ldrh r0, [r0]721; CHECK-THUMBv6-NEXT: bx lr722;723; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8:724; CHECK-THUMBv7: @ %bb.0:725; CHECK-THUMBv7-NEXT: ldrh r0, [r0]726; CHECK-THUMBv7-NEXT: bx lr727 728 %tmp2 = load i8, ptr %arg, align 2729 %tmp3 = zext i8 %tmp2 to i32730 %tmp4 = getelementptr inbounds i8, ptr %arg, i32 1731 %tmp5 = load i8, ptr %tmp4, align 1732 %tmp6 = zext i8 %tmp5 to i32733 %tmp7 = shl nuw nsw i32 %tmp6, 8734 %tmp8 = or i32 %tmp7, %tmp3735 ret i32 %tmp8736}737 738; ptr p; // p is 2 byte aligned739; ((i32) p[0] << 8) | ((i32) p[1] << 16)740define i32 @zext_load_i32_by_i8_shl_8(ptr %arg) {741; CHECK-LABEL: zext_load_i32_by_i8_shl_8:742; CHECK: @ %bb.0:743; CHECK-NEXT: ldrb r1, [r0]744; CHECK-NEXT: ldrb r0, [r0, #1]745; CHECK-NEXT: lsl r0, r0, #16746; CHECK-NEXT: orr r0, r0, r1, lsl #8747; CHECK-NEXT: mov pc, lr748;749; CHECK-ARMv6-LABEL: zext_load_i32_by_i8_shl_8:750; CHECK-ARMv6: @ %bb.0:751; CHECK-ARMv6-NEXT: ldrb r1, [r0]752; CHECK-ARMv6-NEXT: ldrb r0, [r0, #1]753; CHECK-ARMv6-NEXT: lsl r0, r0, #16754; CHECK-ARMv6-NEXT: orr r0, r0, r1, lsl #8755; CHECK-ARMv6-NEXT: bx lr756;757; CHECK-THUMBv6-LABEL: zext_load_i32_by_i8_shl_8:758; CHECK-THUMBv6: @ %bb.0:759; CHECK-THUMBv6-NEXT: ldrb r1, [r0]760; CHECK-THUMBv6-NEXT: lsls r1, r1, #8761; CHECK-THUMBv6-NEXT: ldrb r0, [r0, #1]762; CHECK-THUMBv6-NEXT: lsls r0, r0, #16763; CHECK-THUMBv6-NEXT: adds r0, r0, r1764; CHECK-THUMBv6-NEXT: bx lr765;766; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_shl_8:767; CHECK-THUMBv7: @ %bb.0:768; CHECK-THUMBv7-NEXT: ldrb r1, [r0]769; CHECK-THUMBv7-NEXT: ldrb r0, [r0, #1]770; CHECK-THUMBv7-NEXT: lsls r0, r0, #16771; CHECK-THUMBv7-NEXT: orr.w r0, r0, r1, lsl #8772; CHECK-THUMBv7-NEXT: bx lr773 774 %tmp2 = load i8, ptr %arg, align 2775 %tmp3 = zext i8 %tmp2 to i32776 %tmp30 = shl nuw nsw i32 %tmp3, 8777 %tmp4 = getelementptr inbounds i8, ptr %arg, i32 1778 %tmp5 = load i8, ptr %tmp4, align 1779 %tmp6 = zext i8 %tmp5 to i32780 %tmp7 = shl nuw nsw i32 %tmp6, 16781 %tmp8 = or i32 %tmp7, %tmp30782 ret i32 %tmp8783}784 785; ptr p; // p is 2 byte aligned786; ((i32) p[0] << 16) | ((i32) p[1] << 24)787define i32 @zext_load_i32_by_i8_shl_16(ptr %arg) {788; CHECK-LABEL: zext_load_i32_by_i8_shl_16:789; CHECK: @ %bb.0:790; CHECK-NEXT: ldrb r1, [r0]791; CHECK-NEXT: ldrb r0, [r0, #1]792; CHECK-NEXT: lsl r0, r0, #24793; CHECK-NEXT: orr r0, r0, r1, lsl #16794; CHECK-NEXT: mov pc, lr795;796; CHECK-ARMv6-LABEL: zext_load_i32_by_i8_shl_16:797; CHECK-ARMv6: @ %bb.0:798; CHECK-ARMv6-NEXT: ldrb r1, [r0]799; CHECK-ARMv6-NEXT: ldrb r0, [r0, #1]800; CHECK-ARMv6-NEXT: lsl r0, r0, #24801; CHECK-ARMv6-NEXT: orr r0, r0, r1, lsl #16802; CHECK-ARMv6-NEXT: bx lr803;804; CHECK-THUMBv6-LABEL: zext_load_i32_by_i8_shl_16:805; CHECK-THUMBv6: @ %bb.0:806; CHECK-THUMBv6-NEXT: ldrb r1, [r0]807; CHECK-THUMBv6-NEXT: lsls r1, r1, #16808; CHECK-THUMBv6-NEXT: ldrb r0, [r0, #1]809; CHECK-THUMBv6-NEXT: lsls r0, r0, #24810; CHECK-THUMBv6-NEXT: adds r0, r0, r1811; CHECK-THUMBv6-NEXT: bx lr812;813; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_shl_16:814; CHECK-THUMBv7: @ %bb.0:815; CHECK-THUMBv7-NEXT: ldrb r1, [r0]816; CHECK-THUMBv7-NEXT: ldrb r0, [r0, #1]817; CHECK-THUMBv7-NEXT: lsls r0, r0, #24818; CHECK-THUMBv7-NEXT: orr.w r0, r0, r1, lsl #16819; CHECK-THUMBv7-NEXT: bx lr820 821 %tmp2 = load i8, ptr %arg, align 2822 %tmp3 = zext i8 %tmp2 to i32823 %tmp30 = shl nuw nsw i32 %tmp3, 16824 %tmp4 = getelementptr inbounds i8, ptr %arg, i32 1825 %tmp5 = load i8, ptr %tmp4, align 1826 %tmp6 = zext i8 %tmp5 to i32827 %tmp7 = shl nuw nsw i32 %tmp6, 24828 %tmp8 = or i32 %tmp7, %tmp30829 ret i32 %tmp8830}831 832; ptr p; // p is 2 byte aligned833; (i32) p[1] | ((i32) p[0] << 8)834define i32 @zext_load_i32_by_i8_bswap(ptr %arg) {835; CHECK-LABEL: zext_load_i32_by_i8_bswap:836; CHECK: @ %bb.0:837; CHECK-NEXT: ldrb r1, [r0]838; CHECK-NEXT: ldrb r0, [r0, #1]839; CHECK-NEXT: orr r0, r0, r1, lsl #8840; CHECK-NEXT: mov pc, lr841;842; CHECK-ARMv6-LABEL: zext_load_i32_by_i8_bswap:843; CHECK-ARMv6: @ %bb.0:844; CHECK-ARMv6-NEXT: ldrh r0, [r0]845; CHECK-ARMv6-NEXT: rev16 r0, r0846; CHECK-ARMv6-NEXT: bx lr847;848; CHECK-THUMBv6-LABEL: zext_load_i32_by_i8_bswap:849; CHECK-THUMBv6: @ %bb.0:850; CHECK-THUMBv6-NEXT: ldrh r0, [r0]851; CHECK-THUMBv6-NEXT: rev16 r0, r0852; CHECK-THUMBv6-NEXT: bx lr853;854; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_bswap:855; CHECK-THUMBv7: @ %bb.0:856; CHECK-THUMBv7-NEXT: ldrh r0, [r0]857; CHECK-THUMBv7-NEXT: rev16 r0, r0858; CHECK-THUMBv7-NEXT: bx lr859 860 %tmp1 = getelementptr inbounds i8, ptr %arg, i32 1861 %tmp2 = load i8, ptr %tmp1, align 1862 %tmp3 = zext i8 %tmp2 to i32863 %tmp5 = load i8, ptr %arg, align 2864 %tmp6 = zext i8 %tmp5 to i32865 %tmp7 = shl nuw nsw i32 %tmp6, 8866 %tmp8 = or i32 %tmp7, %tmp3867 ret i32 %tmp8868}869 870; ptr p; // p is 2 byte aligned871; ((i32) p[1] << 8) | ((i32) p[0] << 16)872define i32 @zext_load_i32_by_i8_bswap_shl_8(ptr %arg) {873; CHECK-LABEL: zext_load_i32_by_i8_bswap_shl_8:874; CHECK: @ %bb.0:875; CHECK-NEXT: ldrb r1, [r0]876; CHECK-NEXT: ldrb r0, [r0, #1]877; CHECK-NEXT: lsl r1, r1, #16878; CHECK-NEXT: orr r0, r1, r0, lsl #8879; CHECK-NEXT: mov pc, lr880;881; CHECK-ARMv6-LABEL: zext_load_i32_by_i8_bswap_shl_8:882; CHECK-ARMv6: @ %bb.0:883; CHECK-ARMv6-NEXT: ldrb r1, [r0]884; CHECK-ARMv6-NEXT: ldrb r0, [r0, #1]885; CHECK-ARMv6-NEXT: lsl r1, r1, #16886; CHECK-ARMv6-NEXT: orr r0, r1, r0, lsl #8887; CHECK-ARMv6-NEXT: bx lr888;889; CHECK-THUMBv6-LABEL: zext_load_i32_by_i8_bswap_shl_8:890; CHECK-THUMBv6: @ %bb.0:891; CHECK-THUMBv6-NEXT: ldrb r1, [r0, #1]892; CHECK-THUMBv6-NEXT: lsls r1, r1, #8893; CHECK-THUMBv6-NEXT: ldrb r0, [r0]894; CHECK-THUMBv6-NEXT: lsls r0, r0, #16895; CHECK-THUMBv6-NEXT: adds r0, r0, r1896; CHECK-THUMBv6-NEXT: bx lr897;898; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_bswap_shl_8:899; CHECK-THUMBv7: @ %bb.0:900; CHECK-THUMBv7-NEXT: ldrb r1, [r0]901; CHECK-THUMBv7-NEXT: ldrb r0, [r0, #1]902; CHECK-THUMBv7-NEXT: lsls r1, r1, #16903; CHECK-THUMBv7-NEXT: orr.w r0, r1, r0, lsl #8904; CHECK-THUMBv7-NEXT: bx lr905 906 %tmp1 = getelementptr inbounds i8, ptr %arg, i32 1907 %tmp2 = load i8, ptr %tmp1, align 1908 %tmp3 = zext i8 %tmp2 to i32909 %tmp30 = shl nuw nsw i32 %tmp3, 8910 %tmp5 = load i8, ptr %arg, align 2911 %tmp6 = zext i8 %tmp5 to i32912 %tmp7 = shl nuw nsw i32 %tmp6, 16913 %tmp8 = or i32 %tmp7, %tmp30914 ret i32 %tmp8915}916 917; ptr p; // p is 2 byte aligned918; ((i32) p[1] << 16) | ((i32) p[0] << 24)919define i32 @zext_load_i32_by_i8_bswap_shl_16(ptr %arg) {920; CHECK-LABEL: zext_load_i32_by_i8_bswap_shl_16:921; CHECK: @ %bb.0:922; CHECK-NEXT: ldrb r1, [r0]923; CHECK-NEXT: ldrb r0, [r0, #1]924; CHECK-NEXT: lsl r1, r1, #24925; CHECK-NEXT: orr r0, r1, r0, lsl #16926; CHECK-NEXT: mov pc, lr927;928; CHECK-ARMv6-LABEL: zext_load_i32_by_i8_bswap_shl_16:929; CHECK-ARMv6: @ %bb.0:930; CHECK-ARMv6-NEXT: ldrb r1, [r0]931; CHECK-ARMv6-NEXT: ldrb r0, [r0, #1]932; CHECK-ARMv6-NEXT: lsl r1, r1, #24933; CHECK-ARMv6-NEXT: orr r0, r1, r0, lsl #16934; CHECK-ARMv6-NEXT: bx lr935;936; CHECK-THUMBv6-LABEL: zext_load_i32_by_i8_bswap_shl_16:937; CHECK-THUMBv6: @ %bb.0:938; CHECK-THUMBv6-NEXT: ldrb r1, [r0, #1]939; CHECK-THUMBv6-NEXT: lsls r1, r1, #16940; CHECK-THUMBv6-NEXT: ldrb r0, [r0]941; CHECK-THUMBv6-NEXT: lsls r0, r0, #24942; CHECK-THUMBv6-NEXT: adds r0, r0, r1943; CHECK-THUMBv6-NEXT: bx lr944;945; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_bswap_shl_16:946; CHECK-THUMBv7: @ %bb.0:947; CHECK-THUMBv7-NEXT: ldrb r1, [r0]948; CHECK-THUMBv7-NEXT: ldrb r0, [r0, #1]949; CHECK-THUMBv7-NEXT: lsls r1, r1, #24950; CHECK-THUMBv7-NEXT: orr.w r0, r1, r0, lsl #16951; CHECK-THUMBv7-NEXT: bx lr952 953 %tmp1 = getelementptr inbounds i8, ptr %arg, i32 1954 %tmp2 = load i8, ptr %tmp1, align 1955 %tmp3 = zext i8 %tmp2 to i32956 %tmp30 = shl nuw nsw i32 %tmp3, 16957 %tmp5 = load i8, ptr %arg, align 2958 %tmp6 = zext i8 %tmp5 to i32959 %tmp7 = shl nuw nsw i32 %tmp6, 24960 %tmp8 = or i32 %tmp7, %tmp30961 ret i32 %tmp8962}963