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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s -check-prefix=CHECK-LE3; RUN: llc -mtriple=armeb-eabi %s -o - | FileCheck %s -check-prefix=CHECK-BE4 5define i64 @f0(i64 %A, i64 %B) {6; CHECK-LE-LABEL: f0:7; CHECK-LE:       @ %bb.0:8; CHECK-LE-NEXT:    lsrs r3, r3, #19; CHECK-LE-NEXT:    rrx r2, r210; CHECK-LE-NEXT:    subs r0, r0, r211; CHECK-LE-NEXT:    sbc r1, r1, r312; CHECK-LE-NEXT:    mov pc, lr13;14; CHECK-BE-LABEL: f0:15; CHECK-BE:       @ %bb.0:16; CHECK-BE-NEXT:    lsrs r2, r2, #117; CHECK-BE-NEXT:    rrx r3, r318; CHECK-BE-NEXT:    subs r1, r1, r319; CHECK-BE-NEXT:    sbc r0, r0, r220; CHECK-BE-NEXT:    mov pc, lr21 22  %tmp = bitcast i64 %A to i6423  %tmp2 = lshr i64 %B, 124  %tmp3 = sub i64 %tmp, %tmp225  ret i64 %tmp326}27 28define i32 @f1(i64 %x, i64 %y) {29; CHECK-LE-LABEL: f1:30; CHECK-LE:       @ %bb.0:31; CHECK-LE-NEXT:    lsl r0, r0, r232; CHECK-LE-NEXT:    subs r1, r2, #3233; CHECK-LE-NEXT:    movpl r0, #034; CHECK-LE-NEXT:    mov pc, lr35;36; CHECK-BE-LABEL: f1:37; CHECK-BE:       @ %bb.0:38; CHECK-BE-NEXT:    lsl r0, r1, r339; CHECK-BE-NEXT:    subs r1, r3, #3240; CHECK-BE-NEXT:    movpl r0, #041; CHECK-BE-NEXT:    mov pc, lr42 43  %a = shl i64 %x, %y44  %b = trunc i64 %a to i3245  ret i32 %b46}47 48define i32 @f2(i64 %x, i64 %y) {49; CHECK-LE-LABEL: f2:50; CHECK-LE:       @ %bb.0:51; CHECK-LE-NEXT:    rsb r3, r2, #3252; CHECK-LE-NEXT:    lsr r0, r0, r253; CHECK-LE-NEXT:    subs r2, r2, #3254; CHECK-LE-NEXT:    orr r0, r0, r1, lsl r355; CHECK-LE-NEXT:    asrpl r0, r1, r256; CHECK-LE-NEXT:    mov pc, lr57;58; CHECK-BE-LABEL: f2:59; CHECK-BE:       @ %bb.0:60; CHECK-BE-NEXT:    rsb r2, r3, #3261; CHECK-BE-NEXT:    lsr r1, r1, r362; CHECK-BE-NEXT:    orr r1, r1, r0, lsl r263; CHECK-BE-NEXT:    subs r2, r3, #3264; CHECK-BE-NEXT:    asrpl r1, r0, r265; CHECK-BE-NEXT:    mov r0, r166; CHECK-BE-NEXT:    mov pc, lr67 68  %a = ashr i64 %x, %y69  %b = trunc i64 %a to i3270  ret i32 %b71}72 73define i32 @f3(i64 %x, i64 %y) {74; CHECK-LE-LABEL: f3:75; CHECK-LE:       @ %bb.0:76; CHECK-LE-NEXT:    rsb r3, r2, #3277; CHECK-LE-NEXT:    lsr r0, r0, r278; CHECK-LE-NEXT:    subs r2, r2, #3279; CHECK-LE-NEXT:    orr r0, r0, r1, lsl r380; CHECK-LE-NEXT:    lsrpl r0, r1, r281; CHECK-LE-NEXT:    mov pc, lr82;83; CHECK-BE-LABEL: f3:84; CHECK-BE:       @ %bb.0:85; CHECK-BE-NEXT:    rsb r2, r3, #3286; CHECK-BE-NEXT:    lsr r1, r1, r387; CHECK-BE-NEXT:    orr r1, r1, r0, lsl r288; CHECK-BE-NEXT:    subs r2, r3, #3289; CHECK-BE-NEXT:    lsrpl r1, r0, r290; CHECK-BE-NEXT:    mov r0, r191; CHECK-BE-NEXT:    mov pc, lr92 93  %a = lshr i64 %x, %y94  %b = trunc i64 %a to i3295  ret i32 %b96}97