51 lines · plain
1; RUN: llc -o - %s | FileCheck %s2; Make sure we do not try to compute liveness for FPSCR which in this case3; is read before being written to (this is fine because becase FPSCR is4; reserved).5target triple = "thumbv7s-apple-ios"6 7%struct.wibble = type { double }8 9@global = common global i32 0, align 410@global.1 = common global i32 0, align 411 12; CHECK-LABEL: eggs:13; CHECK: sub sp, #814; VMRS instruction comes before any other instruction writing FPSCR:15; CHECK-NOT: vcmp16; CHECK: vmrs {{r[0-9]}}, fpscr17; CHECK: vcmp18; ...19; CHECK: add sp, #820; CHECK: bx lr21define i32 @eggs(ptr nocapture readnone %arg) {22bb:23 %tmp = alloca %struct.wibble, align 424 %tmp2 = tail call i32 @llvm.get.rounding()25 %tmp3 = ptrtoint ptr %tmp to i3226 %tmp4 = sitofp i32 %tmp3 to double27 %tmp5 = fmul double %tmp4, 0x0123456789ABCDEF28 %tmp6 = fptosi double %tmp5 to i3229 %tmp7 = fcmp une double %tmp5, 0.000000e+0030 %tmp8 = sitofp i32 %tmp6 to double31 %tmp9 = fcmp une double %tmp5, %tmp832 %tmp10 = and i1 %tmp7, %tmp933 %tmp11 = sext i1 %tmp10 to i3234 %tmp12 = add nsw i32 %tmp11, %tmp635 store i32 %tmp12, ptr @global, align 436 %tmp13 = icmp ne i32 %tmp12, 037 %tmp14 = icmp ne i32 %tmp2, 038 %tmp15 = and i1 %tmp14, %tmp1339 br i1 %tmp15, label %bb16, label %bb1840 41bb16: ; preds = %bb42 %tmp17 = load i32, ptr @global.1, align 443 br label %bb1844 45bb18: ; preds = %bb16, %bb46 ret i32 undef47}48 49declare i32 @llvm.get.rounding()50declare i32 @zot(...)51